JPS5527736A - Data transmission device - Google Patents

Data transmission device

Info

Publication number
JPS5527736A
JPS5527736A JP10065878A JP10065878A JPS5527736A JP S5527736 A JPS5527736 A JP S5527736A JP 10065878 A JP10065878 A JP 10065878A JP 10065878 A JP10065878 A JP 10065878A JP S5527736 A JPS5527736 A JP S5527736A
Authority
JP
Japan
Prior art keywords
transmission
information
transmission line
buffer
memorized
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10065878A
Other languages
Japanese (ja)
Inventor
Akihiko Fujimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP10065878A priority Critical patent/JPS5527736A/en
Publication of JPS5527736A publication Critical patent/JPS5527736A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/05—Electric or magnetic storage of signals before transmitting or retransmitting for changing the transmission rate

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Communication Control (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To secure a highly effective transmission by means of the three pieces of transmission lines: the data transmission line, the transmission control line and the write/read designation signal transmission line instead of the conventional one transmission line. CONSTITUTION:With transmission of the write designation signal from control circuit 10a through transmission line 8, control circuit 10b prepares for reception of the serial information. When the wirte information is sent to parallel data bus 13a with writing command 4 given to circuit 10, the information memorized temperarily in buffer 11a raches buffer 11b via data transmission line 17 to be memorized temporarily as the parallel information by the control signal sent through transmission line 9. The write information is effective only when the transmission control signal is logic 1, and the transmission ends when logic 1 changes to 0. At the read designation time, the information on parallel data bus 13b is memorized temporarily in buffer 11b and then read out from buffer 11b via command 5 to reach buffer 10a via transmission line 17 and then memorized as the parallel information via serial reading command 16a. With logic 0 the memory information is delivered to bus 13a. Thus a high-speed transmission is secured.
JP10065878A 1978-08-18 1978-08-18 Data transmission device Pending JPS5527736A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10065878A JPS5527736A (en) 1978-08-18 1978-08-18 Data transmission device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10065878A JPS5527736A (en) 1978-08-18 1978-08-18 Data transmission device

Publications (1)

Publication Number Publication Date
JPS5527736A true JPS5527736A (en) 1980-02-28

Family

ID=14279899

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10065878A Pending JPS5527736A (en) 1978-08-18 1978-08-18 Data transmission device

Country Status (1)

Country Link
JP (1) JPS5527736A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6051046A (en) * 1983-08-30 1985-03-22 Nec Corp Digital signal transmitting system
US4852041A (en) * 1984-12-17 1989-07-25 Micro Co., Ltd. Interface converter

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6051046A (en) * 1983-08-30 1985-03-22 Nec Corp Digital signal transmitting system
JPH0472427B2 (en) * 1983-08-30 1992-11-18 Nippon Electric Co
US4852041A (en) * 1984-12-17 1989-07-25 Micro Co., Ltd. Interface converter

Similar Documents

Publication Publication Date Title
JPS6419438A (en) Hot stand-by memory copy system
JPS5533232A (en) Sequential controller
JPS5797133A (en) Control system of data transfer
EP0353610A3 (en) Multiplexing apparatus
JPS5527736A (en) Data transmission device
JPS54142938A (en) Pattern generation system for display unit
JPS5617489A (en) Character display processing system
JPS57103547A (en) Bit word access circuit
JPS52125239A (en) Write-in and read-out control system for memory unit
JPS5712498A (en) Integrated circuit device for memory
JPS55159263A (en) Read-in and write-in system for magnetic disc
JPS55122216A (en) Magnetic card read/write control unit
JPS57196329A (en) Program loading system
JPS57162026A (en) Data file controlling system
JPS5564693A (en) Buffer memory unit
JPS5622157A (en) Process system multiplexing system
JPS5643896A (en) Key telephone control circuit
JPS56105546A (en) Memory mapping circuit
JPS5361236A (en) Memory access control system
JPS56169280A (en) Address speed variation type storage device
JPS57207942A (en) Unpacking circuit
JPS57127259A (en) System for high-speed data transfer
JPS5377403A (en) Voice input device
JPS5697164A (en) Test and set and test and reset system
JPS5339026A (en) Reading exclusive ic memory