JPS55123730A - Printer unit - Google Patents

Printer unit

Info

Publication number
JPS55123730A
JPS55123730A JP2942179A JP2942179A JPS55123730A JP S55123730 A JPS55123730 A JP S55123730A JP 2942179 A JP2942179 A JP 2942179A JP 2942179 A JP2942179 A JP 2942179A JP S55123730 A JPS55123730 A JP S55123730A
Authority
JP
Japan
Prior art keywords
print
address signal
data signal
bus
decoder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2942179A
Other languages
Japanese (ja)
Inventor
Hideyuki Takahashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP2942179A priority Critical patent/JPS55123730A/en
Publication of JPS55123730A publication Critical patent/JPS55123730A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To improve the operation speed by causing multiplexers to switch the address signal and the data signal from the I/O bus and the address signal and the data signal from others on a basis of the decoder output.
CONSTITUTION: In the printer control unit where print can be started from an arbitrary digit position, the printer control part is connected to a CPU through I/O bus 1 and is controlled by micro processor 3. For print of the printer, a print position in print is defined in the RAM by indication from the CPU, and decoder 103 decodes this indication to stop the operation of processor 3 until data write to the RAM is completed. Further, multiplexers 106, 110 and 118 switch and output the address signal and the data signal from bus 1 and the address signal and the data signal from others on a basis of the output of decoder 103. As a result, print can be started from an arbitrary position to improve the operations speed.
COPYRIGHT: (C)1980,JPO&Japio
JP2942179A 1979-03-15 1979-03-15 Printer unit Pending JPS55123730A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2942179A JPS55123730A (en) 1979-03-15 1979-03-15 Printer unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2942179A JPS55123730A (en) 1979-03-15 1979-03-15 Printer unit

Publications (1)

Publication Number Publication Date
JPS55123730A true JPS55123730A (en) 1980-09-24

Family

ID=12275656

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2942179A Pending JPS55123730A (en) 1979-03-15 1979-03-15 Printer unit

Country Status (1)

Country Link
JP (1) JPS55123730A (en)

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