JPS5313325A - Connection method between information processing unit and peripheral device - Google Patents
Connection method between information processing unit and peripheral deviceInfo
- Publication number
- JPS5313325A JPS5313325A JP8708876A JP8708876A JPS5313325A JP S5313325 A JPS5313325 A JP S5313325A JP 8708876 A JP8708876 A JP 8708876A JP 8708876 A JP8708876 A JP 8708876A JP S5313325 A JPS5313325 A JP S5313325A
- Authority
- JP
- Japan
- Prior art keywords
- processing unit
- information processing
- peripheral device
- connection method
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Information Transfer Systems (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Abstract
PURPOSE: With respect to the memory which is intermediate between CPU and a printer, for exemple, two memories of 1K are used instead of one memory of 2K, so that the transfer speed can be accelerated.
COPYRIGHT: (C)1978,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8708876A JPS5313325A (en) | 1976-07-21 | 1976-07-21 | Connection method between information processing unit and peripheral device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8708876A JPS5313325A (en) | 1976-07-21 | 1976-07-21 | Connection method between information processing unit and peripheral device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5313325A true JPS5313325A (en) | 1978-02-06 |
Family
ID=13905183
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8708876A Pending JPS5313325A (en) | 1976-07-21 | 1976-07-21 | Connection method between information processing unit and peripheral device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5313325A (en) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58101397A (en) * | 1981-12-11 | 1983-06-16 | 安藤電気株式会社 | Test system |
WO1984003990A1 (en) * | 1983-03-31 | 1984-10-11 | Fanuc Ltd | Memory readout control system |
JPS62110798U (en) * | 1985-12-27 | 1987-07-15 | ||
JPS62162348A (en) * | 1986-01-13 | 1987-07-18 | Matsushita Electric Ind Co Ltd | Package for electric element |
JPS63118005A (en) * | 1986-11-06 | 1988-05-23 | Nippon Steel Corp | Operation method for blast furnace |
JPS63118006A (en) * | 1986-11-06 | 1988-05-23 | Nippon Steel Corp | Operation method for blast furnace |
JP2010026741A (en) * | 2008-07-18 | 2010-02-04 | Mimaki Engineering Co Ltd | Data transfer method and device |
-
1976
- 1976-07-21 JP JP8708876A patent/JPS5313325A/en active Pending
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58101397A (en) * | 1981-12-11 | 1983-06-16 | 安藤電気株式会社 | Test system |
WO1984003990A1 (en) * | 1983-03-31 | 1984-10-11 | Fanuc Ltd | Memory readout control system |
EP0144432A1 (en) * | 1983-03-31 | 1985-06-19 | Fanuc Ltd. | Memory readout control system |
JPS62110798U (en) * | 1985-12-27 | 1987-07-15 | ||
JPS62162348A (en) * | 1986-01-13 | 1987-07-18 | Matsushita Electric Ind Co Ltd | Package for electric element |
JPS63118005A (en) * | 1986-11-06 | 1988-05-23 | Nippon Steel Corp | Operation method for blast furnace |
JPS63118006A (en) * | 1986-11-06 | 1988-05-23 | Nippon Steel Corp | Operation method for blast furnace |
JP2010026741A (en) * | 2008-07-18 | 2010-02-04 | Mimaki Engineering Co Ltd | Data transfer method and device |
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