JPS55118118A - Integrated circuit formed intra-office line interface - Google Patents

Integrated circuit formed intra-office line interface

Info

Publication number
JPS55118118A
JPS55118118A JP2499179A JP2499179A JPS55118118A JP S55118118 A JPS55118118 A JP S55118118A JP 2499179 A JP2499179 A JP 2499179A JP 2499179 A JP2499179 A JP 2499179A JP S55118118 A JPS55118118 A JP S55118118A
Authority
JP
Japan
Prior art keywords
circuit
signal
nrz
applying
bipolar violation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2499179A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6320066B2 (enrdf_load_stackoverflow
Inventor
Takeshi Sakai
Masaharu Shimada
Yoshibumi Kato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Original Assignee
Fujitsu Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, NEC Corp, Nippon Telegraph and Telephone Corp, Nippon Electric Co Ltd filed Critical Fujitsu Ltd
Priority to JP2499179A priority Critical patent/JPS55118118A/ja
Publication of JPS55118118A publication Critical patent/JPS55118118A/ja
Publication of JPS6320066B2 publication Critical patent/JPS6320066B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Dc Digital Transmission (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP2499179A 1979-03-02 1979-03-02 Integrated circuit formed intra-office line interface Granted JPS55118118A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2499179A JPS55118118A (en) 1979-03-02 1979-03-02 Integrated circuit formed intra-office line interface

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2499179A JPS55118118A (en) 1979-03-02 1979-03-02 Integrated circuit formed intra-office line interface

Publications (2)

Publication Number Publication Date
JPS55118118A true JPS55118118A (en) 1980-09-10
JPS6320066B2 JPS6320066B2 (enrdf_load_stackoverflow) 1988-04-26

Family

ID=12153436

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2499179A Granted JPS55118118A (en) 1979-03-02 1979-03-02 Integrated circuit formed intra-office line interface

Country Status (1)

Country Link
JP (1) JPS55118118A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5687176A (en) * 1995-06-09 1997-11-11 Hubbell Incorporated Zero byte substitution method and apparatus for telecommunications equipment

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5687176A (en) * 1995-06-09 1997-11-11 Hubbell Incorporated Zero byte substitution method and apparatus for telecommunications equipment

Also Published As

Publication number Publication date
JPS6320066B2 (enrdf_load_stackoverflow) 1988-04-26

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