JPS55117299A - Method of fabricating printed circuit board by noovoltage copper plating - Google Patents

Method of fabricating printed circuit board by noovoltage copper plating

Info

Publication number
JPS55117299A
JPS55117299A JP2448679A JP2448679A JPS55117299A JP S55117299 A JPS55117299 A JP S55117299A JP 2448679 A JP2448679 A JP 2448679A JP 2448679 A JP2448679 A JP 2448679A JP S55117299 A JPS55117299 A JP S55117299A
Authority
JP
Japan
Prior art keywords
noovoltage
circuit board
printed circuit
copper plating
fabricating printed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2448679A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6349397B2 (enrdf_load_stackoverflow
Inventor
Mineo Kawamoto
Kanji Murakami
Youichi Matsuda
Motoyo Wajima
Yasusada Morishita
Toyofusa Yoshimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP2448679A priority Critical patent/JPS55117299A/ja
Publication of JPS55117299A publication Critical patent/JPS55117299A/ja
Publication of JPS6349397B2 publication Critical patent/JPS6349397B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Chemically Coating (AREA)
  • Manufacturing Of Printed Wiring (AREA)
JP2448679A 1979-03-05 1979-03-05 Method of fabricating printed circuit board by noovoltage copper plating Granted JPS55117299A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2448679A JPS55117299A (en) 1979-03-05 1979-03-05 Method of fabricating printed circuit board by noovoltage copper plating

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2448679A JPS55117299A (en) 1979-03-05 1979-03-05 Method of fabricating printed circuit board by noovoltage copper plating

Publications (2)

Publication Number Publication Date
JPS55117299A true JPS55117299A (en) 1980-09-09
JPS6349397B2 JPS6349397B2 (enrdf_load_stackoverflow) 1988-10-04

Family

ID=12139508

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2448679A Granted JPS55117299A (en) 1979-03-05 1979-03-05 Method of fabricating printed circuit board by noovoltage copper plating

Country Status (1)

Country Link
JP (1) JPS55117299A (enrdf_load_stackoverflow)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59119786A (ja) * 1982-12-27 1984-07-11 イビデン株式会社 プリント配線板の無電解銅めっき方法
JPS60254787A (ja) * 1984-05-31 1985-12-16 日立コンデンサ株式会社 印刷配線板の製造方法
JPS60254788A (ja) * 1984-05-31 1985-12-16 日立エーアイシー株式会社 プリント配線板の製造方法
JPS63166973A (ja) * 1986-12-27 1988-07-11 Sankyo Kasei Kk 回路基板等の成形品の製法
US4865877A (en) * 1986-11-08 1989-09-12 Matsushita Electric Works, Ltd. Method for roughening ceramic substrate surface and method for manufacturing printed circuit board using surface-roughened ceramic substrate
WO2004031447A1 (ja) * 2002-10-07 2004-04-15 Tokyo Electron Limited 無電解メッキ方法
JP2008174817A (ja) * 2007-01-22 2008-07-31 C Uyemura & Co Ltd 置換錫合金めっき皮膜の形成方法、置換錫合金めっき浴及びめっき性能の維持方法

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59119786A (ja) * 1982-12-27 1984-07-11 イビデン株式会社 プリント配線板の無電解銅めっき方法
JPS60254787A (ja) * 1984-05-31 1985-12-16 日立コンデンサ株式会社 印刷配線板の製造方法
JPS60254788A (ja) * 1984-05-31 1985-12-16 日立エーアイシー株式会社 プリント配線板の製造方法
US4865877A (en) * 1986-11-08 1989-09-12 Matsushita Electric Works, Ltd. Method for roughening ceramic substrate surface and method for manufacturing printed circuit board using surface-roughened ceramic substrate
JPS63166973A (ja) * 1986-12-27 1988-07-11 Sankyo Kasei Kk 回路基板等の成形品の製法
WO2004031447A1 (ja) * 2002-10-07 2004-04-15 Tokyo Electron Limited 無電解メッキ方法
JP2008174817A (ja) * 2007-01-22 2008-07-31 C Uyemura & Co Ltd 置換錫合金めっき皮膜の形成方法、置換錫合金めっき浴及びめっき性能の維持方法

Also Published As

Publication number Publication date
JPS6349397B2 (enrdf_load_stackoverflow) 1988-10-04

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