JPS55108039A - Information transmission system for duplex system computer system - Google Patents

Information transmission system for duplex system computer system

Info

Publication number
JPS55108039A
JPS55108039A JP1497479A JP1497479A JPS55108039A JP S55108039 A JPS55108039 A JP S55108039A JP 1497479 A JP1497479 A JP 1497479A JP 1497479 A JP1497479 A JP 1497479A JP S55108039 A JPS55108039 A JP S55108039A
Authority
JP
Japan
Prior art keywords
transmission information
unit
transmission
computer
information
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1497479A
Other languages
Japanese (ja)
Inventor
Yasuo Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP1497479A priority Critical patent/JPS55108039A/en
Publication of JPS55108039A publication Critical patent/JPS55108039A/en
Pending legal-status Critical Current

Links

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  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)
  • Computer And Data Communications (AREA)

Abstract

PURPOSE: To enable to keep the continuity of status even with the computer selected, by giving the transmission information status managing the transmission information table and the state of transmission, in the common memory between the two sets of master computers.
CONSTITUTION: The master computer unit 1 forms the transmission information of unit control when the event to perform the control of unit is taken place to the slave station computer unit 2, and the information is stored in the transmission information table 15 in the common memory. This information is fed sequentially to the transmission area and fed to the unit 2 via the computer linkage unit 7 and the MODEM8. In this case, the transmission information status table 16 is formed in the common memory, the state of transmission is managed, and the renewal of the transmission information in the waiting table is controlled. By managing the transmission information with the tables 15 and 16, even after the selective operation at the occurrence of failure of one set out of CPU3 and 4, the transmission information can continuously be transmitted to the unit 2.
COPYRIGHT: (C)1980,JPO&Japio
JP1497479A 1979-02-14 1979-02-14 Information transmission system for duplex system computer system Pending JPS55108039A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1497479A JPS55108039A (en) 1979-02-14 1979-02-14 Information transmission system for duplex system computer system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1497479A JPS55108039A (en) 1979-02-14 1979-02-14 Information transmission system for duplex system computer system

Publications (1)

Publication Number Publication Date
JPS55108039A true JPS55108039A (en) 1980-08-19

Family

ID=11875942

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1497479A Pending JPS55108039A (en) 1979-02-14 1979-02-14 Information transmission system for duplex system computer system

Country Status (1)

Country Link
JP (1) JPS55108039A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5872267A (en) * 1981-10-26 1983-04-30 Hitachi Ltd Computer device for supervising dual system status

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5872267A (en) * 1981-10-26 1983-04-30 Hitachi Ltd Computer device for supervising dual system status
JPH0320780B2 (en) * 1981-10-26 1991-03-20 Hitachi Ltd

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