JPS55103755A - Mos integrated circuit device - Google Patents

Mos integrated circuit device

Info

Publication number
JPS55103755A
JPS55103755A JP1015579A JP1015579A JPS55103755A JP S55103755 A JPS55103755 A JP S55103755A JP 1015579 A JP1015579 A JP 1015579A JP 1015579 A JP1015579 A JP 1015579A JP S55103755 A JPS55103755 A JP S55103755A
Authority
JP
Japan
Prior art keywords
mos
variation
integrated circuit
circuit device
short
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1015579A
Other languages
Japanese (ja)
Inventor
Keizo Kobayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP1015579A priority Critical patent/JPS55103755A/en
Publication of JPS55103755A publication Critical patent/JPS55103755A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To stabilize operational characteristics by using diffusion matching type MOS transistor for the circuits which are susceptible to characteristic variation due to the threshold voltage variation and using usual MOS transistor for other parts in a MOS integrated circuit device whose channel length is 2mum or less. CONSTITUTION:In the short 4 channel region whose channel length is 2mum or less, threshold voltage VT of the diffusion matching MOS transistor has a smaller variation compard with VT of the short channel MOS Tr, and further, VT of the neghboring DSA.MOS Tr has also a small variation. Since the variation of VT in the short channel MOS Tr is determined by the processing precision, the variation of VT in the neighbring short channel MOS Tr becomes large. Consequently, by using DSA. MOS Trs for circuits (F.F., etc.) which are susceptible to VT variation, an integrated circuit device exhibiting stable operational characteristics can be obtained.
JP1015579A 1979-01-31 1979-01-31 Mos integrated circuit device Pending JPS55103755A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1015579A JPS55103755A (en) 1979-01-31 1979-01-31 Mos integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1015579A JPS55103755A (en) 1979-01-31 1979-01-31 Mos integrated circuit device

Publications (1)

Publication Number Publication Date
JPS55103755A true JPS55103755A (en) 1980-08-08

Family

ID=11742378

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1015579A Pending JPS55103755A (en) 1979-01-31 1979-01-31 Mos integrated circuit device

Country Status (1)

Country Link
JP (1) JPS55103755A (en)

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