JPS5510279A - Generator for timing clock pulse of modem - Google Patents

Generator for timing clock pulse of modem

Info

Publication number
JPS5510279A
JPS5510279A JP8339478A JP8339478A JPS5510279A JP S5510279 A JPS5510279 A JP S5510279A JP 8339478 A JP8339478 A JP 8339478A JP 8339478 A JP8339478 A JP 8339478A JP S5510279 A JPS5510279 A JP S5510279A
Authority
JP
Japan
Prior art keywords
counter
modem
circuit
outputs
generator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8339478A
Other languages
Japanese (ja)
Other versions
JPS5943018B2 (en
Inventor
Sumio Ogawara
Hidekazu Sugi
Kaname Sawada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic System Solutions Japan Co Ltd
Original Assignee
Matsushita Graphic Communication Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Graphic Communication Systems Inc filed Critical Matsushita Graphic Communication Systems Inc
Priority to JP53083394A priority Critical patent/JPS5943018B2/en
Publication of JPS5510279A publication Critical patent/JPS5510279A/en
Publication of JPS5943018B2 publication Critical patent/JPS5943018B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To generate the timing pulse of a modem by a simple constitution by starting the operation of a counter on the basis of preset data by the outputs of a differentiating circuit and counter. CONSTITUTION:Differentiating circuit 2 differentiates a signal sent from the transmission side and oscillator circuit 3 outputs a higher-frequency and more-stable clock signal. Then, counter 5 counts the clock signal, control circuit 7 changes the value of data preset to counter 5, and gate circuit 4 starts the operation of counter 5 on the basis of the data preset by the outputs of circuit 2 and counter 5. Consequently, the timing clock pulses of the modem can be generated by a simple constitution.
JP53083394A 1978-07-07 1978-07-07 Modem timing clock pulse generator Expired JPS5943018B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53083394A JPS5943018B2 (en) 1978-07-07 1978-07-07 Modem timing clock pulse generator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53083394A JPS5943018B2 (en) 1978-07-07 1978-07-07 Modem timing clock pulse generator

Publications (2)

Publication Number Publication Date
JPS5510279A true JPS5510279A (en) 1980-01-24
JPS5943018B2 JPS5943018B2 (en) 1984-10-19

Family

ID=13801206

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53083394A Expired JPS5943018B2 (en) 1978-07-07 1978-07-07 Modem timing clock pulse generator

Country Status (1)

Country Link
JP (1) JPS5943018B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63129709A (en) * 1986-11-19 1988-06-02 Matsushita Electric Ind Co Ltd Counter

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63129709A (en) * 1986-11-19 1988-06-02 Matsushita Electric Ind Co Ltd Counter

Also Published As

Publication number Publication date
JPS5943018B2 (en) 1984-10-19

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