JPS55101197A - Driving circuit of charge transfer element - Google Patents

Driving circuit of charge transfer element

Info

Publication number
JPS55101197A
JPS55101197A JP955779A JP955779A JPS55101197A JP S55101197 A JPS55101197 A JP S55101197A JP 955779 A JP955779 A JP 955779A JP 955779 A JP955779 A JP 955779A JP S55101197 A JPS55101197 A JP S55101197A
Authority
JP
Japan
Prior art keywords
frequency divider
divider circuit
circuit
driving circuit
inversion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP955779A
Other languages
Japanese (ja)
Other versions
JPS6045517B2 (en
Inventor
Kazuyasu Fujishima
Michihiro Yamada
Satoshi Takano
Tetsuo Tada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP54009557A priority Critical patent/JPS6045517B2/en
Publication of JPS55101197A publication Critical patent/JPS55101197A/en
Publication of JPS6045517B2 publication Critical patent/JPS6045517B2/en
Expired legal-status Critical Current

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Abstract

PURPOSE: To prevent a short-circuit current from a power source to the earth to reduce power consumption of a frequency divider circuit by using the output clock signal of the frequency divider circuit as the control signal of the frequency divider circuit.
CONSTITUTION: Input clock pulse ϕM and inversion ϕM are divided by a frequency divider circuit consisting of MISFETs, and four-phase clocks ϕ1Wϕ4 different from one another by 90° in phase are outputted to drive a CCD. In this case, the output clock signal obtained by frequency division of pulse ϕM and inversion ϕM is used as the control signal of the frequency divider circuit. As a result, series FETs of the frequency divider circuit become conductive simultaneously, so that a short- circuit current can be prevented from being flowed to power source VDD.
COPYRIGHT: (C)1980,JPO&Japio
JP54009557A 1979-01-29 1979-01-29 Charge transfer device drive circuit Expired JPS6045517B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54009557A JPS6045517B2 (en) 1979-01-29 1979-01-29 Charge transfer device drive circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54009557A JPS6045517B2 (en) 1979-01-29 1979-01-29 Charge transfer device drive circuit

Publications (2)

Publication Number Publication Date
JPS55101197A true JPS55101197A (en) 1980-08-01
JPS6045517B2 JPS6045517B2 (en) 1985-10-09

Family

ID=11723576

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54009557A Expired JPS6045517B2 (en) 1979-01-29 1979-01-29 Charge transfer device drive circuit

Country Status (1)

Country Link
JP (1) JPS6045517B2 (en)

Also Published As

Publication number Publication date
JPS6045517B2 (en) 1985-10-09

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