JPS5486482A - Method of etching silicon dioxide - Google Patents

Method of etching silicon dioxide

Info

Publication number
JPS5486482A
JPS5486482A JP11753578A JP11753578A JPS5486482A JP S5486482 A JPS5486482 A JP S5486482A JP 11753578 A JP11753578 A JP 11753578A JP 11753578 A JP11753578 A JP 11753578A JP S5486482 A JPS5486482 A JP S5486482A
Authority
JP
Japan
Prior art keywords
silicon dioxide
etching silicon
etching
dioxide
silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11753578A
Other languages
English (en)
Other versions
JPS5732502B2 (ja
Inventor
Arubaato Kuraaku Harorudo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPS5486482A publication Critical patent/JPS5486482A/ja
Publication of JPS5732502B2 publication Critical patent/JPS5732502B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • H01L21/31116Etching inorganic layers by chemical means by dry-etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3081Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their composition, e.g. multilayer masks, materials

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Inorganic Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Drying Of Semiconductors (AREA)
  • Devices For Post-Treatments, Processing, Supply, Discharge, And Other Processes (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
JP11753578A 1977-12-19 1978-09-26 Method of etching silicon dioxide Granted JPS5486482A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/861,796 US4180432A (en) 1977-12-19 1977-12-19 Process for etching SiO2 layers to silicon in a moderate vacuum gas plasma

Publications (2)

Publication Number Publication Date
JPS5486482A true JPS5486482A (en) 1979-07-10
JPS5732502B2 JPS5732502B2 (ja) 1982-07-12

Family

ID=25336787

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11753578A Granted JPS5486482A (en) 1977-12-19 1978-09-26 Method of etching silicon dioxide

Country Status (4)

Country Link
US (1) US4180432A (ja)
EP (1) EP0002503B1 (ja)
JP (1) JPS5486482A (ja)
DE (1) DE2861773D1 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02114524A (ja) * 1988-10-24 1990-04-26 Fujitsu Ltd 半導体装置の製造方法

Families Citing this family (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5789226A (en) * 1980-11-19 1982-06-03 Ibm Method of etching silicon nitride layer
US4341594A (en) * 1981-02-27 1982-07-27 General Electric Company Method of restoring semiconductor device performance
US4353777A (en) * 1981-04-20 1982-10-12 Lfe Corporation Selective plasma polysilicon etching
US4534826A (en) * 1983-12-29 1985-08-13 Ibm Corporation Trench etch process for dielectric isolation
US4724043A (en) * 1984-09-04 1988-02-09 International Business Machines Corporation Process for forming a master mold for optical storage disks
US4708767A (en) * 1984-10-05 1987-11-24 Signetics Corporation Method for providing a semiconductor device with planarized contacts
US4615763A (en) * 1985-01-02 1986-10-07 International Business Machines Corporation Roughening surface of a substrate
CA1281307C (en) * 1985-04-01 1991-03-12 Allan R. Knoll Method of plasma etching a substrate with a gaseous organohalide compound
US4624739A (en) * 1985-08-09 1986-11-25 International Business Machines Corporation Process using dry etchant to avoid mask-and-etch cycle
US4836886A (en) * 1987-11-23 1989-06-06 International Business Machines Corporation Binary chlorofluorocarbon chemistry for plasma etching
US5225036A (en) * 1988-03-28 1993-07-06 Kabushiki Kaisha Toshiba Method of manufacturing semiconductor device
JP2536635B2 (ja) * 1989-03-09 1996-09-18 三菱電機株式会社 ポリシリコンパッドlocos法による素子分離方法
DE4210030A1 (de) * 1992-03-27 1993-09-30 Willi Weis Verbrennungsmotor mit reduzierter Kolbengleitgeschwindigkeit
US5880036A (en) 1992-06-15 1999-03-09 Micron Technology, Inc. Method for enhancing oxide to nitride selectivity through the use of independent heat control
US5286344A (en) * 1992-06-15 1994-02-15 Micron Technology, Inc. Process for selectively etching a layer of silicon dioxide on an underlying stop layer of silicon nitride
JP3252518B2 (ja) * 1993-03-19 2002-02-04 ソニー株式会社 ドライエッチング方法
JPH07263415A (ja) * 1994-03-18 1995-10-13 Fujitsu Ltd 半導体装置の製造方法
US5983828A (en) * 1995-10-13 1999-11-16 Mattson Technology, Inc. Apparatus and method for pulsed plasma processing of a semiconductor substrate
US6794301B2 (en) 1995-10-13 2004-09-21 Mattson Technology, Inc. Pulsed plasma processing of semiconductor substrates
US6253704B1 (en) 1995-10-13 2001-07-03 Mattson Technology, Inc. Apparatus and method for pulsed plasma processing of a semiconductor substrate
US5922622A (en) * 1996-09-03 1999-07-13 Vanguard International Semiconductor Corporation Pattern formation of silicon nitride
US5972796A (en) * 1996-12-12 1999-10-26 Texas Instruments Incorporated In-situ barc and nitride etch process
CN1149646C (zh) 1997-04-28 2004-05-12 芝浦机械电子装置股份有限公司 真空处理方法及其装置
US6074951A (en) * 1997-05-29 2000-06-13 International Business Machines Corporation Vapor phase etching of oxide masked by resist or masking material
US6483157B1 (en) * 1997-06-20 2002-11-19 Advanced Micro Devices, Inc. Asymmetrical transistor having a barrier-incorporated gate oxide and a graded implant only in the drain-side junction area
TW365700B (en) * 1997-10-17 1999-08-01 Taiwan Semiconductor Mfg Co Ltd Method of manufacture of plugs
US6387287B1 (en) 1998-03-27 2002-05-14 Applied Materials, Inc. Process for etching oxide using a hexafluorobutadiene and manifesting a wide process window
US6602434B1 (en) 1998-03-27 2003-08-05 Applied Materials, Inc. Process for etching oxide using hexafluorobutadiene or related fluorocarbons and manifesting a wide process window
JPH11354499A (ja) 1998-04-07 1999-12-24 Oki Electric Ind Co Ltd コンタクトホール等の形成方法
US6274442B1 (en) 1998-07-15 2001-08-14 Advanced Micro Devices, Inc. Transistor having a nitrogen incorporated epitaxially grown gate dielectric and method of making same
TW398053B (en) * 1998-07-31 2000-07-11 United Microelectronics Corp Manufacturing of shallow trench isolation
JP2000232107A (ja) * 1999-02-12 2000-08-22 Mitsubishi Electric Corp 半導体装置のパターン形成方法
US6849193B2 (en) * 1999-03-25 2005-02-01 Hoiman Hung Highly selective process for etching oxide over nitride using hexafluorobutadiene
US9495397B2 (en) 2013-03-12 2016-11-15 Intel Corporation Sensor associated data of multiple devices based computing
JP6767298B2 (ja) 2017-03-31 2020-10-14 大王製紙株式会社 フィルム包装ティシュー

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3615956A (en) * 1969-03-27 1971-10-26 Signetics Corp Gas plasma vapor etching process
US3867216A (en) * 1972-05-12 1975-02-18 Adir Jacob Process and material for manufacturing semiconductor devices
US3795557A (en) * 1972-05-12 1974-03-05 Lfe Corp Process and material for manufacturing semiconductor devices
US3880684A (en) * 1973-08-03 1975-04-29 Mitsubishi Electric Corp Process for preparing semiconductor
DE2547792C3 (de) * 1974-10-25 1978-08-31 Hitachi, Ltd., Tokio Verfahren zur Herstellung eines Halbleiterbauelementes
DE2536718C3 (de) * 1975-08-18 1978-04-27 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zur Herstellung geätzter Strukturen in Festkörperoberflächen durch Ionenätzung und Bestrahlungsmaske zur Verwendung in diesem Verfahren
JPS5291650A (en) * 1976-01-29 1977-08-02 Toshiba Corp Continuous gas plasma etching apparatus
US4092442A (en) * 1976-12-30 1978-05-30 International Business Machines Corporation Method of depositing thin films utilizing a polyimide mask

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02114524A (ja) * 1988-10-24 1990-04-26 Fujitsu Ltd 半導体装置の製造方法

Also Published As

Publication number Publication date
JPS5732502B2 (ja) 1982-07-12
EP0002503A1 (de) 1979-06-27
DE2861773D1 (en) 1982-06-09
US4180432A (en) 1979-12-25
EP0002503B1 (de) 1982-04-28

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