JPS5470705A - Exchange control system - Google Patents

Exchange control system

Info

Publication number
JPS5470705A
JPS5470705A JP13761477A JP13761477A JPS5470705A JP S5470705 A JPS5470705 A JP S5470705A JP 13761477 A JP13761477 A JP 13761477A JP 13761477 A JP13761477 A JP 13761477A JP S5470705 A JPS5470705 A JP S5470705A
Authority
JP
Japan
Prior art keywords
circuit
mpx
module
dmpx25
constitution
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13761477A
Other languages
Japanese (ja)
Other versions
JPS6121038B2 (en
Inventor
Akio Moridera
Michimitsu Hattori
Yukio Ozawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP13761477A priority Critical patent/JPS5470705A/en
Publication of JPS5470705A publication Critical patent/JPS5470705A/en
Publication of JPS6121038B2 publication Critical patent/JPS6121038B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
    • H04Q11/0407—Selecting arrangements for multiplex systems for time-division multiplexing using a stored programme control

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)

Abstract

PURPOSE:To omit the control lines between the processors and thus to simplify the constitution by dividing the switching circuit network into more than one module with the processors provided to each module. CONSTITUTION:The aural signal is supplied to MPX/DMPX25 via multiplexer 22 to be then combined to module 40 after multiplication and division. In this case, the control information is transferred between signal processor 23 and circuit 40 through the specified channel and via branching circuit 24 of the output/input terminal in circuit 22. The specified channel is branched (27) off at circuit 40 and then combined to processor 32. Circuit 32 controls memory switch 34 of exchange circuit part 35 to have the exchange action. The communication information given from other circuit 40 undergoes the multiple isolation through MPX/DMPX26, and the PCM signal of the output receives the multiple isolation through MPX/DMPX25 to be transmitted to desired circuit 23.
JP13761477A 1977-11-16 1977-11-16 Exchange control system Granted JPS5470705A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13761477A JPS5470705A (en) 1977-11-16 1977-11-16 Exchange control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13761477A JPS5470705A (en) 1977-11-16 1977-11-16 Exchange control system

Publications (2)

Publication Number Publication Date
JPS5470705A true JPS5470705A (en) 1979-06-06
JPS6121038B2 JPS6121038B2 (en) 1986-05-24

Family

ID=15202785

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13761477A Granted JPS5470705A (en) 1977-11-16 1977-11-16 Exchange control system

Country Status (1)

Country Link
JP (1) JPS5470705A (en)

Also Published As

Publication number Publication date
JPS6121038B2 (en) 1986-05-24

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