JPS5467751A - Phase synchronizing loop circuit - Google Patents

Phase synchronizing loop circuit

Info

Publication number
JPS5467751A
JPS5467751A JP13499677A JP13499677A JPS5467751A JP S5467751 A JPS5467751 A JP S5467751A JP 13499677 A JP13499677 A JP 13499677A JP 13499677 A JP13499677 A JP 13499677A JP S5467751 A JPS5467751 A JP S5467751A
Authority
JP
Japan
Prior art keywords
circuit
frequency divider
variable frequency
signals
digital phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13499677A
Other languages
Japanese (ja)
Inventor
Tadashi Kojima
Kouichirou Satou
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP13499677A priority Critical patent/JPS5467751A/en
Publication of JPS5467751A publication Critical patent/JPS5467751A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/191Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using at least two different signals from the frequency divider or the counter for determining the time difference

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

PURPOSE:To obtain a phase synchronizing loop circuit which can perform simply and surely the function check for a digital phase comparator and does not require to provide additionally pins for checking specially in case that this circuit is made into an IC. CONSTITUTION:Switching circuit 16 is provided between reference oscillator 11, variable frequency divider 13 and digital phase compartor 14a, and signals supplied to each input terminal of digital phase comparator 14a are switched from fr and fo signals of reference oscillator 11 and variable frequency divider 13 to signals for checking by giving switching instruction signals to this switching circuit 16 from switching instruction circuit 17 utilizing the external data input line which is provided for setting the frequency division ratio of variable frequency divider 13. Here, in case that reference oscillator 11, variable frequency divider 13 and digital phase comparator 14a are made into an IC in one body, switching circuit 16 and switching instruction circuit 17 are incorporated in the IC.
JP13499677A 1977-11-10 1977-11-10 Phase synchronizing loop circuit Pending JPS5467751A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13499677A JPS5467751A (en) 1977-11-10 1977-11-10 Phase synchronizing loop circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13499677A JPS5467751A (en) 1977-11-10 1977-11-10 Phase synchronizing loop circuit

Publications (1)

Publication Number Publication Date
JPS5467751A true JPS5467751A (en) 1979-05-31

Family

ID=15141491

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13499677A Pending JPS5467751A (en) 1977-11-10 1977-11-10 Phase synchronizing loop circuit

Country Status (1)

Country Link
JP (1) JPS5467751A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6436184A (en) * 1987-07-13 1989-02-07 Rca Licensing Corp Phase locked loop apparatus
NL9500491A (en) * 1994-12-15 1996-02-01 Ericsson Radio Systems Bv Phase-locked loop for rectangular waveform signals.

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6436184A (en) * 1987-07-13 1989-02-07 Rca Licensing Corp Phase locked loop apparatus
NL9500491A (en) * 1994-12-15 1996-02-01 Ericsson Radio Systems Bv Phase-locked loop for rectangular waveform signals.
WO1996019043A1 (en) * 1994-12-15 1996-06-20 Ericsson Radio Systems B.V. Phase-locked loop for signals having rectangular waveforms

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