JPS5447569A - Packaging method of semiconductor device - Google Patents

Packaging method of semiconductor device

Info

Publication number
JPS5447569A
JPS5447569A JP11417077A JP11417077A JPS5447569A JP S5447569 A JPS5447569 A JP S5447569A JP 11417077 A JP11417077 A JP 11417077A JP 11417077 A JP11417077 A JP 11417077A JP S5447569 A JPS5447569 A JP S5447569A
Authority
JP
Japan
Prior art keywords
semiconductor device
layer
wiring substrate
bonding
packaging method
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11417077A
Other languages
Japanese (ja)
Other versions
JPS5716739B2 (en
Inventor
Hideki Tsunetsugu
Takaaki Osaki
Kunio Moriya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP11417077A priority Critical patent/JPS5447569A/en
Publication of JPS5447569A publication Critical patent/JPS5447569A/en
Publication of JPS5716739B2 publication Critical patent/JPS5716739B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member

Landscapes

  • Die Bonding (AREA)

Abstract

PURPOSE: To obtined high strength and stable securing by providing composite layer of Ti and Au on the back of a semiconductor device and bonding the surface thereof to a wiring substrate at the time of bonding the device to the wiring substrate.
CONSTITUTION: Composite films composed of Ti as a first layer and Au as a second layer are vapor-deposition-formed on the back of a semiconductor device 1 and the surface thereof is bonded to the baked conductor layer 4 of a thick film provided to a wiring substrate 5 by using a brazing material 3 of 2.5%Ag-Pb alloy. Then, the bond strength becomes as high as 2 to 3 kg/mm2 or higher and the decrease in the bond stength is not observed even if the device is subjected to temperature cycles of 30 minutes at -65°C to 125°C
COPYRIGHT: (C)1979,JPO&Japio
JP11417077A 1977-09-22 1977-09-22 Packaging method of semiconductor device Granted JPS5447569A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11417077A JPS5447569A (en) 1977-09-22 1977-09-22 Packaging method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11417077A JPS5447569A (en) 1977-09-22 1977-09-22 Packaging method of semiconductor device

Publications (2)

Publication Number Publication Date
JPS5447569A true JPS5447569A (en) 1979-04-14
JPS5716739B2 JPS5716739B2 (en) 1982-04-07

Family

ID=14630916

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11417077A Granted JPS5447569A (en) 1977-09-22 1977-09-22 Packaging method of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5447569A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4940065A (en) * 1972-08-17 1974-04-15

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4940065A (en) * 1972-08-17 1974-04-15

Also Published As

Publication number Publication date
JPS5716739B2 (en) 1982-04-07

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