JPS5443628A - Detection processing method for exceptional address conversion - Google Patents

Detection processing method for exceptional address conversion

Info

Publication number
JPS5443628A
JPS5443628A JP11028077A JP11028077A JPS5443628A JP S5443628 A JPS5443628 A JP S5443628A JP 11028077 A JP11028077 A JP 11028077A JP 11028077 A JP11028077 A JP 11028077A JP S5443628 A JPS5443628 A JP S5443628A
Authority
JP
Japan
Prior art keywords
instruction
address conversion
translation
detection
conversion exception
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11028077A
Other languages
Japanese (ja)
Inventor
Shigeharu Matsuzaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP11028077A priority Critical patent/JPS5443628A/en
Publication of JPS5443628A publication Critical patent/JPS5443628A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To improve efficiency in processing when the length of an operand is long as to a translate-instruction process of an electronic computer with a virtual memory, by accelerating the processing speed of the detection of an address conversion exception through the dividing process of the translation instruction.
CONSTITUTION: During the process of an address conversion exception at the time of the translation-instruction process through an electronic computer with a virtual memory, the updates of registers and memories are inhibited; and then, translation instruction OP1, read from buffer register REG1 which holds data, is applied to one- side terminals of comparator circuits COMPs 1 to 4 via arithmetic-data input register REG2, and difference 1'x until page-cross point PC between instructions OP1 and OP2 is applied to the other-side terminals of circuits COMP1 to 4 via arithmetic input register REG3. At this time, if an input surpasses page-cross point PC, the memory access of it is attained and the detection of an address conversion exception causes an interruption; and then, the instruction is excuted after checking the contents of instruction OP1.
COPYRIGHT: (C)1979,JPO&Japio
JP11028077A 1977-09-13 1977-09-13 Detection processing method for exceptional address conversion Pending JPS5443628A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11028077A JPS5443628A (en) 1977-09-13 1977-09-13 Detection processing method for exceptional address conversion

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11028077A JPS5443628A (en) 1977-09-13 1977-09-13 Detection processing method for exceptional address conversion

Publications (1)

Publication Number Publication Date
JPS5443628A true JPS5443628A (en) 1979-04-06

Family

ID=14531678

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11028077A Pending JPS5443628A (en) 1977-09-13 1977-09-13 Detection processing method for exceptional address conversion

Country Status (1)

Country Link
JP (1) JPS5443628A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6104845A (en) * 1995-06-27 2000-08-15 Wizcom Technologies Ltd. Hand-held scanner with rotary position detector

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6104845A (en) * 1995-06-27 2000-08-15 Wizcom Technologies Ltd. Hand-held scanner with rotary position detector

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