JPS5437935B2 - - Google Patents
Info
- Publication number
- JPS5437935B2 JPS5437935B2 JP14585674A JP14585674A JPS5437935B2 JP S5437935 B2 JPS5437935 B2 JP S5437935B2 JP 14585674 A JP14585674 A JP 14585674A JP 14585674 A JP14585674 A JP 14585674A JP S5437935 B2 JPS5437935 B2 JP S5437935B2
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/22—Microcontrol or microprogram arrangements
- G06F9/226—Microinstruction function, e.g. input/output microinstruction; diagnostic microinstruction; microinstruction format
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/22—Means for limiting or controlling the pin/gate ratio
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/1731—Optimisation thereof
- H03K19/1732—Optimisation thereof by limitation or reduction of the pin/gate ratio
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- Computing Systems (AREA)
- Mathematical Physics (AREA)
- Computer Hardware Design (AREA)
- Executing Machine-Instructions (AREA)
- Static Random-Access Memory (AREA)
- Microcomputers (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE2364253A DE2364253A1 (de) | 1973-12-22 | 1973-12-22 | Schaltungsanordnung fuer mikroprogrammierte geraete der datenverarbeitung |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5097229A JPS5097229A (ja) | 1975-08-02 |
JPS5437935B2 true JPS5437935B2 (ja) | 1979-11-17 |
Family
ID=5901748
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14585674A Expired JPS5437935B2 (ja) | 1973-12-22 | 1974-12-20 |
Country Status (7)
Country | Link |
---|---|
US (1) | US4028682A (ja) |
JP (1) | JPS5437935B2 (ja) |
DE (1) | DE2364253A1 (ja) |
FR (1) | FR2255653B1 (ja) |
GB (1) | GB1469297A (ja) |
IT (1) | IT1027901B (ja) |
NL (1) | NL170466C (ja) |
Families Citing this family (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2554425C3 (de) * | 1975-12-03 | 1984-01-12 | Siemens AG, 1000 Berlin und 8000 München | Anordnung zum gegenseitigen Anpassen von Steuersignale austauschenden Geräten |
US4155118A (en) * | 1977-09-20 | 1979-05-15 | Burroughs Corporation | Organization for an integrated circuit calculator/controller |
CH625934B (fr) * | 1977-11-11 | Ebauches Electroniques Sa | Piece d'horlogerie electronique presentant une borne servant a l'entree et a la sortie de signaux. | |
US4349870A (en) * | 1979-09-05 | 1982-09-14 | Motorola, Inc. | Microcomputer with programmable multi-function port |
GB2079492B (en) * | 1980-06-25 | 1984-06-06 | Yokogawa Electric Works Ltd | Programmable controller |
JPS6041364B2 (ja) * | 1980-08-29 | 1985-09-17 | 富士通株式会社 | 出力バッファ回路 |
DE3133579A1 (de) * | 1981-08-25 | 1983-03-24 | Siemens AG, 1000 Berlin und 8000 München | Bus-steuer-einheit fuer ein vlsi-rechenwerk und verfahren zu ihrem betrieb |
US4509113A (en) * | 1982-02-02 | 1985-04-02 | International Business Machines Corporation | Peripheral interface adapter circuit for use in I/O controller card having multiple modes of operation |
JPS58220293A (ja) * | 1982-06-15 | 1983-12-21 | Nec Corp | 記憶装置 |
US4606003A (en) * | 1982-09-30 | 1986-08-12 | Pitney Bowes Inc. | Mailing system peripheral interface with replaceable prom for accessing memories |
US5154774A (en) * | 1985-09-19 | 1992-10-13 | Ugine Aciers De Chatillon Et Gueugnon | Process for acid pickling of stainless steel products |
JPH0715675B2 (ja) * | 1986-05-14 | 1995-02-22 | 日本電気株式会社 | シリアルインタ−フエ−ス回路 |
US5210846B1 (en) * | 1989-05-15 | 1999-06-29 | Dallas Semiconductor | One-wire bus architecture |
WO1990014626A1 (en) * | 1989-05-15 | 1990-11-29 | Dallas Semiconductor Corporation | Systems with data-token/one-wire-bus |
SE466726B (sv) * | 1990-08-20 | 1992-03-23 | Kent Lennartsson | Anordning vid distribuerat datorsystem |
JPH0778043A (ja) * | 1993-09-07 | 1995-03-20 | Olympus Optical Co Ltd | 画像処理装置 |
US6601130B1 (en) | 1998-11-24 | 2003-07-29 | Koninklijke Philips Electronics N.V. | Memory interface unit with programmable strobes to select different memory devices |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3462742A (en) * | 1966-12-21 | 1969-08-19 | Rca Corp | Computer system adapted to be constructed of large integrated circuit arrays |
US3582902A (en) * | 1968-12-30 | 1971-06-01 | Honeywell Inc | Data processing system having auxiliary register storage |
US3646522A (en) * | 1969-08-15 | 1972-02-29 | Interdata Inc | General purpose optimized microprogrammed miniprocessor |
US3651472A (en) * | 1970-03-04 | 1972-03-21 | Honeywell Inc | Multistate flip-flop element including a local memory for use in constructing a data processing system |
US3702988A (en) * | 1970-09-14 | 1972-11-14 | Ncr Co | Digital processor |
US3691538A (en) * | 1971-06-01 | 1972-09-12 | Ncr Co | Serial read-out memory system |
US3758761A (en) * | 1971-08-17 | 1973-09-11 | Texas Instruments Inc | Self-interconnecting/self-repairable electronic systems on a slice |
US3757306A (en) * | 1971-08-31 | 1973-09-04 | Texas Instruments Inc | Computing systems cpu |
IT964669B (it) * | 1972-07-14 | 1974-01-31 | Olivetti & Co Spa | Calcolatrice elettronica da tavolo con logica a circuiti mos |
US3821715A (en) * | 1973-01-22 | 1974-06-28 | Intel Corp | Memory system for a multi chip digital computer |
US3855577A (en) * | 1973-06-11 | 1974-12-17 | Texas Instruments Inc | Power saving circuit for calculator system |
US3938098A (en) * | 1973-12-26 | 1976-02-10 | Xerox Corporation | Input/output connection arrangement for microprogrammable computer |
-
1973
- 1973-12-22 DE DE2364253A patent/DE2364253A1/de active Pending
-
1974
- 1974-12-19 GB GB5499674A patent/GB1469297A/en not_active Expired
- 1974-12-20 JP JP14585674A patent/JPS5437935B2/ja not_active Expired
- 1974-12-20 IT IT30846/74A patent/IT1027901B/it active
- 1974-12-20 US US05/535,090 patent/US4028682A/en not_active Expired - Lifetime
- 1974-12-20 NL NLAANVRAGE7416723,A patent/NL170466C/xx not_active IP Right Cessation
- 1974-12-20 FR FR7442181A patent/FR2255653B1/fr not_active Expired
Also Published As
Publication number | Publication date |
---|---|
FR2255653B1 (ja) | 1976-12-31 |
NL7416723A (nl) | 1975-06-24 |
GB1469297A (en) | 1977-04-06 |
NL170466C (nl) | 1982-11-01 |
FR2255653A1 (ja) | 1975-07-18 |
US4028682A (en) | 1977-06-07 |
NL170466B (nl) | 1982-06-01 |
DE2364253A1 (de) | 1975-06-26 |
JPS5097229A (ja) | 1975-08-02 |
IT1027901B (it) | 1978-12-20 |