JPS5430778A - Lead wire for semiconductor device - Google Patents

Lead wire for semiconductor device

Info

Publication number
JPS5430778A
JPS5430778A JP9673777A JP9673777A JPS5430778A JP S5430778 A JPS5430778 A JP S5430778A JP 9673777 A JP9673777 A JP 9673777A JP 9673777 A JP9673777 A JP 9673777A JP S5430778 A JPS5430778 A JP S5430778A
Authority
JP
Japan
Prior art keywords
lead wire
semiconductor device
welded
semiconductor chip
corrosion resistance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9673777A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6123656B2 (enrdf_load_stackoverflow
Inventor
Hiroshi Ishibe
Nobuo Ogasa
Akira Otsuka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Priority to JP9673777A priority Critical patent/JPS5430778A/ja
Publication of JPS5430778A publication Critical patent/JPS5430778A/ja
Publication of JPS6123656B2 publication Critical patent/JPS6123656B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Conductive Materials (AREA)
JP9673777A 1977-08-11 1977-08-11 Lead wire for semiconductor device Granted JPS5430778A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9673777A JPS5430778A (en) 1977-08-11 1977-08-11 Lead wire for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9673777A JPS5430778A (en) 1977-08-11 1977-08-11 Lead wire for semiconductor device

Publications (2)

Publication Number Publication Date
JPS5430778A true JPS5430778A (en) 1979-03-07
JPS6123656B2 JPS6123656B2 (enrdf_load_stackoverflow) 1986-06-06

Family

ID=14173010

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9673777A Granted JPS5430778A (en) 1977-08-11 1977-08-11 Lead wire for semiconductor device

Country Status (1)

Country Link
JP (1) JPS5430778A (enrdf_load_stackoverflow)

Also Published As

Publication number Publication date
JPS6123656B2 (enrdf_load_stackoverflow) 1986-06-06

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