JPS54150044A - Mos random access memory - Google Patents

Mos random access memory

Info

Publication number
JPS54150044A
JPS54150044A JP5940278A JP5940278A JPS54150044A JP S54150044 A JPS54150044 A JP S54150044A JP 5940278 A JP5940278 A JP 5940278A JP 5940278 A JP5940278 A JP 5940278A JP S54150044 A JPS54150044 A JP S54150044A
Authority
JP
Japan
Prior art keywords
reading
potential variation
potential
secure
integration
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5940278A
Other languages
Japanese (ja)
Other versions
JPS5826113B2 (en
Inventor
Tatsuji Asakawa
Shinji Morozumi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP53059402A priority Critical patent/JPS5826113B2/en
Publication of JPS54150044A publication Critical patent/JPS54150044A/en
Publication of JPS5826113B2 publication Critical patent/JPS5826113B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only

Abstract

PURPOSE:To increase the reading velocity keeping a high degree of integration by providing the MOS transistor circuit to detect the potential variation of the reading bus line. CONSTITUTION:MOS transistor TrT17 is installed to detect the potential variation of reading bus line BL, and at the same time current supplying MOSTrT18 which functions to apply the positive feedback to BL order to secure a high-speed potential variation of BL is connected to BL. Furthermore, MOSTrT15 and T16 are connected in parallel to secure the control for setting up the gate potential of T18 at the precharge time of digit line D1 or BL. In such way, the potential variation of D1 at the reading time is detected at sensor circuit S1, the subsequent reading BL's potential variation is detected by T7, and then the positive feedback is applied to the BL potential by T18 to BL to secure a high speed. Furthermore, just one unit of these Tr's added newly is required to provide at BL, and the increment of the Tr's size does not affect substantially the high degree of integration for the RAM system as a whole.
JP53059402A 1978-05-18 1978-05-18 MOS random access memory Expired JPS5826113B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53059402A JPS5826113B2 (en) 1978-05-18 1978-05-18 MOS random access memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53059402A JPS5826113B2 (en) 1978-05-18 1978-05-18 MOS random access memory

Publications (2)

Publication Number Publication Date
JPS54150044A true JPS54150044A (en) 1979-11-24
JPS5826113B2 JPS5826113B2 (en) 1983-05-31

Family

ID=13112239

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53059402A Expired JPS5826113B2 (en) 1978-05-18 1978-05-18 MOS random access memory

Country Status (1)

Country Link
JP (1) JPS5826113B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4499559A (en) * 1980-05-22 1985-02-12 Fujitsu Limited Static RAM with bit-line-charging transistor

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5320828A (en) * 1976-08-11 1978-02-25 Hitachi Ltd Sense amplifier circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5320828A (en) * 1976-08-11 1978-02-25 Hitachi Ltd Sense amplifier circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4499559A (en) * 1980-05-22 1985-02-12 Fujitsu Limited Static RAM with bit-line-charging transistor

Also Published As

Publication number Publication date
JPS5826113B2 (en) 1983-05-31

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