JPS54141675A - Electronic watch - Google Patents

Electronic watch

Info

Publication number
JPS54141675A
JPS54141675A JP5049778A JP5049778A JPS54141675A JP S54141675 A JPS54141675 A JP S54141675A JP 5049778 A JP5049778 A JP 5049778A JP 5049778 A JP5049778 A JP 5049778A JP S54141675 A JPS54141675 A JP S54141675A
Authority
JP
Japan
Prior art keywords
voltage
drop
vdd
buzzer
becomes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5049778A
Other languages
Japanese (ja)
Inventor
Akio Shimazaki
Yoshihiko Hirayama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
Original Assignee
Seiko Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instruments Inc filed Critical Seiko Instruments Inc
Priority to JP5049778A priority Critical patent/JPS54141675A/en
Publication of JPS54141675A publication Critical patent/JPS54141675A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G04HOROLOGY
    • G04GELECTRONIC TIME-PIECES
    • G04G19/00Electric power supply circuits specially adapted for use in electronic time-pieces
    • G04G19/08Arrangements for preventing voltage drop due to overloading the power supply

Abstract

PURPOSE:To prevent the stop of watch function owing to the drop of battery voltage by detecting the drop of batery voltage from boosting voltage and inhibiting an alarm function. CONSTITUTION:When the ON resistance of an N channel transistor 4 is let to be r1, the input of an inverter 5 becomes VDD(R2 + r1)/(R1 + R2 + r1) which has voltage-divided the output VDD of a boosting circuit 3 and therefore the resistance values R1, R2 of resistances 1, 2 are beforehand so set that the relation of VDT(R2 + r1)/(R1 + R2 + r1) < VTH holds with the threshold voltage VTH of the inverter 5. Then, when the voltage VDD becomes lower than VDT, the output of a NAND gate 8 becomes ''H'' and the buzzer switch input 6 inhibits the buzzer irrespective of ''H'' of ''L''. Hence, the power consumption by the buzzer operation at the battery voltage drop may be suppressed and the stop of the watch function is prevented.
JP5049778A 1978-04-27 1978-04-27 Electronic watch Pending JPS54141675A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5049778A JPS54141675A (en) 1978-04-27 1978-04-27 Electronic watch

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5049778A JPS54141675A (en) 1978-04-27 1978-04-27 Electronic watch

Publications (1)

Publication Number Publication Date
JPS54141675A true JPS54141675A (en) 1979-11-05

Family

ID=12860567

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5049778A Pending JPS54141675A (en) 1978-04-27 1978-04-27 Electronic watch

Country Status (1)

Country Link
JP (1) JPS54141675A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5799184U (en) * 1980-12-08 1982-06-18

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5799184U (en) * 1980-12-08 1982-06-18

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