JPS54136181A - Test method for semiconductor memory unit of tri-state output - Google Patents

Test method for semiconductor memory unit of tri-state output

Info

Publication number
JPS54136181A
JPS54136181A JP4318878A JP4318878A JPS54136181A JP S54136181 A JPS54136181 A JP S54136181A JP 4318878 A JP4318878 A JP 4318878A JP 4318878 A JP4318878 A JP 4318878A JP S54136181 A JPS54136181 A JP S54136181A
Authority
JP
Japan
Prior art keywords
potential
logic level
memory unit
low
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4318878A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5718593B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html
Inventor
Hiromitsu Handa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP4318878A priority Critical patent/JPS54136181A/ja
Publication of JPS54136181A publication Critical patent/JPS54136181A/ja
Publication of JPS5718593B2 publication Critical patent/JPS5718593B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Testing Of Individual Semiconductor Devices (AREA)
  • Tests Of Electronic Circuits (AREA)
JP4318878A 1978-04-14 1978-04-14 Test method for semiconductor memory unit of tri-state output Granted JPS54136181A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4318878A JPS54136181A (en) 1978-04-14 1978-04-14 Test method for semiconductor memory unit of tri-state output

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4318878A JPS54136181A (en) 1978-04-14 1978-04-14 Test method for semiconductor memory unit of tri-state output

Publications (2)

Publication Number Publication Date
JPS54136181A true JPS54136181A (en) 1979-10-23
JPS5718593B2 JPS5718593B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1982-04-17

Family

ID=12656934

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4318878A Granted JPS54136181A (en) 1978-04-14 1978-04-14 Test method for semiconductor memory unit of tri-state output

Country Status (1)

Country Link
JP (1) JPS54136181A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59119284A (ja) * 1982-12-27 1984-07-10 Advantest Corp 論理回路の不良解析装置

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0743413B2 (ja) * 1984-05-09 1995-05-15 三菱電機株式会社 半導体試験装置
JPS6144371A (ja) * 1984-08-06 1986-03-04 Mitsubishi Electric Corp 半導体試験装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59119284A (ja) * 1982-12-27 1984-07-10 Advantest Corp 論理回路の不良解析装置

Also Published As

Publication number Publication date
JPS5718593B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1982-04-17

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