JPS54122087A - Simultaneous working method for both surfaces of wafer - Google Patents

Simultaneous working method for both surfaces of wafer

Info

Publication number
JPS54122087A
JPS54122087A JP2929178A JP2929178A JPS54122087A JP S54122087 A JPS54122087 A JP S54122087A JP 2929178 A JP2929178 A JP 2929178A JP 2929178 A JP2929178 A JP 2929178A JP S54122087 A JPS54122087 A JP S54122087A
Authority
JP
Japan
Prior art keywords
wafer
working method
simultaneous working
carrier
electric board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2929178A
Other languages
English (en)
Other versions
JPS5735575B2 (ja
Inventor
Junji Watanabe
Toshiro Karaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP2929178A priority Critical patent/JPS54122087A/ja
Publication of JPS54122087A publication Critical patent/JPS54122087A/ja
Publication of JPS5735575B2 publication Critical patent/JPS5735575B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Mechanical Treatment Of Semiconductor (AREA)
JP2929178A 1978-03-16 1978-03-16 Simultaneous working method for both surfaces of wafer Granted JPS54122087A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2929178A JPS54122087A (en) 1978-03-16 1978-03-16 Simultaneous working method for both surfaces of wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2929178A JPS54122087A (en) 1978-03-16 1978-03-16 Simultaneous working method for both surfaces of wafer

Publications (2)

Publication Number Publication Date
JPS54122087A true JPS54122087A (en) 1979-09-21
JPS5735575B2 JPS5735575B2 (ja) 1982-07-29

Family

ID=12272136

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2929178A Granted JPS54122087A (en) 1978-03-16 1978-03-16 Simultaneous working method for both surfaces of wafer

Country Status (1)

Country Link
JP (1) JPS54122087A (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008199699A (ja) * 2007-02-08 2008-08-28 Mitsubishi Electric Corp 電力変換装置、コンバータ、インバータ及び端子台
US7589023B2 (en) 2000-04-24 2009-09-15 Sumitomo Mitsubishi Silicon Corporation Method of manufacturing semiconductor wafer

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS501313U (ja) * 1973-04-27 1975-01-08
JPS5279869A (en) * 1975-12-26 1977-07-05 Fujitsu Ltd Semiconductor substrate

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS501313U (ja) * 1973-04-27 1975-01-08
JPS5279869A (en) * 1975-12-26 1977-07-05 Fujitsu Ltd Semiconductor substrate

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7589023B2 (en) 2000-04-24 2009-09-15 Sumitomo Mitsubishi Silicon Corporation Method of manufacturing semiconductor wafer
US8283252B2 (en) 2000-04-24 2012-10-09 Sumitomo Mitsubishi Silicon Corporation Method of manufacturing semiconductor wafer
JP2008199699A (ja) * 2007-02-08 2008-08-28 Mitsubishi Electric Corp 電力変換装置、コンバータ、インバータ及び端子台

Also Published As

Publication number Publication date
JPS5735575B2 (ja) 1982-07-29

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