JPS54115085A - Method of fabricating semiconductor - Google Patents
Method of fabricating semiconductorInfo
- Publication number
- JPS54115085A JPS54115085A JP2308678A JP2308678A JPS54115085A JP S54115085 A JPS54115085 A JP S54115085A JP 2308678 A JP2308678 A JP 2308678A JP 2308678 A JP2308678 A JP 2308678A JP S54115085 A JPS54115085 A JP S54115085A
- Authority
- JP
- Japan
- Prior art keywords
- fabricating semiconductor
- fabricating
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/3115—Doping the insulating layers
- H01L21/31155—Doping the insulating layers by ion implantation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
- H01L21/3081—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their composition, e.g. multilayer masks, materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
- H01L21/3083—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/3086—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/32—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
- H01L21/76205—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/117—Oxidation, selective
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/143—Shadow masking
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2308678A JPS54115085A (en) | 1978-02-28 | 1978-02-28 | Method of fabricating semiconductor |
US06/015,897 US4292156A (en) | 1978-02-28 | 1979-02-28 | Method of manufacturing semiconductor devices |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2308678A JPS54115085A (en) | 1978-02-28 | 1978-02-28 | Method of fabricating semiconductor |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS54115085A true JPS54115085A (en) | 1979-09-07 |
JPS6228578B2 JPS6228578B2 (ja) | 1987-06-22 |
Family
ID=12100606
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2308678A Granted JPS54115085A (en) | 1978-02-28 | 1978-02-28 | Method of fabricating semiconductor |
Country Status (2)
Country | Link |
---|---|
US (1) | US4292156A (ja) |
JP (1) | JPS54115085A (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5952847A (ja) * | 1982-09-20 | 1984-03-27 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
Families Citing this family (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4465705A (en) * | 1980-05-19 | 1984-08-14 | Matsushita Electric Industrial Co., Ltd. | Method of making semiconductor devices |
US4361600A (en) * | 1981-11-12 | 1982-11-30 | General Electric Company | Method of making integrated circuits |
US4460434A (en) * | 1982-04-15 | 1984-07-17 | At&T Bell Laboratories | Method for planarizing patterned surfaces |
JPS59138379A (ja) * | 1983-01-27 | 1984-08-08 | Toshiba Corp | 半導体装置の製造方法 |
US4477310A (en) * | 1983-08-12 | 1984-10-16 | Tektronix, Inc. | Process for manufacturing MOS integrated circuit with improved method of forming refractory metal silicide areas |
US4486266A (en) * | 1983-08-12 | 1984-12-04 | Tektronix, Inc. | Integrated circuit method |
DE3405162A1 (de) * | 1984-02-14 | 1985-08-22 | Bosch Gmbh Robert | Polarographischer sauerstoffmessfuehler |
US4538343A (en) * | 1984-06-15 | 1985-09-03 | Texas Instruments Incorporated | Channel stop isolation technology utilizing two-step etching and selective oxidation with sidewall masking |
US4561172A (en) * | 1984-06-15 | 1985-12-31 | Texas Instruments Incorporated | Integrated circuit fabrication method utilizing selective etching and oxidation to form isolation regions |
JPS6281727A (ja) * | 1985-10-05 | 1987-04-15 | Fujitsu Ltd | 埋込型素子分離溝の形成方法 |
US4824795A (en) * | 1985-12-19 | 1989-04-25 | Siliconix Incorporated | Method for obtaining regions of dielectrically isolated single crystal silicon |
GB8607822D0 (en) * | 1986-03-27 | 1986-04-30 | Plessey Co Plc | Iii-v semiconductor devices |
US4758530A (en) * | 1986-12-08 | 1988-07-19 | Delco Electronics Corporation | Doubly-self-aligned hole-within-a-hole structure in semiconductor fabrication involving a double LOCOS process aligned with sidewall spacers |
US4968640A (en) * | 1987-02-10 | 1990-11-06 | Industrial Technology Research Institute | Isolation structures for integrated circuits |
US5149669A (en) * | 1987-03-06 | 1992-09-22 | Seiko Instruments Inc. | Method of forming an isolation region in a semiconductor device |
US4775644A (en) * | 1987-06-03 | 1988-10-04 | Lsi Logic Corporation | Zero bird-beak oxide isolation scheme for integrated circuits |
US4863562A (en) * | 1988-02-11 | 1989-09-05 | Sgs-Thomson Microelectronics, Inc. | Method for forming a non-planar structure on the surface of a semiconductor substrate |
KR100189733B1 (ko) * | 1996-07-22 | 1999-06-01 | 구본준 | 반도체장치의 소자분리막 형성방법 |
KR100668509B1 (ko) * | 2005-06-10 | 2007-01-12 | 주식회사 하이닉스반도체 | 비대칭 스텝구조의 게이트를 갖는 반도체소자의 제조 방법 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS525289A (en) * | 1975-06-30 | 1977-01-14 | Ibm | Method of producing ic device |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
NL157662B (nl) * | 1969-05-22 | 1978-08-15 | Philips Nv | Werkwijze voor het etsen van een oppervlak onder toepassing van een etsmasker, alsmede voorwerpen, verkregen door toepassing van deze werkwijze. |
US3675314A (en) * | 1970-03-12 | 1972-07-11 | Alpha Ind Inc | Method of producing semiconductor devices |
GB1437112A (en) * | 1973-09-07 | 1976-05-26 | Mullard Ltd | Semiconductor device manufacture |
US3961999A (en) * | 1975-06-30 | 1976-06-08 | Ibm Corporation | Method for forming recessed dielectric isolation with a minimized "bird's beak" problem |
-
1978
- 1978-02-28 JP JP2308678A patent/JPS54115085A/ja active Granted
-
1979
- 1979-02-28 US US06/015,897 patent/US4292156A/en not_active Expired - Lifetime
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS525289A (en) * | 1975-06-30 | 1977-01-14 | Ibm | Method of producing ic device |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5952847A (ja) * | 1982-09-20 | 1984-03-27 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
Also Published As
Publication number | Publication date |
---|---|
JPS6228578B2 (ja) | 1987-06-22 |
US4292156A (en) | 1981-09-29 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS5591176A (en) | Method of fabricating semiconductor device | |
JPS5521198A (en) | Method of manufacturing semiconductor device | |
JPS5694777A (en) | Method of manufacturing semiconductor | |
JPS54144880A (en) | Method of fabricating semiconductor device | |
JPS56107581A (en) | Method of manufacturing semiconductor device | |
JPS5487175A (en) | Method of fabricating semiconductor | |
JPS54155782A (en) | Method of fabricating semiconductor | |
MY8500674A (en) | Method of manufacturing semiconductor devices | |
JPS54115085A (en) | Method of fabricating semiconductor | |
JPS54144176A (en) | Method of forming semiconductor junction | |
JPS5558520A (en) | Method of manufacturing semiconductor device | |
JPS5553416A (en) | Improvement of method of manufacturing semiconductor device | |
JPS54158883A (en) | Method of fabricating field effect transintor | |
JPS5588338A (en) | Method of fabricating semiconductor device | |
JPS54107275A (en) | Method of fabricating semiconductor | |
JPS5591158A (en) | Method of fabricating semiconductor device | |
JPS5489564A (en) | Method of fabricating semiconductor | |
JPS5588321A (en) | Method of fabricating semiconductor device | |
JPS5575218A (en) | Method of fabricating semiconductor device | |
JPS5530888A (en) | Method of forming semiconductor field effect structure | |
JPS54109779A (en) | Method of fabricating semiconductor | |
JPS5583270A (en) | Method of fabricating semiconductor device | |
JPS54127688A (en) | Method of fabricating semiconductor | |
JPS54146982A (en) | Method of fabricating semiconductor device | |
JPS556896A (en) | Method of manufacturing semiconductor |