JPS54115071A - Semiconductor element - Google Patents

Semiconductor element

Info

Publication number
JPS54115071A
JPS54115071A JP2326078A JP2326078A JPS54115071A JP S54115071 A JPS54115071 A JP S54115071A JP 2326078 A JP2326078 A JP 2326078A JP 2326078 A JP2326078 A JP 2326078A JP S54115071 A JPS54115071 A JP S54115071A
Authority
JP
Japan
Prior art keywords
support
electrode members
soldered
laminated
thermal expansion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2326078A
Other languages
Japanese (ja)
Inventor
Akira Kawakami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP2326078A priority Critical patent/JPS54115071A/en
Publication of JPS54115071A publication Critical patent/JPS54115071A/en
Pending legal-status Critical Current

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  • Die Bonding (AREA)

Abstract

PURPOSE: To prevent the warping due to alloy solder, by correcting the deformation to heat through the lamination of three types electrode members having different thermal expansion coefficient, as the manufacture of semiconductor elements.
CONSTITUTION: Three discs of first, second, third electrode members 101,102, 103 are laminated so that the aluminum foils 104 and 105 being the solder material can be clipped, high temperature treatment is made, establishing the electrode support 106. Taking that the thermal expansion coefficient for the first, second, and third electrode members is as a1,a2,a3, the substance as a1<a2 and a2>a3 is selected. When soldering and returned to room temperature, the bending stress caused to the bonding parts 107 and 108, R1 and R2 are taken as R1<R2, so that the support 106 is bent by W1. Next, the wafer 109 having junction and the support 106 are laminated by clipping the aluminum foil 110, so that the concave plane 111 is soldered plane, and it is alloy-soldered by exerting the pressure P.
COPYRIGHT: (C)1979,JPO&Japio
JP2326078A 1978-02-28 1978-02-28 Semiconductor element Pending JPS54115071A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2326078A JPS54115071A (en) 1978-02-28 1978-02-28 Semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2326078A JPS54115071A (en) 1978-02-28 1978-02-28 Semiconductor element

Publications (1)

Publication Number Publication Date
JPS54115071A true JPS54115071A (en) 1979-09-07

Family

ID=12105622

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2326078A Pending JPS54115071A (en) 1978-02-28 1978-02-28 Semiconductor element

Country Status (1)

Country Link
JP (1) JPS54115071A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007216844A (en) * 2006-02-17 2007-08-30 Tcm Corp Transportation vehicle
CN107731668A (en) * 2017-08-31 2018-02-23 长江存储科技有限责任公司 The method that wafer stress is compensated in the hybrid bonded techniques of 3D NAND

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007216844A (en) * 2006-02-17 2007-08-30 Tcm Corp Transportation vehicle
CN107731668A (en) * 2017-08-31 2018-02-23 长江存储科技有限责任公司 The method that wafer stress is compensated in the hybrid bonded techniques of 3D NAND

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