JPS54115050A - Digital attenuator-amplifyier - Google Patents

Digital attenuator-amplifyier

Info

Publication number
JPS54115050A
JPS54115050A JP2254478A JP2254478A JPS54115050A JP S54115050 A JPS54115050 A JP S54115050A JP 2254478 A JP2254478 A JP 2254478A JP 2254478 A JP2254478 A JP 2254478A JP S54115050 A JPS54115050 A JP S54115050A
Authority
JP
Japan
Prior art keywords
output
circuit
pcm
amplification
attenuation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2254478A
Other languages
Japanese (ja)
Inventor
Yasuo Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP2254478A priority Critical patent/JPS54115050A/en
Publication of JPS54115050A publication Critical patent/JPS54115050A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03GCONTROL OF AMPLIFICATION
    • H03G11/00Limiting amplitude; Limiting rate of change of amplitude ; Clipping in general
    • H03G11/08Limiting rate of change of amplitude

Landscapes

  • Tone Control, Compression And Expansion, Limiting Amplitude (AREA)

Abstract

PURPOSE:To obtain arbitrary attenuation and amplification amount with the same and simple circuit constitution, by performing digital attenuation and amplification with the circuit constitution only by addition and subtraction on the conversion table performing logarithmic calculation in advance, to linear and non-linear PCM signal. CONSTITUTION:The PCM signal 13 inputted to the PCM-dB conversion unit 1 is added and subtracted at the adder and subtractor 5-3 with the output of the mode generator 8, and the output is inputted to the dB-PCM converter 6. In case of subtractor, the output is compared with the output of the subtractor 3 at the comparison circuit 4 for magnitude for the given attenuation, and if the attenuation is more than the output of the circuit 3, the minimum PCM pattern is given to the output of the overflow control circuit 11 in place of the output of the converter 6. Further, in case of amplifier, the input PCM signal and the amount of amplification given ar compared at the circuit 4, and the maximum PCM pattern is given to the output of the circuit 11 to the input signal where the amount of amplification is more than the dB value of the input signal. Further, to the input signals other than mentioned above, the output of the converter 6 passes through the circuit 11 as it is. Thus, the attenuation and amplification can be realized only with addition and subtraction based on the conversion table.
JP2254478A 1978-02-28 1978-02-28 Digital attenuator-amplifyier Pending JPS54115050A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2254478A JPS54115050A (en) 1978-02-28 1978-02-28 Digital attenuator-amplifyier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2254478A JPS54115050A (en) 1978-02-28 1978-02-28 Digital attenuator-amplifyier

Publications (1)

Publication Number Publication Date
JPS54115050A true JPS54115050A (en) 1979-09-07

Family

ID=12085755

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2254478A Pending JPS54115050A (en) 1978-02-28 1978-02-28 Digital attenuator-amplifyier

Country Status (1)

Country Link
JP (1) JPS54115050A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0376554A2 (en) * 1988-12-29 1990-07-04 AT&T Corp. Signal conversion apparatus which reduces quantization errors for telecommunications applications

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0376554A2 (en) * 1988-12-29 1990-07-04 AT&T Corp. Signal conversion apparatus which reduces quantization errors for telecommunications applications

Similar Documents

Publication Publication Date Title
JPS55122173A (en) Noise suppression circuit
JPS55158715A (en) Gain control circuit
JPS55107308A (en) Nonlinear compensation system of automatic following type
JPS54115050A (en) Digital attenuator-amplifyier
JPS55165009A (en) Signal transmission circuit
JPS5758414A (en) Analog-to-digital conversion circuit providing agc function
JPS5572252A (en) Mixing circuit for digital logarithmic value signal
JPS55151820A (en) Analog-digital converter
JPS57206958A (en) Signal entering device
JPS5679509A (en) Automatic gain control circuit
JPS5624897A (en) Attenuation quantity set system
JPS5437664A (en) Automatic gain adjusting circuit
JPS537159A (en) Transistor amplifier
JPS5714227A (en) Analog-to-digital converter for pcm circuit
JPS5568715A (en) Phase variable device
JPS56117413A (en) Digital agc system
JPS5460587A (en) Radar receiving device
JPS5625814A (en) Mixing unit for digital signal
JPS5547540A (en) Anti-logarithm adding circuit of logarithm
JPS5675789A (en) Compensation device for nonlinear distortion
JPS5455111A (en) Digital agc system
JPS5797222A (en) Nonlinear analog-to-digital converter
JPS5350959A (en) Automatic gain control device
JPS5698917A (en) Automatic level set circuit
JPS53124023A (en) Noise deletion circuit