JPS5572252A - Mixing circuit for digital logarithmic value signal - Google Patents
Mixing circuit for digital logarithmic value signalInfo
- Publication number
- JPS5572252A JPS5572252A JP14584478A JP14584478A JPS5572252A JP S5572252 A JPS5572252 A JP S5572252A JP 14584478 A JP14584478 A JP 14584478A JP 14584478 A JP14584478 A JP 14584478A JP S5572252 A JPS5572252 A JP S5572252A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- sign
- value
- logarithmic value
- subtraction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Complex Calculations (AREA)
Abstract
PURPOSE: To make it possible to carry out arithmetic corresponding to addition and subtraction of an original linear signal without converting a logarithmic value signal into the original linear signal.
CONSTITUTION: When linear signals (d1) and (d2) are equal in sign, sign signals (signd1)and (signd2) have equal logic values each other, so that OR-ELSE circuit 6 will output logic value "0". Therefore, memory 4 is so set that logarithmic value signal logβ (1+β-x) will be outputted. For example, in case of |d1|>|d2|, subtracter 2 outputs subtraction value (D1-D2) obtained by subtracting logarithmic value signal D2 from D1. Therefore, logic value "0" appears at subtraction value sign signal output terminal C of subtracter 2. Then, selector makes a connection to input terminal A to output logarithmic value signal D1 and its sign signal (signd1). On receiving logic value "0" at sign conversion command signal input terminal SC, sign converter 3 outputs inputted subtraction value (D1-D2) as an address of a memory.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14584478A JPS5572252A (en) | 1978-11-24 | 1978-11-24 | Mixing circuit for digital logarithmic value signal |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14584478A JPS5572252A (en) | 1978-11-24 | 1978-11-24 | Mixing circuit for digital logarithmic value signal |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5572252A true JPS5572252A (en) | 1980-05-30 |
| JPS618970B2 JPS618970B2 (en) | 1986-03-19 |
Family
ID=15394400
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14584478A Granted JPS5572252A (en) | 1978-11-24 | 1978-11-24 | Mixing circuit for digital logarithmic value signal |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5572252A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4682302A (en) * | 1984-12-14 | 1987-07-21 | Motorola, Inc. | Logarithmic arithmetic logic unit |
| US4727508A (en) * | 1984-12-14 | 1988-02-23 | Motorola, Inc. | Circuit for adding and/or subtracting numbers in logarithmic representation |
| US4737925A (en) * | 1985-12-06 | 1988-04-12 | Motorola, Inc. | Method and apparatus for minimizing a memory table for use with nonlinear monotonic arithmetic functions |
| US4849921A (en) * | 1985-06-19 | 1989-07-18 | Nec Corporation | Arithmetic circuit for calculating the absolute value of the difference between a pair of input signals |
| US5337266A (en) * | 1987-12-21 | 1994-08-09 | Arnold Mark G | Method and apparatus for fast logarithmic addition and subtraction |
| JP2008502037A (en) * | 2004-06-04 | 2008-01-24 | テレフオンアクチーボラゲット エル エム エリクソン（パブル） | Complex logarithm ALU |
-
1978
- 1978-11-24 JP JP14584478A patent/JPS5572252A/en active Granted
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4682302A (en) * | 1984-12-14 | 1987-07-21 | Motorola, Inc. | Logarithmic arithmetic logic unit |
| US4727508A (en) * | 1984-12-14 | 1988-02-23 | Motorola, Inc. | Circuit for adding and/or subtracting numbers in logarithmic representation |
| US4849921A (en) * | 1985-06-19 | 1989-07-18 | Nec Corporation | Arithmetic circuit for calculating the absolute value of the difference between a pair of input signals |
| US4737925A (en) * | 1985-12-06 | 1988-04-12 | Motorola, Inc. | Method and apparatus for minimizing a memory table for use with nonlinear monotonic arithmetic functions |
| US5337266A (en) * | 1987-12-21 | 1994-08-09 | Arnold Mark G | Method and apparatus for fast logarithmic addition and subtraction |
| JP2008502037A (en) * | 2004-06-04 | 2008-01-24 | テレフオンアクチーボラゲット エル エム エリクソン（パブル） | Complex logarithm ALU |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS618970B2 (en) | 1986-03-19 |
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