JPS5568715A - Phase variable device - Google Patents
Phase variable deviceInfo
- Publication number
- JPS5568715A JPS5568715A JP14318678A JP14318678A JPS5568715A JP S5568715 A JPS5568715 A JP S5568715A JP 14318678 A JP14318678 A JP 14318678A JP 14318678 A JP14318678 A JP 14318678A JP S5568715 A JPS5568715 A JP S5568715A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- subtractor
- attenuator
- subtracted
- amplifier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
- H03H7/01—Frequency selective two-port networks
Landscapes
- Filters And Equalizers (AREA)
- Networks Using Active Elements (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
Abstract
PURPOSE:To secure variation for only the phase characteristics with the flat transmission amplitude characteristics by forming the circuit with the integrator, the attenuator and the adder/subtractor each. CONSTITUTION:The output signal of attenuator 5 is subtracted at subtractor 6 and via the input signal applied to input terminal IN to obtain the 1st signal. The 1st signal is supplied to integrator 1 and then amplified through amplifier 3 after integration. Then the 1st signal is subtracted from the output signal of amplifier 3 through subtractor 7 to obtain the 2nd signal. And the 2nd signal is supplied to integrator 2 and then amplified through amplifier 4 after integration. Then the 2nd signal is subtracted from the output signal of amplifier 4 through subtractor 8 to obtain the 3rd signal. An addition is then given between the 3rd signal and the input signal to obtain the 4th signal through adder 10, and the 4th signal is supplied to attenuator 5. Then an addition is given between the output signal of attenuator 5 and the 4th signal through adder 11 to obtain the 5th signal, and then the intput signal is subtracted from the 5th signal via subtractor 9 to obtain the output signal from output terminal OUT. In such way, the transmission amplitude characteristics always features flatness without the gain, and at the same time the monotonous reduction is secured for the phase from 0 deg.--360 deg..
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14318678A JPS5568715A (en) | 1978-11-20 | 1978-11-20 | Phase variable device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14318678A JPS5568715A (en) | 1978-11-20 | 1978-11-20 | Phase variable device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5568715A true JPS5568715A (en) | 1980-05-23 |
JPS6150535B2 JPS6150535B2 (en) | 1986-11-05 |
Family
ID=15332872
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14318678A Granted JPS5568715A (en) | 1978-11-20 | 1978-11-20 | Phase variable device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5568715A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60117809A (en) * | 1983-11-29 | 1985-06-25 | Sony Corp | Secondary active filter device |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6333744U (en) * | 1986-08-22 | 1988-03-04 |
-
1978
- 1978-11-20 JP JP14318678A patent/JPS5568715A/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60117809A (en) * | 1983-11-29 | 1985-06-25 | Sony Corp | Secondary active filter device |
Also Published As
Publication number | Publication date |
---|---|
JPS6150535B2 (en) | 1986-11-05 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS52153364A (en) | Microwave amplifier | |
JPS57211812A (en) | Wide band amplifier | |
JPS5340257A (en) | Tone control circuit | |
JPS5564412A (en) | Frequency characteristic regulator | |
JPS56143703A (en) | Frequency converting circuit | |
JPS5676611A (en) | Low noise amplifying circuit | |
JPS5568715A (en) | Phase variable device | |
JPS5575316A (en) | Control circuit for frequency characteristic | |
JPS53101252A (en) | Feedback-type amplifier circuit | |
JPS555566A (en) | Feedback frequency division circuit | |
EP0266198A3 (en) | A distributed balanced frequency multiplier | |
JPS5250148A (en) | Negative feedback amplifier circuit | |
JPS5717205A (en) | Operational amplifier | |
JPS5427341A (en) | Nonlinear distortion compensation device | |
JPS54111070A (en) | Phase controlling circuit | |
JPS5380127A (en) | Intermediate frequency amplifier | |
JPS5769911A (en) | Amplifier | |
JPS56103523A (en) | Active filter circuit | |
JPS54126445A (en) | Notch filter | |
JPS54100211A (en) | Active 2-4 line converter circuit | |
JPS53138261A (en) | Integrated circuit device | |
JPS5742209A (en) | Negative feedback amplifier | |
JPS54118128A (en) | Motion/still picture isolator | |
JPS55614A (en) | Frequency characteristic adjustment circuit | |
JPS5338380A (en) | Peak detecting circuit |