JPS54107246A - Analogue switch and sample hold circuit using it - Google Patents

Analogue switch and sample hold circuit using it

Info

Publication number
JPS54107246A
JPS54107246A JP1470178A JP1470178A JPS54107246A JP S54107246 A JPS54107246 A JP S54107246A JP 1470178 A JP1470178 A JP 1470178A JP 1470178 A JP1470178 A JP 1470178A JP S54107246 A JPS54107246 A JP S54107246A
Authority
JP
Japan
Prior art keywords
substrate
voltage
sample hold
transistor
substrate bias
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1470178A
Other languages
Japanese (ja)
Other versions
JPS6038800B2 (en
Inventor
Atsushi Shibata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP53014701A priority Critical patent/JPS6038800B2/en
Publication of JPS54107246A publication Critical patent/JPS54107246A/en
Publication of JPS6038800B2 publication Critical patent/JPS6038800B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Electronic Switches (AREA)

Abstract

PURPOSE: To suppress substrate bias effects and make an on resistance uniform to reduce distortion by applying the substrate bias voltage fixed for input signals to the semiconductor substrate of a FET in the analogue switch.
CONSTITUTION: Analogue input signal ei is applied to the source electrode of P channel MOS transistor 2, and sample hold signal eo is obtained in the drain electrode of it. In this state, substrate voltage Vsub of transistor 2 is given by higher one of signal ei and eo0 voltages. Consequently, when transistor 2 is in an on-state, the substrate voltage for the source potential is always set to zero. As a result, the fluctuation of the on resistance dependent upon substrate bias effects is suppressed, and the threshold voltage of the gate electrode is set to a fixed level.
COPYRIGHT: (C)1979,JPO&Japio
JP53014701A 1978-02-09 1978-02-09 Analog switch and sample/hold circuit using it Expired JPS6038800B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53014701A JPS6038800B2 (en) 1978-02-09 1978-02-09 Analog switch and sample/hold circuit using it

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53014701A JPS6038800B2 (en) 1978-02-09 1978-02-09 Analog switch and sample/hold circuit using it

Publications (2)

Publication Number Publication Date
JPS54107246A true JPS54107246A (en) 1979-08-22
JPS6038800B2 JPS6038800B2 (en) 1985-09-03

Family

ID=11868475

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53014701A Expired JPS6038800B2 (en) 1978-02-09 1978-02-09 Analog switch and sample/hold circuit using it

Country Status (1)

Country Link
JP (1) JPS6038800B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5760593A (en) * 1980-09-26 1982-04-12 Hitachi Ltd Sample holding circuit
JPS60167420U (en) * 1984-04-13 1985-11-07 日本電気株式会社 semiconductor equipment
JP2001126492A (en) * 1999-10-27 2001-05-11 Agilent Technologies Japan Ltd Track-and-hold circuit

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62154490U (en) * 1986-03-20 1987-09-30

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5760593A (en) * 1980-09-26 1982-04-12 Hitachi Ltd Sample holding circuit
JPS636957B2 (en) * 1980-09-26 1988-02-13 Hitachi Ltd
JPS60167420U (en) * 1984-04-13 1985-11-07 日本電気株式会社 semiconductor equipment
JP2001126492A (en) * 1999-10-27 2001-05-11 Agilent Technologies Japan Ltd Track-and-hold circuit
US6504406B1 (en) * 1999-10-27 2003-01-07 Agilent Technologies, Inc. Track and hold circuit

Also Published As

Publication number Publication date
JPS6038800B2 (en) 1985-09-03

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