JPS5330776A - Method of forming pattern on embedded land copper stacking board - Google Patents

Method of forming pattern on embedded land copper stacking board

Info

Publication number
JPS5330776A
JPS5330776A JP10373176A JP10373176A JPS5330776A JP S5330776 A JPS5330776 A JP S5330776A JP 10373176 A JP10373176 A JP 10373176A JP 10373176 A JP10373176 A JP 10373176A JP S5330776 A JPS5330776 A JP S5330776A
Authority
JP
Japan
Prior art keywords
forming pattern
stacking board
land copper
embedded
embedded land
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10373176A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5645315B2 (en, 2012
Inventor
Kenji Yamamoto
Takayoshi Hanabusa
Shinji Umemoto
Keiji Kurosawa
Hitoshi Nakamura
Keiichirou Shimada
Nikou Murakami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP10373176A priority Critical patent/JPS5330776A/ja
Publication of JPS5330776A publication Critical patent/JPS5330776A/ja
Publication of JPS5645315B2 publication Critical patent/JPS5645315B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Laminated Bodies (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
JP10373176A 1976-09-01 1976-09-01 Method of forming pattern on embedded land copper stacking board Granted JPS5330776A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10373176A JPS5330776A (en) 1976-09-01 1976-09-01 Method of forming pattern on embedded land copper stacking board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10373176A JPS5330776A (en) 1976-09-01 1976-09-01 Method of forming pattern on embedded land copper stacking board

Publications (2)

Publication Number Publication Date
JPS5330776A true JPS5330776A (en) 1978-03-23
JPS5645315B2 JPS5645315B2 (en, 2012) 1981-10-26

Family

ID=14361778

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10373176A Granted JPS5330776A (en) 1976-09-01 1976-09-01 Method of forming pattern on embedded land copper stacking board

Country Status (1)

Country Link
JP (1) JPS5330776A (en, 2012)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5651889A (en) * 1979-10-05 1981-05-09 Tokyo Shibaura Electric Co Method of manufacturing copperrcoated laminate board
JPS5652451A (en) * 1979-10-05 1981-05-11 Toshiba Corp Interruption display system
JPH02138793A (ja) * 1988-11-18 1990-05-28 Shinko Electric Ind Co Ltd 回路基板の製造方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS434247Y1 (en, 2012) * 1964-11-05 1968-02-23
JPS504046A (en, 2012) * 1972-11-30 1975-01-16
JPS5040466A (en, 2012) * 1973-08-16 1975-04-14

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS434247Y1 (en, 2012) * 1964-11-05 1968-02-23
JPS504046A (en, 2012) * 1972-11-30 1975-01-16
JPS5040466A (en, 2012) * 1973-08-16 1975-04-14

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5651889A (en) * 1979-10-05 1981-05-09 Tokyo Shibaura Electric Co Method of manufacturing copperrcoated laminate board
JPS5652451A (en) * 1979-10-05 1981-05-11 Toshiba Corp Interruption display system
JPH02138793A (ja) * 1988-11-18 1990-05-28 Shinko Electric Ind Co Ltd 回路基板の製造方法

Also Published As

Publication number Publication date
JPS5645315B2 (en, 2012) 1981-10-26

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