JPS532091A - Selffarraying method of producing ic - Google Patents

Selffarraying method of producing ic

Info

Publication number
JPS532091A
JPS532091A JP6950977A JP6950977A JPS532091A JP S532091 A JPS532091 A JP S532091A JP 6950977 A JP6950977 A JP 6950977A JP 6950977 A JP6950977 A JP 6950977A JP S532091 A JPS532091 A JP S532091A
Authority
JP
Japan
Prior art keywords
selffarraying
producing
selffarraying method
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6950977A
Other languages
English (en)
Inventor
Rou Hanto Meriru
Angurosu Reidasu Kurisutofuaa
Toomasu Masutoroianni Sooru
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of JPS532091A publication Critical patent/JPS532091A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
    • H01L21/2652—Through-implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/761—PN junctions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8222—Bipolar technology
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/047—Emitter dip
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/085—Isolated-integrated
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/106—Masks, special
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/151—Simultaneous diffusion
JP6950977A 1976-06-28 1977-06-14 Selffarraying method of producing ic Pending JPS532091A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/700,432 US4021270A (en) 1976-06-28 1976-06-28 Double master mask process for integrated circuit manufacture

Publications (1)

Publication Number Publication Date
JPS532091A true JPS532091A (en) 1978-01-10

Family

ID=24813479

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6950977A Pending JPS532091A (en) 1976-06-28 1977-06-14 Selffarraying method of producing ic

Country Status (6)

Country Link
US (1) US4021270A (ja)
JP (1) JPS532091A (ja)
DE (1) DE2729171C2 (ja)
FR (1) FR2357063A1 (ja)
GB (1) GB1535493A (ja)
HK (1) HK981A (ja)

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4151019A (en) * 1974-12-27 1979-04-24 Tokyo Shibaura Electric Co., Ltd. Method of manufacturing integrated injection logic semiconductor devices utilizing self-aligned double-diffusion techniques
US4153487A (en) * 1974-12-27 1979-05-08 Tokyo Shibaura Electric Co., Ltd. Method of manufacturing intergrated injection logic semiconductor devices utilizing self-aligned double-diffusion techniques
US4178190A (en) * 1975-06-30 1979-12-11 Rca Corporation Method of making a bipolar transistor with high-low emitter impurity concentration
US4113512A (en) * 1976-10-28 1978-09-12 International Business Machines Corporation Technique for preventing forward biased epi-isolation degradation
US4135954A (en) * 1977-07-12 1979-01-23 International Business Machines Corporation Method for fabricating self-aligned semiconductor devices utilizing selectively etchable masking layers
US4110126A (en) * 1977-08-31 1978-08-29 International Business Machines Corporation NPN/PNP Fabrication process with improved alignment
US4159915A (en) * 1977-10-25 1979-07-03 International Business Machines Corporation Method for fabrication vertical NPN and PNP structures utilizing ion-implantation
US4155778A (en) * 1977-12-30 1979-05-22 International Business Machines Corporation Forming semiconductor devices having ion implanted and diffused regions
US4118250A (en) * 1977-12-30 1978-10-03 International Business Machines Corporation Process for producing integrated circuit devices by ion implantation
US4228451A (en) * 1978-07-21 1980-10-14 Monolithic Memories, Inc. High resistivity semiconductor resistor device
JPS55138267A (en) * 1979-04-12 1980-10-28 Matsushita Electric Ind Co Ltd Manufacture of semiconductor integrated circuit containing resistance element
US4267012A (en) * 1979-04-30 1981-05-12 Fairchild Camera & Instrument Corp. Process for patterning metal connections on a semiconductor structure by using a tungsten-titanium etch resistant layer
US4257826A (en) * 1979-10-11 1981-03-24 Texas Instruments Incorporated Photoresist masking in manufacture of semiconductor device
JPS5685848A (en) * 1979-12-15 1981-07-13 Toshiba Corp Manufacture of bipolar integrated circuit
US4429321A (en) * 1980-10-23 1984-01-31 Canon Kabushiki Kaisha Liquid jet recording device
US4416055A (en) * 1981-12-04 1983-11-22 Gte Laboratories Incorporated Method of fabricating a monolithic integrated circuit structure
US4648909A (en) * 1984-11-28 1987-03-10 Fairchild Semiconductor Corporation Fabrication process employing special masks for the manufacture of high speed bipolar analog integrated circuits
IT1188465B (it) * 1986-03-27 1988-01-14 Sgs Microelettronica Spa Rpocedimento per la fabbricazione di circuiti integrati a semiconduttore includenti dispositiv cmos e dispositivi elettronici ad alta tensione
DE3788470T2 (de) * 1986-08-08 1994-06-09 Philips Nv Verfahren zur Herstellung eines Feldeffekttransistors mit isoliertem Gate.
US4898837A (en) * 1987-11-19 1990-02-06 Sanyo Electric Co., Ltd. Method of fabricating a semiconductor integrated circuit
US5141881A (en) * 1989-04-20 1992-08-25 Sanyo Electric Co., Ltd. Method for manufacturing a semiconductor integrated circuit
JPH06101540B2 (ja) * 1989-05-19 1994-12-12 三洋電機株式会社 半導体集積回路の製造方法
GB2237445B (en) * 1989-10-04 1994-01-12 Seagate Microelectron Ltd A semiconductor device fabrication process
US5179030A (en) * 1991-04-26 1993-01-12 Unitrode Corporation Method of fabricating a buried zener diode simultaneously with other semiconductor devices
FR2687843A1 (fr) * 1992-02-24 1993-08-27 Motorola Semiconducteurs Transistor bipolaire lateral pnp et procede de fabrication.
EP0818055A4 (en) * 1995-03-27 1998-05-06 Micrel Inc SELF-ALIGNING TECHNOLOGY FOR SEMICONDUCTOR ARRANGEMENTS
US5702959A (en) * 1995-05-31 1997-12-30 Texas Instruments Incorporated Method for making an isolated vertical transistor
FR2785089B1 (fr) * 1998-10-23 2002-03-01 St Microelectronics Sa Realisation de mur d'isolement
EP1296374B1 (en) * 2001-09-14 2012-09-05 STMicroelectronics Srl Process for bonding and electrically connecting microsystems integrated in several distinct substrates

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4873085A (ja) * 1971-12-29 1973-10-02

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3479237A (en) * 1966-04-08 1969-11-18 Bell Telephone Labor Inc Etch masks on semiconductor surfaces
DE1764358B1 (de) * 1967-05-26 1971-09-30 Tokyo Shibaura Electric Co Verfahren zum herstellen eines halbleiterbauelementes
GB1300727A (en) * 1969-04-03 1972-12-20 Motorola Inc Shallow junction semiconductor device and method for making same
US3673679A (en) * 1970-12-01 1972-07-04 Texas Instruments Inc Complementary insulated gate field effect devices
DE2314260A1 (de) * 1972-05-30 1973-12-13 Ibm Ladungsgekoppelte halbleiteranordnung und verfahren zu ihrer herstellung
US3771218A (en) * 1972-07-13 1973-11-13 Ibm Process for fabricating passivated transistors
US3793088A (en) * 1972-11-15 1974-02-19 Bell Telephone Labor Inc Compatible pnp and npn devices in an integrated circuit
US3868274A (en) * 1974-01-02 1975-02-25 Gen Instrument Corp Method for fabricating MOS devices with a multiplicity of thresholds on a semiconductor substrate

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4873085A (ja) * 1971-12-29 1973-10-02

Also Published As

Publication number Publication date
US4021270A (en) 1977-05-03
FR2357063A1 (fr) 1978-01-27
DE2729171C2 (de) 1983-03-03
GB1535493A (en) 1978-12-13
HK981A (en) 1981-01-23
DE2729171A1 (de) 1977-12-29
FR2357063B1 (ja) 1982-02-19

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