GB1300727A - Shallow junction semiconductor device and method for making same - Google Patents

Abstract

1300727 Semi-conductors MOTOROLA Inc 23 March 1970 [3 April 1969] 13904/70 Heading H1K A semi-conductor structure is fabricated by applying an oxide layer by thermal oxidation or vapour deposition over a substrate 14 of high resistivity p conductivity material, and imposing an opening therein whereby an N<SP>+</SP> buried layer 18 (Fig. 4) can be diffused into the substrate. The oxide layer is etched away by HF, and an epitaxial N-type layer 21 is deposited on the substrate surface, and a further oxide layer 22 formed thereon by thermal oxidation or vapour deposition. Openings 24, 26, 28, 30 are made in the oxide layer through which p<SP>+</SP> impurity, e.g. boron is diffused into substrate 14 to form annular ring 32 providing PN junction isolation. A diffused resistor 33 may also be produced. Thereafter the surface mash is etched off by HF and a further oxide coating 36 is formed by exposure of layer 21 to heated gaseous oxygen and silane. A further thin layer 38 of phosphorus doped oxide is deposited on layer 36 by exposure to heated gaseous silane, phosphine, and oxygen. Mixed oxides and/or nitrides are also usable for the layers, and a photoresist mask 40 is deposited on layer 38 (Fig. 5) in which opening 42 is formed to permit etching out the exposed oxide with HF to expose the epitaxial surface 21, after which mask 40 is removed. N-type impurity of opposite conductivity type to the base region 34 is diffused in to define emitter region 48, and a superincumbent thin layer of phosphorus silicate glass 50 is thermally grown on region 48 and the surface of layer 38 during diffusion to minimize the depth of 48. A photoresist 52 is deposited on layer 50 into which openings 54, 56 are etched (Fig. 7) to expose layers 36, 38, 50, etched out by HF to expose the p-type regions; after which the photoresist is etched off and layer 50 is etched to reopen emitter window 60 (Fig. 9) into which a metallized emitter contact 62 is deposited, as is a metallized, e.g. aluminium strip 64 overlying oxide layers 36, 38 to connect base 34 to diffused resistor 44 (Fig. 10). Junction F.E.Ts may be similarly fabricated, boron ion implant may replace impurity diffusion, and the diffusion masks may be a nitride or a phosphorus silicate glass.