JPS52150981A - Electrode forming method in semiconductor elements - Google Patents

Electrode forming method in semiconductor elements

Info

Publication number
JPS52150981A
JPS52150981A JP6767076A JP6767076A JPS52150981A JP S52150981 A JPS52150981 A JP S52150981A JP 6767076 A JP6767076 A JP 6767076A JP 6767076 A JP6767076 A JP 6767076A JP S52150981 A JPS52150981 A JP S52150981A
Authority
JP
Japan
Prior art keywords
semiconductor elements
forming method
electrode forming
voltage
dielectric strength
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6767076A
Other languages
Japanese (ja)
Inventor
Takahiro Kimura
Hideharu Fujii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP6767076A priority Critical patent/JPS52150981A/en
Publication of JPS52150981A publication Critical patent/JPS52150981A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods

Landscapes

  • Wire Bonding (AREA)

Abstract

PURPOSE: To smoothly perform the formation of an Ag electrode of double heat sink diodes through electroplating by applying the a.c. voltage having an amplitude larger than the specified dielectric strength of semiconductor elements to a PN junction first, then changing over the applied voltage to forward d.c. voltage below the specified dielectric strength thereby performing plating.
COPYRIGHT: (C)1977,JPO&Japio
JP6767076A 1976-06-11 1976-06-11 Electrode forming method in semiconductor elements Pending JPS52150981A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6767076A JPS52150981A (en) 1976-06-11 1976-06-11 Electrode forming method in semiconductor elements

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6767076A JPS52150981A (en) 1976-06-11 1976-06-11 Electrode forming method in semiconductor elements

Publications (1)

Publication Number Publication Date
JPS52150981A true JPS52150981A (en) 1977-12-15

Family

ID=13351654

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6767076A Pending JPS52150981A (en) 1976-06-11 1976-06-11 Electrode forming method in semiconductor elements

Country Status (1)

Country Link
JP (1) JPS52150981A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6352490A (en) * 1986-08-22 1988-03-05 Toshiba Corp Glass-sealed light-emitting semiconductor device
US6567060B1 (en) 1997-10-16 2003-05-20 Citizen Watch Co., Ltd. Liquid display
JP2007048924A (en) * 2005-08-10 2007-02-22 Renesas Technology Corp Semiconductor device manufacturing method
JP2008535222A (en) * 2005-03-25 2008-08-28 ヴィシャイ ジェネラル セミコンダクター エルエルシー Process for forming a planar diode using one mask

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6352490A (en) * 1986-08-22 1988-03-05 Toshiba Corp Glass-sealed light-emitting semiconductor device
US6567060B1 (en) 1997-10-16 2003-05-20 Citizen Watch Co., Ltd. Liquid display
JP2008535222A (en) * 2005-03-25 2008-08-28 ヴィシャイ ジェネラル セミコンダクター エルエルシー Process for forming a planar diode using one mask
US8525222B2 (en) 2005-03-25 2013-09-03 Vishay General Semiconductor Llc Process for forming a planar diode using one mask
US8975719B2 (en) 2005-03-25 2015-03-10 Vishay General Semiconductor Llc Process for forming a planar diode using one mask
US9537017B2 (en) 2005-03-25 2017-01-03 Vishay General Semiconductor Llc Process for forming a planar diode using one mask
JP2007048924A (en) * 2005-08-10 2007-02-22 Renesas Technology Corp Semiconductor device manufacturing method

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