JPS52147953A - Ternary memory circuit - Google Patents
Ternary memory circuitInfo
- Publication number
- JPS52147953A JPS52147953A JP6497276A JP6497276A JPS52147953A JP S52147953 A JPS52147953 A JP S52147953A JP 6497276 A JP6497276 A JP 6497276A JP 6497276 A JP6497276 A JP 6497276A JP S52147953 A JPS52147953 A JP S52147953A
- Authority
- JP
- Japan
- Prior art keywords
- memory circuit
- ternary memory
- ternary
- algebra
- comparatively
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/26—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
- H03K3/28—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback
- H03K3/281—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator
- H03K3/29—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator multistable
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Logic Circuits (AREA)
Abstract
PURPOSE:To simplify comparatively the structure of a memory circuit used in the digital system utilizing the ternary logic by ternary algebra.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP51064972A JPS5912044B2 (en) | 1976-06-02 | 1976-06-02 | 3-value memory circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP51064972A JPS5912044B2 (en) | 1976-06-02 | 1976-06-02 | 3-value memory circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS52147953A true JPS52147953A (en) | 1977-12-08 |
JPS5912044B2 JPS5912044B2 (en) | 1984-03-21 |
Family
ID=13273462
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP51064972A Expired JPS5912044B2 (en) | 1976-06-02 | 1976-06-02 | 3-value memory circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5912044B2 (en) |
-
1976
- 1976-06-02 JP JP51064972A patent/JPS5912044B2/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS5912044B2 (en) | 1984-03-21 |
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