JPS52127A - Multi-layer memory - Google Patents

Multi-layer memory

Info

Publication number
JPS52127A
JPS52127A JP7552975A JP7552975A JPS52127A JP S52127 A JPS52127 A JP S52127A JP 7552975 A JP7552975 A JP 7552975A JP 7552975 A JP7552975 A JP 7552975A JP S52127 A JPS52127 A JP S52127A
Authority
JP
Japan
Prior art keywords
layer memory
memory
layer
execute
mask pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7552975A
Other languages
Japanese (ja)
Inventor
Masakazu Nagura
Yasuhito Suenaga
Mamoru Okada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP7552975A priority Critical patent/JPS52127A/en
Publication of JPS52127A publication Critical patent/JPS52127A/en
Pending legal-status Critical Current

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Abstract

PURPOSE: To execute an access operation by selecting memory plane by using mask pattern in a multi-layer memory of two-dimensional array in X and Y direction of each memory unit.
COPYRIGHT: (C)1977,JPO&Japio
JP7552975A 1975-06-23 1975-06-23 Multi-layer memory Pending JPS52127A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7552975A JPS52127A (en) 1975-06-23 1975-06-23 Multi-layer memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7552975A JPS52127A (en) 1975-06-23 1975-06-23 Multi-layer memory

Publications (1)

Publication Number Publication Date
JPS52127A true JPS52127A (en) 1977-01-05

Family

ID=13578834

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7552975A Pending JPS52127A (en) 1975-06-23 1975-06-23 Multi-layer memory

Country Status (1)

Country Link
JP (1) JPS52127A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5671154A (en) * 1979-11-15 1981-06-13 Nec Corp Information processing device
JPS6071446A (en) * 1983-09-06 1985-04-23 ベロイト　コ−ポレ−ション Winding machine
JPS60134322A (en) * 1983-12-21 1985-07-17 Seiko Instr & Electronics Ltd Coordinate reader
JPS60150089A (en) * 1984-01-18 1985-08-07 株式会社東芝 Memory
JPH06510976A (en) * 1992-01-27 1994-12-08 ベロイト・テクノロジーズ・インコーポレイテッド Articulated rider roll device and method

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4987250A (en) * 1972-12-22 1974-08-21

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4987250A (en) * 1972-12-22 1974-08-21

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5671154A (en) * 1979-11-15 1981-06-13 Nec Corp Information processing device
JPH0146891B2 (en) * 1979-11-15 1989-10-11 Nippon Electric Co
JPS6071446A (en) * 1983-09-06 1985-04-23 ベロイト　コ−ポレ−ション Winding machine
JPH0122185B2 (en) * 1983-09-06 1989-04-25 Beloit Corp
JPS60134322A (en) * 1983-12-21 1985-07-17 Seiko Instr & Electronics Ltd Coordinate reader
JPS60150089A (en) * 1984-01-18 1985-08-07 株式会社東芝 Memory
JPH06510976A (en) * 1992-01-27 1994-12-08 ベロイト・テクノロジーズ・インコーポレイテッド Articulated rider roll device and method

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