JPS5098279A - - Google Patents
Info
- Publication number
- JPS5098279A JPS5098279A JP49130533A JP13053374A JPS5098279A JP S5098279 A JPS5098279 A JP S5098279A JP 49130533 A JP49130533 A JP 49130533A JP 13053374 A JP13053374 A JP 13053374A JP S5098279 A JPS5098279 A JP S5098279A
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Weting (AREA)
- Electrodes Of Semiconductors (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Drying Of Semiconductors (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US427887A US3922184A (en) | 1973-12-26 | 1973-12-26 | Method for forming openings through insulative layers in the fabrication of integrated circuits |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5098279A true JPS5098279A (enExample) | 1975-08-05 |
| JPS528677B2 JPS528677B2 (enExample) | 1977-03-10 |
Family
ID=23696704
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP49130533A Expired JPS528677B2 (enExample) | 1973-12-26 | 1974-11-14 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US3922184A (enExample) |
| JP (1) | JPS528677B2 (enExample) |
| CA (1) | CA1024663A (enExample) |
| DE (1) | DE2453528C2 (enExample) |
| FR (1) | FR2272489B1 (enExample) |
| GB (1) | GB1451160A (enExample) |
| IT (1) | IT1025191B (enExample) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4436593A (en) | 1981-07-13 | 1984-03-13 | Memorex Corporation | Self-aligned pole tips |
| JPS63167881U (enExample) * | 1987-04-23 | 1988-11-01 | ||
| DE69031543T2 (de) * | 1989-02-17 | 1998-04-09 | Matsushita Electronics Corp | Verfahren zum Herstellen einer Halbleitervorrichtung |
| JPH02237135A (ja) * | 1989-03-10 | 1990-09-19 | Fujitsu Ltd | 半導体装置の製造方法 |
| US5279990A (en) * | 1990-03-02 | 1994-01-18 | Motorola, Inc. | Method of making a small geometry contact using sidewall spacers |
| US5589423A (en) * | 1994-10-03 | 1996-12-31 | Motorola Inc. | Process for fabricating a non-silicided region in an integrated circuit |
| US10217707B2 (en) * | 2016-09-16 | 2019-02-26 | International Business Machines Corporation | Trench contact resistance reduction |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3504430A (en) * | 1966-06-27 | 1970-04-07 | Hitachi Ltd | Method of making semiconductor devices having insulating films |
| FR1569872A (enExample) * | 1968-04-10 | 1969-06-06 | ||
| US3753803A (en) * | 1968-12-06 | 1973-08-21 | Hitachi Ltd | Method of dividing semiconductor layer into a plurality of isolated regions |
| US3673018A (en) * | 1969-05-08 | 1972-06-27 | Rca Corp | Method of fabrication of photomasks |
| US3649393A (en) * | 1970-06-12 | 1972-03-14 | Ibm | Variable depth etching of film layers using variable exposures of photoresists |
| DE2127569A1 (de) * | 1970-06-25 | 1971-12-30 | Western Electric Co | Verfahren zur Herstellung einer dicken Oxidausbildung auf integrierten Halbleiterschaltungen |
| US3713922A (en) * | 1970-12-28 | 1973-01-30 | Bell Telephone Labor Inc | High resolution shadow masks and their preparation |
| US3823015A (en) * | 1973-01-02 | 1974-07-09 | Collins Radio Co | Photo-masking process |
-
1973
- 1973-12-26 US US427887A patent/US3922184A/en not_active Expired - Lifetime
-
1974
- 1974-10-08 FR FR7441615A patent/FR2272489B1/fr not_active Expired
- 1974-10-25 IT IT28782/74A patent/IT1025191B/it active
- 1974-11-12 DE DE2453528A patent/DE2453528C2/de not_active Expired
- 1974-11-14 JP JP49130533A patent/JPS528677B2/ja not_active Expired
- 1974-11-15 CA CA213,806A patent/CA1024663A/en not_active Expired
- 1974-11-29 GB GB5174074A patent/GB1451160A/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| DE2453528C2 (de) | 1982-04-15 |
| CA1024663A (en) | 1978-01-17 |
| IT1025191B (it) | 1978-08-10 |
| FR2272489B1 (enExample) | 1978-02-24 |
| DE2453528A1 (de) | 1975-07-10 |
| GB1451160A (en) | 1976-09-29 |
| JPS528677B2 (enExample) | 1977-03-10 |
| FR2272489A1 (enExample) | 1975-12-19 |
| US3922184A (en) | 1975-11-25 |