JPH1197437A - Manufacture of semiconductor device and equipment therefor - Google Patents

Manufacture of semiconductor device and equipment therefor

Info

Publication number
JPH1197437A
JPH1197437A JP25334697A JP25334697A JPH1197437A JP H1197437 A JPH1197437 A JP H1197437A JP 25334697 A JP25334697 A JP 25334697A JP 25334697 A JP25334697 A JP 25334697A JP H1197437 A JPH1197437 A JP H1197437A
Authority
JP
Japan
Prior art keywords
wafer
substrate
sog
solution
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP25334697A
Other languages
Japanese (ja)
Inventor
Fushimi Akibayashi
節美 秋林
Yasutaka Ishibashi
保孝 石橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Asahi Kasei Microsystems Co Ltd
Original Assignee
Asahi Kasei Microsystems Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Asahi Kasei Microsystems Co Ltd filed Critical Asahi Kasei Microsystems Co Ltd
Priority to JP25334697A priority Critical patent/JPH1197437A/en
Publication of JPH1197437A publication Critical patent/JPH1197437A/en
Pending legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a method and an equipment of manufacturing of a semiconductor device in which surface flatness of an SOG(spin-on glass) film prepared on a semiconductor substrate is improved, by spin-coating the SOG solution onto a substrate, planarizing the layer of the coated SOG solution, and further by applying ultrasonic vibration to the substrate. SOLUTION: In the equipment, an evacuation path 14, which runs to an open end in a suction pad 13, is provided inside a rotary axis 12 of a rotary chuck 11. An ultrasonic-wave generating transducer 15 is embedded in the suction pad 13, so that the ultrasonic vibration is applied to a substrate 16 in the direction normal to the surface of the substrate 16 which is vacuumchucked on the suction pad 13. An interlayer insulator film is prepared on the substrate wafer 16 in the following way: An SOG solution is dripped onto the central part of the wafer 16, and the rotary chuck 11 is rotated to spread out the SOG solution onto the whole surface area of the wafer 16. Then, the ultrasonic-wave transducer 15 is operated to apply ultrasonic vibration to the wafer 16. The solution is dried while the wafer 16 is rotating. After the wafer 16 having the SOG film is rinsed, thickness of the interlayer insulator film is measured.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は半導体装置の製造方
法および製造装置に関し、特に半導体装置の層間絶縁膜
を形成する方法および装置に関する。
The present invention relates to a method and an apparatus for manufacturing a semiconductor device, and more particularly to a method and an apparatus for forming an interlayer insulating film of a semiconductor device.

【0002】[0002]

【従来の技術】半導体装置の層間絶縁膜の形成方法とし
ては、熱酸化法、CVD法、スパッタ法などがあり、S
iO2 膜の形成にはこれらのいずれかの方法、リンシリ
ケート膜(PSG膜)、ボロンリンシリケート膜(BP
SG膜)、窒化シリコン膜の形成にはCVD法が一般に
適用されている。しかし、これらの方法によって形成さ
れた層間絶縁膜の平坦性は必ずしも良くなかった。
2. Description of the Related Art Methods for forming an interlayer insulating film of a semiconductor device include a thermal oxidation method, a CVD method, and a sputtering method.
For forming the iO 2 film, any of these methods, a phosphorus silicate film (PSG film), a boron phosphorus silicate film (BP)
An SG film) and a silicon nitride film are generally formed by a CVD method. However, the flatness of the interlayer insulating film formed by these methods was not always good.

【0003】表面平坦性の良い層間絶縁膜の形成法にS
OG(spin on glass)法という方法があ
る。これはケイ素化合物およびバインダー等の添加剤を
有機溶剤に溶かしたSOG溶液を半導体基板の表面に回
転塗布し、その後熱処理を施して無機質のSiO2 膜を
基板上に形成する方法である。SOG溶液を基板上に回
転塗布すると、溶液は基板上の段差の凹部には厚く、凸
部には薄く、段差を緩和するように皮膜が形成される。
このために上層に形成される皮膜のステップカバレージ
を改善することができる。
A method for forming an interlayer insulating film having good surface flatness is S
There is a method called an OG (spin on glass) method. In this method, an SOG solution in which an additive such as a silicon compound and a binder is dissolved in an organic solvent is spin-coated on the surface of a semiconductor substrate, and then heat-treated to form an inorganic SiO 2 film on the substrate. When the SOG solution is spin-coated on the substrate, the solution is thick in the concave portions of the steps and thin in the convex portions on the substrate, and a film is formed so as to reduce the steps.
For this reason, the step coverage of the film formed on the upper layer can be improved.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、従来の
SOG法によって形成される皮膜の平坦性は十分ではな
く、改善の必要があった。本発明はこれまでのSOG法
を改良して、形成された皮膜の表面平坦性をさらに向上
させることを目的とする。
However, the flatness of the film formed by the conventional SOG method is not sufficient, and needs to be improved. An object of the present invention is to improve the conventional SOG method so as to further improve the surface flatness of a formed film.

【0005】[0005]

【課題を解決するための手段】上記目的を達成するため
に、本発明による半導体装置の製造方法は、半導体基板
上にSOG溶液を回転塗布した後、前記半導体基板に超
音波振動を印加して塗布されたSOG溶液を平坦化する
工程を有することを特徴とする。
In order to achieve the above object, a method of manufacturing a semiconductor device according to the present invention comprises applying an SOG solution onto a semiconductor substrate by spin coating, and then applying ultrasonic vibration to the semiconductor substrate. A step of flattening the applied SOG solution.

【0006】本発明による半導体装置の製造装置は、半
導体基板を真空吸着し、かつ回転させる回転チャックに
超音波振動子が埋設されていることを特徴とする。
An apparatus for manufacturing a semiconductor device according to the present invention is characterized in that an ultrasonic vibrator is embedded in a rotary chuck for vacuum-sucking and rotating a semiconductor substrate.

【0007】[0007]

【発明の実施の形態】本発明においては、スピンコータ
ーを用いて半導体基板の表面にSOG溶液を塗布し、塗
布されたSOG溶液が固化する前に、半導体基板に超音
波振動を与えてSOG溶液の流動を促進する。その結
果、形成された皮膜の平坦性が向上する。本発明は半導
体装置の層間絶縁膜の形成に特に有効である。
DESCRIPTION OF THE PREFERRED EMBODIMENTS In the present invention, an SOG solution is applied to the surface of a semiconductor substrate using a spin coater, and ultrasonic vibration is applied to the semiconductor substrate before the applied SOG solution solidifies. Promotes the flow of As a result, the flatness of the formed film is improved. The present invention is particularly effective for forming an interlayer insulating film of a semiconductor device.

【0008】半導体基板に超音波振動を与えるために、
本発明による装置は、スピンコーターに代表されるよう
な、半導体基板を真空吸着し、かつ回転させる回転チャ
ックに超音波振動子を埋設する。これによって、層間絶
縁膜の形成工程の中で、必要な時期に、半導体基板に有
効に超音波振動を与えることができる。
In order to apply ultrasonic vibration to a semiconductor substrate,
The apparatus according to the present invention embeds an ultrasonic vibrator in a rotary chuck, such as a spin coater, which vacuum-adsorbs and rotates a semiconductor substrate. This makes it possible to effectively apply ultrasonic vibration to the semiconductor substrate at a necessary time in the process of forming the interlayer insulating film.

【0009】[0009]

【実施例】【Example】

(比較例)直径6インチのシリコンウエハーを従来のス
ピンコーターの回転チャックに真空吸着した。このシリ
コンウエハー1は、図1に示すように、すでにトランジ
スタ、ダイオードなどの素子2およびそれらの素子のた
めのアルミニウム配線3が形成され、さらにアルミニウ
ム配線3上の所定の位置に層間配線のための金属プラグ
4が形成されている段階のものである。符号5は絶縁膜
である。プラグ4の高さと幅はそれぞれ0.7μm,1
チップ内のプラグ4間の距離は最短で0.8μmであ
る。
(Comparative Example) A silicon wafer having a diameter of 6 inches was vacuum-adsorbed to a rotary chuck of a conventional spin coater. As shown in FIG. 1, elements 2 such as transistors and diodes and aluminum wirings 3 for these elements are formed on this silicon wafer 1, and furthermore, at predetermined positions on the aluminum wiring 3, interlayer wirings are formed. This is a stage where the metal plug 4 is formed. Reference numeral 5 denotes an insulating film. The height and width of the plug 4 are 0.7 μm and 1 respectively.
The minimum distance between the plugs 4 in the chip is 0.8 μm.

【0010】ウエハー中央部にSOG溶液(東京応化
(株)Type−10)を3ml滴下し、回転チャック
を100rpmで0.5秒間、さらに3500rpmで
1秒間回転させて、SOG溶液をウエハ全面に展開させ
た。さらに回転を続けて、溶液の乾燥、リンスなどを行
い、最後に2000rpmで13秒回転させた。ウエハ
ーを回転チャックからはずし、80℃のホットプレート
2枚、150℃のホットプレート2枚、230℃のホッ
トプレート2枚を用い、ホットプレート1枚当たり1分
間熱処理して層間絶縁膜を形成した。
3 ml of an SOG solution (Type-10, Tokyo Ohka Co., Ltd.) is dropped at the center of the wafer, and the rotating chuck is rotated at 100 rpm for 0.5 seconds and further at 3500 rpm for 1 second to spread the SOG solution over the entire surface of the wafer. I let it. The rotation was further continued, and the solution was dried, rinsed, and the like, and finally rotated at 2000 rpm for 13 seconds. The wafer was removed from the rotary chuck, and heat treatment was performed for one minute per hot plate using two 80 ° C. hot plates, two 150 ° C. hot plates, and two 230 ° C. hot plates to form an interlayer insulating film.

【0011】この層間絶縁膜の平坦性を測定した。平坦
性の指標として、図2に示す層間絶縁膜6の最大段差d
および最大段差部7の表面の最大傾斜角θを採用した。
プラグ間の距離の多きところで段差は大きくなる。この
比較例では、最大段差dは0.28μm、最大傾斜角θ
は17度であった。
The flatness of the interlayer insulating film was measured. As an index of flatness, the maximum step d of the interlayer insulating film 6 shown in FIG.
And the maximum inclination angle θ of the surface of the maximum step portion 7 was adopted.
The step becomes large where the distance between the plugs is large. In this comparative example, the maximum step d is 0.28 μm, and the maximum inclination angle θ
Was 17 degrees.

【0012】(実施例)図3に本発明の装置の実施例を
示す。回転チャック11の回転軸12には吸着パッド1
3に連通してパッドの表面に開口する真空経路14が設
けられている。この吸着パッド13に超音波振動子15
が埋設されており、吸着パッド13に真空吸着されてい
るウエハー16に厚さ方向の超音波振動を与えることが
できる。
(Embodiment) FIG. 3 shows an embodiment of the apparatus of the present invention. The suction pad 1 is provided on the rotating shaft 12 of the rotating chuck 11.
3 is provided with a vacuum path 14 that opens to the surface of the pad in communication with 3. The ultrasonic vibrator 15 is attached to the suction pad 13.
Is embedded, and it is possible to apply ultrasonic vibration in the thickness direction to the wafer 16 that is vacuum-sucked on the suction pad 13.

【0013】上述した比較例と全く同じシリコンウエハ
ーを用いて層間絶縁膜を形成した。3mlのSOG溶液
をウエハー中央部に滴下し、回転チャックを100rp
mで0.5秒間、さらに3500rpmで1秒間回転さ
せて、SOG溶液をウエハ全面に展開させた。そして同
じ回転点数で回転させながら超音波振動子を作動させ、
2MHz(出力25W)の超音波振動を1秒間ウエハー
に印加した。以後、比較例と同様に、ウエハーを回転さ
せながら、溶液の乾燥、リンスなどを行い、最後に20
00rpmで13秒回転させた。ウエハーを回転チャッ
クからはずし、80℃のホットプレート2枚、150℃
のホットプレート2枚、230℃のホットプレート2枚
を用い、ホットプレート1枚当たり1分間熱処理して層
間絶縁膜を形成した。
An interlayer insulating film was formed using the same silicon wafer as the comparative example. 3 ml of SOG solution is dropped on the center of the wafer, and the rotating chuck is rotated at 100 rpm.
The SOG solution was spread over the entire surface of the wafer by rotating the wafer at 0.5 m for 0.5 second and further at 3500 rpm for 1 second. And the ultrasonic vibrator is operated while rotating at the same number of rotation points,
Ultrasonic vibration of 2 MHz (output 25 W) was applied to the wafer for 1 second. Thereafter, while rotating the wafer, drying and rinsing of the solution were performed as in the comparative example.
Rotated at 00 rpm for 13 seconds. Remove the wafer from the rotating chuck, 2 hot plates at 80 ° C, 150 ° C
Using two hot plates at 230 ° C. and two hot plates at 230 ° C., heat treatment was performed for one minute per hot plate to form an interlayer insulating film.

【0014】この層間絶縁膜の平坦性を測定した。本実
施例では、最大段差dは0.17μm、最大傾斜角θは
10度であり、段差は浅くかつ緩くなり、比較例に比べ
て平坦性が著しく改善された。平坦効果を得るための超
音波振動子の出力は最低5Wは必要であり、実用上の観
点からは30W程度の出力で充分である。
The flatness of the interlayer insulating film was measured. In this example, the maximum step d was 0.17 μm and the maximum inclination angle θ was 10 degrees, the step was shallow and gentle, and the flatness was significantly improved as compared with the comparative example. The output of the ultrasonic vibrator must be at least 5 W to obtain the flat effect, and from the practical viewpoint, an output of about 30 W is sufficient.

【0015】図3に示した装置は、半導体装置の製造工
程におけるSOG膜の形成のみでなく、スピンコーティ
ング一般に使用できることは明らかである。
It is apparent that the apparatus shown in FIG. 3 can be used not only for forming an SOG film in a semiconductor device manufacturing process but also for spin coating in general.

【0016】[0016]

【発明の効果】以上説明したように、本発明によれば層
間絶縁膜の平坦性を向上させることができる。従って、
その上層に形成される例えば配線層は過大なステップカ
バレージを要求されることがなく、段差部における断線
などを生じることがないので、半導体装置全体としての
性能または製造歩留まりを高めることができる。
As described above, according to the present invention, the flatness of the interlayer insulating film can be improved. Therefore,
For example, a wiring layer formed thereover does not require excessive step coverage and does not cause disconnection or the like at a step portion, so that the performance or manufacturing yield of the semiconductor device as a whole can be improved.

【図面の簡単な説明】[Brief description of the drawings]

【図1】層間絶縁膜が形成されるウエハーの表面形状を
説明するための断面図である。
FIG. 1 is a cross-sectional view for explaining a surface shape of a wafer on which an interlayer insulating film is formed.

【図2】層間絶縁膜の表面平坦性を説明する図である。FIG. 2 is a diagram illustrating the surface flatness of an interlayer insulating film.

【図3】本発明による装置の実施例を示す図である。FIG. 3 shows an embodiment of the device according to the invention.

【符号の説明】[Explanation of symbols]

1 シリコンウエハー 2 素子 3 アルミニウム配線 4 プラグ 5 絶縁膜 6 層間絶縁膜 7 最大段差部 11 回転チャック 12 回転軸 13 吸着パッド 14 真空経路 15 超音波振動子 16 ウエハー DESCRIPTION OF SYMBOLS 1 Silicon wafer 2 Element 3 Aluminum wiring 4 Plug 5 Insulating film 6 Interlayer insulating film 7 Maximum step 11 Rotation chuck 12 Rotation shaft 13 Suction pad 14 Vacuum path 15 Ultrasonic transducer 16 Wafer

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 半導体基板上にSOG溶液を回転塗布し
た後、前記半導体基板に超音波振動を印加して塗布され
たSOG溶液を平坦化する工程を有することを特徴とす
る半導体装置の製造方法。
1. A method of manufacturing a semiconductor device, comprising: after spin-coating an SOG solution on a semiconductor substrate, applying ultrasonic vibration to the semiconductor substrate to flatten the applied SOG solution. .
【請求項2】 半導体基板を真空吸着し、かつ回転させ
る回転チャックに超音波振動子が埋設されていることを
特徴とする半導体装置の製造装置。
2. An apparatus for manufacturing a semiconductor device, wherein an ultrasonic vibrator is embedded in a rotary chuck for vacuum-sucking and rotating a semiconductor substrate.
JP25334697A 1997-09-18 1997-09-18 Manufacture of semiconductor device and equipment therefor Pending JPH1197437A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25334697A JPH1197437A (en) 1997-09-18 1997-09-18 Manufacture of semiconductor device and equipment therefor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25334697A JPH1197437A (en) 1997-09-18 1997-09-18 Manufacture of semiconductor device and equipment therefor

Publications (1)

Publication Number Publication Date
JPH1197437A true JPH1197437A (en) 1999-04-09

Family

ID=17250058

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25334697A Pending JPH1197437A (en) 1997-09-18 1997-09-18 Manufacture of semiconductor device and equipment therefor

Country Status (1)

Country Link
JP (1) JPH1197437A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007109726A (en) * 2005-10-11 2007-04-26 Oki Electric Ind Co Ltd Method of forming inclined face, wiring structure and method of forming same, coating layer of level difference structure, and semiconductor device
US20080064212A1 (en) * 2006-08-25 2008-03-13 Yoshihiro Ogawa Method of manufacturing semiconductor device
JP2009049339A (en) * 2007-08-23 2009-03-05 Denso Corp Method of manufacturing semiconductor device
JP2015223556A (en) * 2014-05-28 2015-12-14 株式会社ディスコ Coating method of protective film
KR20160014350A (en) * 2014-07-29 2016-02-11 울산대학교 산학협력단 Sonication spin coater and spin coating method using the same
JP2017195296A (en) * 2016-04-21 2017-10-26 信越化学工業株式会社 Method of forming organic film, and method of manufacturing substrate for semiconductor device
US10324756B2 (en) 2011-07-26 2019-06-18 International Business Machines Corporation Dynamic reduction of stream backpressure

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007109726A (en) * 2005-10-11 2007-04-26 Oki Electric Ind Co Ltd Method of forming inclined face, wiring structure and method of forming same, coating layer of level difference structure, and semiconductor device
US20080064212A1 (en) * 2006-08-25 2008-03-13 Yoshihiro Ogawa Method of manufacturing semiconductor device
JP2009049339A (en) * 2007-08-23 2009-03-05 Denso Corp Method of manufacturing semiconductor device
US10324756B2 (en) 2011-07-26 2019-06-18 International Business Machines Corporation Dynamic reduction of stream backpressure
JP2015223556A (en) * 2014-05-28 2015-12-14 株式会社ディスコ Coating method of protective film
KR20160014350A (en) * 2014-07-29 2016-02-11 울산대학교 산학협력단 Sonication spin coater and spin coating method using the same
JP2017195296A (en) * 2016-04-21 2017-10-26 信越化学工業株式会社 Method of forming organic film, and method of manufacturing substrate for semiconductor device

Similar Documents

Publication Publication Date Title
JPH1197437A (en) Manufacture of semiconductor device and equipment therefor
JP3631076B2 (en) Semiconductor device structure
US6020265A (en) Method for forming a planar intermetal dielectric layer
US5821162A (en) Method of forming multi-layer wiring utilizing SOG
JP2002134466A (en) Method of manufacturing semiconductor device
JP3127983B2 (en) Method for manufacturing semiconductor device
JPS6165459A (en) Manufacture of semiconductor device
KR0124144B1 (en) Semiconductor device including silicon ladder resin layer
JP2643793B2 (en) Semiconductor device and manufacturing method thereof
JPH0555199A (en) Semiconductor device
JPH0565049B2 (en)
JP3259363B2 (en) Method of forming bonding pad structure for semiconductor device
JP3041929B2 (en) Flattening method
JP3353539B2 (en) Method for manufacturing semiconductor device
JP2856489B2 (en) Method for manufacturing semiconductor device
KR0128806B1 (en) Interlayer insulating film forming method of semiconductor device
JP4245446B2 (en) Manufacturing method of semiconductor device
JPH09167761A (en) Deposition of sog film
JP2877151B2 (en) Method for manufacturing semiconductor device
KR100282073B1 (en) Method of manufacturing semiconductor device
JPH03237722A (en) Method of flattening multilayer wiring
JPH01207931A (en) Manufacture of semiconductor device
JPH0448634A (en) Manufacture of semiconductor device
JP2000232100A (en) Semiconductor device and its manufacture
JPH05308073A (en) Manufacture of semiconductor device

Legal Events

Date Code Title Description
A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20030822