JPH1197412A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make etching have directivity, by introducing one kind of ion selected from phosphorus and a boron group and a hydrogen ion into a pattern mask formed on the thin film on a substrate, etching the thin film by an etching method having various etching rates, and forming a contact hole. SOLUTION: When a photoresist patterned into a desired pattern is used as a mask and ions are implanted unto a solid material film, ions are permitted to exist only in a solid material region to be etched. As an etching reaction speed changes by ion concentration, when the ion concentration in the etching region is controlled so as to have the reaction speed in the etching region to be higher than that in the etching region where ions do not exist, it is possible to make etching have directivity. For example, when etching is performed with 4% dilute HF, the region of an SiOx film 2 wherein phosphorus is implanted can be etched at a higher speed than the regions other than the regions covered with the resist pattern 3.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a thin film semiconductor device, and more particularly, to an etching method used for manufacturing a thin film semiconductor device.

[0002]

2. Description of the Related Art Conventionally, in the process of manufacturing a semiconductor device formed on a silicon substrate or an insulating substrate, a photoresist is processed to form a resist pattern, and this resist pattern is used as a mask to provide a highly directional pattern. The material to be processed was etched by dry etching. In this case, in order to achieve fine processing accuracy, it is necessary to increase the directionality of the etching, but in general, it is necessary to increase the energy of ions in order to increase the directionality. There has been a problem that the high energy causes damage to the substrate and the surrounding materials.

Further, when manufacturing a semiconductor device on a large insulating substrate, it is not always easy to make the etching rate uniform over the entire surface, and moreover, the etching selectivity between the material to be processed and its underlying material is increased. Is not sufficiently large, over-etching of the underlying material becomes a problem, but in general, it is not easy to increase the etching selectivity in dry etching as compared to wet etching.

These problems can be solved to some extent by using wet etching instead of dry etching. However, since wet etching is isotropic etching, it has a drawback that it is not suitable for fine processing.

[0005]

In the wet etching, isotropic etching is performed because the etching proceeds due to the reaction between the material to be processed and the etching solution. However, it is expected that if the reaction speed is directional, wet etching can be directional. However, it has been difficult to give directionality to the reaction speed.

The present invention has been made in view of the above circumstances, and provides a semiconductor device capable of providing etching directionality, increasing the etching selectivity between a material to be processed and a base material, and thereby achieving etching capable of fine processing. It is an object of the present invention to provide a method for producing the same.

[0007]

Means for Solving the Problems In order to achieve the above object, the present inventors have conducted intensive studies and as a result, have found that the etching rate differs between a region where predetermined ions including hydrogen are introduced and a region where the ions are not introduced. It has been found that, by utilizing this phenomenon, it is possible to give directionality to the etching, and it is possible to increase the etching selectivity between the material to be processed and the semiconductor substrate, leading to the present invention. Was.

That is, the present invention provides a step of forming a thin film on a semiconductor substrate, a step of applying a mask having a predetermined pattern to the thin film, and a step of forming a thin film on the thin film from a group consisting of phosphorus and boron from above the mask. One species and hydrogen ion,
A step of introducing a non-mass separation type ion implantation method and a step of selectively etching the thin film to form a contact hole by an etching method in which an etching rate is different between a region where the ions are introduced and a region where the ions are not introduced. And a method for manufacturing a semiconductor device, comprising:

According to the method of the present invention, directionality is obtained in etching, and it is possible to form a contact hole having a fine size with high accuracy. In addition, since hydrogen ions are also implanted, the introduced hydrogen reaches the surface of the underlying semiconductor substrate, where it combines with the underlying dangling bonds to stabilize the underlying surface. Can have a large etching selectivity.

[0010] 1 selected from the group consisting of phosphorus and boron
Among species and hydrogen ions, phosphorus and hydrogen ions are
For example, it can be introduced in the form of phosphine (PH ₃ ). Boron and hydrogen ions can be introduced, for example, in the form of diborane (B ₂ H ₆ ).

As an etching method, a dry etching method and a wet etching method can be used.
According to the present invention, the wet etching method, which has been conventionally isotropic, can be given directionality, so that the wet etching method can be suitably used. Also,
A dry etching method in which the etching selectivity between the material to be processed and the underlying material cannot be made large can also be suitably used.

Hereinafter, the principle of the present invention will be described in more detail. When ions are implanted into a solid material, for example, a silicon oxide film using a photoresist patterned into a desired pattern as a mask, the ions can be present only in a region to be etched of the solid material. At this time, the etching reaction rate in the region to be etched changes depending on the ion concentration. Therefore, by controlling the ion concentration in the region to be etched so that the reaction speed in the region to be etched is higher than the reaction speed in the non-etching region where no ions are present, the etching can be made directional.

For example, a P-etch solution (HF: NO ₃ : H
₂ O = 3: _2: 60 in the etching of the silicon oxide film by), the relationship between phosphorus concentration and the etching rate of the silicon oxide film is described in Japanese Patent Publication Sho 60-128622, using a photoresist there Instead, the focused ion beam is directly applied to the region to be etched to implant ions into the region to be etched, and then the etching is performed to realize directional wet etching.

On the other hand, according to the present invention, an insulating film pattern, for example, a resist pattern is formed on the surface of a material to be processed, and ions are implanted over the entire surface by a technique such as ion implantation using this as a mask. In addition, a single ion implantation enables directional etching in a plurality of regions.

When dry etching is used in the method of the present invention, the etching rate can be increased for the same reason as in the case of wet etching, and high directivity can be obtained with lower energy than in the conventional case. Therefore, damage to the substrate and the surrounding materials does not occur. Further, since the introduced hydrogen reaches the surface of the underlying semiconductor layer and combines with the underlying dangling bond to stabilize the underlying surface, the etching selectivity between the material to be processed and the underlying material may be increased. I can do it.

[0016]

BEST MODE FOR CARRYING OUT THE INVENTION

(Embodiment 1) In this embodiment, wet etching of a SiO _x (silicon oxide) film using diluted HF (hydrofluoric acid) will be described with reference to FIGS.

First, 50 .mu.m is formed on the Si substrate 1 by the CVD method.
An SiO _x film 2 having a thickness of 0 nm was formed. Next, a photoresist was applied on the SiO _x film 2, and the photoresist was patterned to form a resist pattern 3. Next, using the resist pattern 3 as a mask, the SiO _x film 2 is subjected to non-mass separation type ion doping using PH ₃ under the conditions of an energy of 10 keV and a dose of 2 × 10 ¹⁹ / cm ^2. (Phosphorus) was ion-implanted.

At this time, in the region 4 to be etched of the SiO _x film 2 exposed from the resist pattern, P
Molar percent was present. Figure 2 shows the relationship between the etching rate of the concentration of phosphorus and SiO _x film in SiO _x film. In the figures, the phosphorus concentration (mol%) is a value in terms of P ₂ O ₅ . From Figure 2, in accordance with the concentration of phosphorus in the SiO _x film increases, it can be seen that the etching rate of the SiO _x film is increased.

According to FIG. 2, SiO 2 without phosphorus implantation is used.
The etching rates when the _x film (phosphorus concentration: 0 mol%) and the SiO _x film implanted with 4 mol% of phosphorus are wet-etched with 4% dilute HF are 2 at 25 ° C.
Angstroms / sec and 6 Angstroms / sec. That is, the etching rate of the SiO _x film in which phosphorus is implanted at 4 mol% is three times the etching rate of the SiO _x film in which phosphorus is not implanted.

For this reason, when the structure shown in FIG. 1A is etched with 4% dilute HF, the region 4 to be etched of the SiO _x film 2 into which phosphorus is implanted is higher than the other regions covered with the resist pattern 3. For example, when a contact hole having a design value of 2 μm is formed, the pattern conversion difference with respect to the resist pattern 3 is 0.2 μm.
The following suppressed pattern was formed.

On the other hand, SiO _x without phosphorus implantation is used.
In conventional wet etching of a film, since etching proceeds isotropically, an extremely large etching hole is formed.

Since this method is self-aligned with the resist pattern, if a larger amount of ions can be implanted, a pattern with a smaller pattern conversion difference can be obtained, which is difficult with ordinary wet etching. Fine processing of forming a contact hole of 1 μm or less is also possible.

(Embodiment 2) This embodiment is a modification of the first embodiment. In the first embodiment, SiO _x
Although P (phosphorus) is used as ions to be implanted into the film, B (boron) is used in this embodiment. FIG. 3 shows the relationship between the B concentration in the SiO _x film and the etching rate of SiO _x by low-buffered dilute hydrofluoric acid. In addition, boron concentration (mol%)
Is a value in terms of B ₂ O ₅ . From Figure 3, in accordance with the concentration of boron in the SiO _x film increases, it can be seen that the etching rate of the SiO _x film is increased.

Using the same resist pattern as that of the first embodiment, a non-mass separation type ion doping method using B ₂ H ₆ is performed, and the energy is 10 keV and the dose is 5 × 10 ^20.
/ Cm ² , the concentration of B in the exposed SiO _x film is about 10 mol%,
This was wet-etched with 10% BHF. For example, when a contact hole having a design value of 2 μm was formed, the pattern conversion difference from the resist pattern was 0.5%.
A pattern suppressed to μm or less was formed, and the same effect as in the first example was confirmed.

Embodiment 3 In this embodiment, an example in which the present invention is applied to the manufacture of an NMOS TFT having a rule of 3 μm on a large glass substrate will be described with reference to FIG. In this example, a case is shown in which a contact hole having a diameter of 3 μm is formed in an SiO _x film having a thickness of 6000 Å.

First, a 3000 angstrom thick S substrate was placed on a glass substrate 11 having a size of 300 mm × 400 mm.
An iO _x film 12 is formed, followed by a 500 Å thick a-S film serving as a semiconductor layer of a thin film transistor.
An i (amorphous silicon) layer is formed by a plasma CVD method. Next, excimer laser annealing (ELA) is performed on the a-Si layer to form a p-Si (polycrystalline silicon) layer 13.

Next, a resist is coated on the p-Si layer 13, and the resist is patterned to form a resist pattern. Then, using the resist pattern as a mask, the p-Si layer 13 is dry-etched. Was processed.

Thereafter, an SiO _x film 14 having a thickness of 1000 Å is formed as a gate insulating film by a CVD method. Next, P (phosphorus) ions are implanted into the p-Si layer 13 to form a source region and a drain region. Thereafter, a film of a molybdenum-tungsten alloy (MoW) is formed and processed by dry etching to form the gate electrode 15.

Next, an SiO _x film having a thickness of 5000 Å is formed as the interlayer insulating film 16 by the CVD method, and thereafter, the activation process of the source region and the drain region is performed by using the ELA.

Subsequently, a photoresist is applied and is patterned into the shape of a contact hole to form a resist pattern. Using this resist pattern as a mask, an energy of 10 keV and a dose of 5 × 10 ¹⁸ / c are used.
Under the condition of m ² , PH ₃ (phosphine) was ion-doped, and P was implanted into the region to be etched of the interlayer insulating film 16.

Thereafter, the interlayer insulating film 16 was wet-etched with dilute hydrofluoric acid using the resist pattern as a mask. As a result, the design value of the contact hole diameter 3
μm, the formed contact hole diameter is 3.5 μm
Thus, a contact hole having a pattern conversion difference suppressed to 0.5 μm or less could be obtained.

On the other hand, in the conventional wet etching method, when a contact hole having a diameter of 3 μm is to be formed,
The contact hole expands to a diameter of about 5 μm. Further, the etching often progresses greatly at the bottom of the hole, resulting in a defect that the etching cross-sectional shape becomes an inverted mortar shape.
Therefore, such a problem does not occur because etching proceeds preferentially.

Next, an Al film was formed by a sputtering method, and this was patterned to form a signal line 18a and a source electrode 18b whose ends also functioned as drain electrodes. Furthermore,
A 4000 nm thick SiN _x film 19 was formed thereon by a plasma CVD method as a protective film. Then, Si
Opening of the pad portion to the N _x film 19 (not shown) and drilled, completed the MOSTFTs.

The TFT thus formed on the glass substrate operates normally, and forms a contact hole of the SiO _x film used to connect the semiconductor layer 13 and the gate electrode 15 to the signal line 18a and the source electrode 18b. Confirmed that there was no problem.

[0035]

As described above, according to the method of the present invention, it is possible to give directionality to wet etching which is originally isotropic and to use wet etching for forming a fine pattern. Excellent effects can be obtained. Further, since the etching selectivity between the material to be processed and the base material can be increased, excellent effects can be obtained even when dry etching is used.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a step of forming a contact hole according to a first embodiment of the present invention.

FIG. 2 is a characteristic diagram showing a relationship between a phosphorus concentration in a silicon oxide film and an etching rate of the silicon oxide film by dilute hydrofluoric acid.

FIG. 3 is a characteristic diagram showing a relationship between a boron concentration in a silicon oxide film and an etching rate of the silicon oxide film by dilute hydrofluoric acid.

FIG. 4 shows an NMOSTF obtained according to a third embodiment of the present invention.
Sectional drawing which shows T.

[Explanation of symbols]

1 ... Si substrate 2,12,14 ... SiO _x film 3 ... resist pattern 4 ... etched region 11 ... glass substrate 13 ... p-Si (polycrystalline silicon) layer 15 ... gate electrode 16 ... interlayer insulating film 17 ... to be etched Region 18a Signal line 18b Source electrode 19 SiN _x film.

Claims (4)

[Claims] Forming a thin film on a semiconductor substrate;
Applying a mask of a predetermined pattern to the thin film and introducing ions of one selected from the group consisting of phosphorus and boron and hydrogen ions from above the mask into the thin film by a non-mass separation type ion implantation method. And a step of selectively etching the thin film by an etching method in which an etching rate is different between a region where the ions are introduced and a region where the ions are not introduced to form a contact hole. Device manufacturing method. 2. The method according to claim 1, wherein the etching method is a dry etching method. 3. The method according to claim 1, wherein the etching method is a wet etching method. 4. The method according to claim 1, wherein the semiconductor substrate comprises an insulating substrate and a polycrystalline semiconductor layer formed thereon.