JPH1195250A - Method for inspecting lcd substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable the inspection of a substrate having no gate control terminals and the exact inspection of pixel defects by using the charges charged into the auxiliary capacitors of all pixels as discharge currents to an IV converter and successively measuring the peak values thereof. SOLUTION: The charges charged by the prescribed high voltage to the auxiliary capacitors of the prescribed pixels scanned through video terminals 23 are subjected to IV conversion and the peak values of the discharge currents are successively measured. The pixel defects relating to the respective pixels as well as the defects relating to X-Y scanning lines are decided. The measurement is executed by applying the set ring time capable of sufficiently discharging the charges of the auxiliary capacitors. Data lines and gate lines for pixel scanning are sequentially scanned at a desired low-speed clock and the discharge currents from the video terminals 23 are converted to voltage signals by the IV converter 42 of an IV conversion circuit 43. Peak voltages are held by an S and H circuit 34 and are subjected to prescribed amplification by an amplifier 35. The voltages are then subjected to AD conversion by a converter 36 and are successively stored into a buffer memory 38. Decision processing is executed by an image processing section 37 after the completion of the measurement.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a polycrystalline TFT.
The present invention relates to an LCD substrate inspection method for detecting a defect related to each pixel on an LCD substrate of a liquid crystal display such as a (Thin Film Transistor) and a defect related to an XY scanning line.

[0002]

2. Description of the Related Art A prior art example will be described below with reference to an example of an internal circuit configuration of an LCD board in FIG. 4, an example of a measurement configuration of an LCD board inspection apparatus in FIG. 5, and a measurement timing chart in FIG. As a conventionally known technique, Japanese Patent Application No.
No. 165385, there is an "LCD board inspection apparatus".

First, an internal circuit configuration and operation of the LCD substrate under test 10 shown in FIG. 4 will be briefly described. LC at inspection
The D substrate is a substrate on which no liquid crystal has been mounted yet. At this stage, the operation of many thin film transistors inside the substrate, disconnection of wiring patterns, short-circuiting or insulation failure with adjacent circuits, and leakage characteristics of auxiliary capacitors And so on. The LCD substrate 10 has a large number of parallel gate lines 19j (here, j = 1 to m) and a large number of parallel data lines (video signal scanning lines) 20i orthogonal thereto.
(Where i = 1 to n) are wired. At each of these intersections, a thin film transistor, which is a TFT, is arranged. The gate of the transistor is connected to the nearest gate line 19j, the source of the transistor is connected to the nearest data line 20i, and the drain of the transistor is connected to the drain of the transistor. The other end of the auxiliary capacitor 15ij is connected to the common ground terminal 22. Thus, a very large number of pixels are arranged in a matrix. Therefore, the video terminal 23 usually has a plurality of video terminals 231 to 23p.
Is generally used. Incidentally, a gate control terminal 9 is provided on a conventional general LCD substrate 10,
The output terminal of the row selection shift register 11 and the gate lines 191-
AND gates 18 1 to 18 m are provided between 19 m, and a row selection shift register 11
Has a circuit that can collectively prohibit the outputs.

Next, an LCD having the gate control terminal 9
A conventional inspection method for a substrate will be described below together with a measurement configuration example of the LCD substrate inspection apparatus of FIG. The configuration of the inspection apparatus includes a test pattern generation unit 39, an LCD substrate 10,
It includes a driver 40, an IV conversion circuit 43, an analog multiplexer 47, an S & H circuit (sample and hold circuit) 34, an amplifier 35, an AD converter 36, and an image processing unit 37. The internal configuration of the IV conversion circuit 43 is shown by a principle block.

According to the inspection method disclosed in Japanese Patent Application No. 08-165385, in the timing chart of the operation shown in FIG. 6, "(A) shows a column selection period in which one row is selected. That is, the writing period and the video line group 21
And the charge extinction period and the readout period of the stray capacitance of the data line 20i. (B) shows H applied to the video terminal 23.
Voltage and L voltage, for example, 12 V during the writing period.
During the other period, 0 V of the common ground potential is applied.
(C) is a gate control for turning off the gate line 19j, which is turned off only during the charge elimination period, that is, the so-called clear period. And the description "giving a signal from gate control terminal 9 to close gate 18j" in the circuit diagram shown in FIG. That is, the inspection method assumes an LCD substrate having the gate control terminal 9.

[0006]

As described above, the conventional inspection method has the gate control terminal 9 shown in FIG. 4 and controls the terminal to inhibit the output of the row selection shift register 11. . However, some LCD substrate types have the gate control terminal 9 and the AND gates 181 to 18m removed. Further, with the demand for quality improvement of color display and the like, it has become necessary to inspect and grasp defects related to specific pixels and XY scanning lines more accurately. Therefore, the problem to be solved by the present invention is to solve the problem of L having no gate control terminal.
An object of the present invention is to provide an inspection method relating to pixels and XY scanning lines of a CD substrate, and an LCD substrate inspection method which realizes a more accurate inspection method for pixel defects.

[0007]

FIG. 1, FIG. 2, FIG. 7, and FIG. 8 show a solution according to the present invention. First
In order to solve the above problem, in the configuration of the present invention, the auxiliary capacitor 15ij of the pixel formed in the XY lattice array in the LCD substrate 10 to be tested, the thin film transistors 141 1 to 14 nm for switching the auxiliary capacitor 15ij, and the XY scanning for driving the pixel In the LCD substrate inspection method for detecting lines (data lines for column scanning and gate lines for row scanning) and defects related thereto, data lines 201 to 20n for pixel scanning and gate lines 191 to 19m are provided.
Is sequentially charged and the auxiliary capacitor 15ij of a predetermined pixel scanned through the video terminal 23 is charged with a predetermined high voltage. The charging step 110 is performed on the signal path leading to the video terminal 23 and the data lines 201 to 20n for column scanning. The data lines 201 to 20n for scanning pixels and the gate lines 191 to 19m.
Is sequentially scanned, and the charges charged in the auxiliary capacitors 15ij of all the pixels through the video terminal 23 are IV-converted to sequentially measure the peak value of the discharge current.
30 is an inspection method including a judgment processing step 140 for judging a pixel defect relating to each pixel and a defect relating to the XY scanning line from the deviation of the average value of the peak values of the obtained measurement results. According to the above invention, it is possible to realize an inspection method relating to pixels of an LCD substrate having no gate control terminal and XY scanning lines.

FIG. 9 and FIG. 10 show a solution according to the present invention. Second, to solve the above problems,
In the configuration of the present invention, the auxiliary capacitors 15ij of the pixels formed in the XY lattice array in the LCD substrate 10 under test, the thin film transistors 141 1 to 14 nm for switching the auxiliary capacitors 15 ij, the XY scanning lines for driving the pixels, and the LCs for detecting defects related thereto.
In the D board inspection method, the data line 201 for pixel scanning is used.
20n and the gate lines 191 to 19m scan at least the auxiliary capacitor 15ij of the pixel of interest and the adjacent pixel or the auxiliary capacitor 15ij of the pixel on the pixel of interest and the adjacent scanning line, and through the video terminal 23, the pixel of interest or the pixel of interest. A charging step 110 for charging the auxiliary capacitor 15ij of the pixel with a predetermined high voltage and charging the auxiliary capacitor 15ij of an adjacent pixel or a pixel on an adjacent scanning line with a different predetermined voltage or zero voltage. Signal path and data line 2 for column scanning
A charge erasing step 120 for erasing charges on the data lines 201 to 20n to zero;
And the gate lines 191 to 19m are sequentially scanned, and the video terminal 23
A discharge reading step 130 for IV-converting the charge charged in the auxiliary capacitor 15ij of at least the pixel of interest and the adjacent pixel and sequentially measuring the peak value of the discharge current, and calculating the average value of the peak values of the obtained measurement results. There is an inspection method including a judgment processing step 140 for judging a pixel defect between adjacent pixels and a defect on an adjacent scanning line from the deviation. According to the present invention, it is possible to realize a more accurate inspection method for an insulation failure defect between an adjacent pixel or an adjacent XY scanning line on an LCD substrate that does not use a gate control terminal.

In the above-described inspection method, the discharge is repeatedly performed a predetermined number of times from a charging step 110 for charging and scanning the auxiliary capacitor 15ij of the pixel to a discharging reading step 130 for reading and scanning the charge stored in the auxiliary capacitor 15ij. There is a method of improving the S / N by adding an averaging process for cumulatively adding current data.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below in detail with reference to the drawings together with embodiments.

FIG. 1 is a timing chart of the measurement, FIG. 2 shows an example of an IV conversion output signal, FIG. 3 shows an example of the internal circuit configuration of an LCD substrate without a gate control terminal, and FIG. FIG. 8 shows an example of the measurement configuration of the inspection apparatus.
This will be described below with reference to an example of a two-dimensional array display of the pixel distribution of the measurement result. Elements corresponding to the conventional configuration are denoted by the same reference numerals.

Auxiliary capacitors 1511 to 15 nm of pixels formed in a grid array in the LCD substrate 10 to be tested, thin film transistors 141 1 to 14 nm for switching the same, XY scanning lines, and the LCD substrate of the present invention for detecting defects related thereto. The inspection method includes a charging step 110 described below,
A test is performed in the order of the scanning line charge erasing step 120, the discharge reading step 130, and the determination processing step 140. It should be noted that a flowchart showing the four steps is omitted.

The charging step 110 is a charge writing period shown in FIG. 1A, in which writing is performed on all the pixels in the same manner as a normal display scan for one frame of a liquid crystal screen. By performing the display scanning for one frame, it is possible to apply the present invention to a test object having no gate control terminal 9 like the LCD substrate of FIG. First, the LCD substrate 1 is so arranged that the data lines 201 to 20n for pixel scanning and the gate lines 191 to 19m are sequentially scanned.
A predetermined timing signal is generated and supplied from the test pattern generator 39 to DX, CLX1 to 4, DY, and CLY terminals of 0 (see FIGS. 1B to 1E). During this period, after the output signal of the test pattern generation section 39 is converted into a predetermined high voltage by the driver 40, the switch 41 of the IV conversion circuit 43 shown in FIG.
A high voltage (see FIG. 1F) is supplied to the video terminal 23 through the sub-pixels, and the auxiliary capacitors 15ij of all the pixels are charged to the high voltage. For the charging time of the auxiliary capacitor 15ij of each pixel, clocks CLX1 to CLX4 of a desired speed are supplied so that a sufficient charging settling time can be obtained.

In the scanning line charge erasing step 120, the output voltage of the driver 40 is set to zero, and the charges on the video line group 21 and the column scanning data lines 201 to 20n shown in FIG. 3 are erased to zero. That is, the signal DY is not applied, and the signal D
X and CLX1 to 4 only are applied, and data lines 201 to 2 are sequentially output.
0n is scanned, and the charge on the scanning line is erased to a zero state through the video terminal 23. In order to facilitate the detection of insulation failure between adjacent circuits, a desired longer waiting time may be given after the charge erasing step 120.

In the discharge reading step 130, the charges charged in the auxiliary capacitors 15ij of all the pixels are sequentially measured.
At this time, a desired low-speed clock (see FIG. 1E) is supplied from the test pattern generator 39 to supply the auxiliary capacitor 15ij
The measurement is performed by giving a settling time capable of sufficiently discharging the electric charge. First, the data lines 201 to 20n for pixel scanning and the gate lines 191 to
19m is sequentially scanned with a desired low-speed clock. The discharge current from the video terminal 23 by this scanning is supplied to the IV converter 42 through the switch 41 of the IV conversion circuit 43, and the discharge current is converted into a voltage signal (see FIG. 1G).
The peak voltage (see FIGS. 2D, 2E, and 2F) of the voltage signal is held by the S & H circuit 34 through the analog multiplexer 47, is amplified to a predetermined level by the amplifier 35, and is converted into digital data by the AD converter 36. 37 are sequentially stored in the buffer memory 38.

The determination processing step 140 is performed by the image processing section 37 after the above-described measurement is completed, and firstly, the detection and determination of the pixel defect relating to each pixel, and secondly, the detection and determination of the defect relating to the XY scanning line. That is, the first determination of the pixel defect relating to each pixel is performed by reading out the measurement data of all the pixels stored in the buffer memory 38, obtaining the average value of all the measurement data, and determining the average value of the defect of each pixel by a deviation from this. Is determined. For example, when the thin film transistor 14ij for the pixel switch has a disconnection defect, the charge of the auxiliary capacitor 15ij cannot be read out normally, and is detected as a small peak value (see FIG. 2E) or zero. Insulation failure or short circuit with an adjacent circuit is also detected as a small peak value. In the case of a short circuit between adjacent pixels, the auxiliary capacitor 15ij is connected in parallel, so that the charge is detected as a large peak value (see FIG. 2F) in the case of the first scan of both pixels, and in the case of the subsequent scan. Since the charge has been discharged, the peak value is detected as zero. As a first determination method of the defect related to the second XY scanning line, as shown in a distribution display example of a two-dimensional array of FIG. The defect factor can be easily determined from the situation. For example, from FIG. 8A, it can be easily determined as a disconnection in the middle of the data line 201, from FIG. 8B, it can be easily determined as a disconnection in the middle of the gate line 19j, and from FIG. 8C, it can be easily determined as a short between adjacent data lines 20i. As a second method of determining a defect related to the XY scanning line, an average value of each scanning line in a unit of a column is obtained from the above-mentioned measurement data. There is also a method of judging as a defect related to a scanning line.

Incidentally, in order to improve the S / N at the time of measurement, if necessary, the above-mentioned charging step 110 to discharging reading step 130 are repeatedly carried out a predetermined number of times, and cumulatively added to the buffer memory 38 for averaging (averaging).
It is also possible to add a means for performing this.

According to the method of the invention described above, the method includes the charging step 110, and the scanning line charge erasing step 1
20 and the discharge readout step 130 and the judgment processing step 140, the inspection method of the LCD substrate can be realized without using the gate control terminal 9, and the pixel defect related to each pixel and XY There is a great advantage that it is possible to detect a defect related to a scanning line.

In the above description of the embodiment, a specific example in which the auxiliary capacitors 15ij of all the pixels are charged to a predetermined high voltage has been described. If there is an insulation failure between adjacent pixels or between pixels on an adjacent scanning line, it may be difficult to detect and identify the failure depending on the failure condition. In this case, as another inspection method for specifying insulation failure between adjacent circuits,
At the time of the charging step 110, as shown in the measurement timing chart of FIG. 10 and the charging state diagrams of FIGS. 9A and 9B, the high voltage H is written to the pixel of interest or the pixel of the scanning line, and Alternatively, charging is performed by writing a zero voltage L to the pixels on the adjacent scanning line to give a potential difference between adjacent circuits. Thereafter, a desired waiting time is provided for facilitating detection of insulation failure between adjacent pixels. After the elapse of the waiting time, the discharge reading step 13 of the above-described embodiment is performed.
With 0, the discharge current of the entire or related pixel area is read out and measured in the same manner. Then, by calculating the difference between the value obtained in advance for the average value of the other pixels or the scanning lines and the value of the target pixel or the scanning line measured this time, the distribution status of insulation failure between adjacent pixels can be obtained. As a result,
The advantage is obtained that the cause of the defect related to the insulation failure between the adjacent pixels or between the adjacent scanning lines can be specified more accurately.

[0020]

According to the present invention, the following effects can be obtained from the above description. According to the method of the present invention, a pixel defect inspection method can be realized even on an LCD substrate having no gate control terminal 9. In the inspection method of the present invention, the auxiliary capacitors 15 of all the pixels are connected through the video terminal 23.
a charging step 110 for charging ij to a predetermined high voltage; a video line group 21 and a data line 201 for column scanning;
A scanning line charge erasing step 120 for erasing the electric charge on .about.20 n to zero, and transferring the electric charges charged to the auxiliary capacitors 15 ij of all the pixels through the video terminal 23 to IV.
A discharge readout step 130 for sequentially measuring a peak value of the discharge current as a discharge current to the converter, and obtaining a pixel defect relating to each pixel from a deviation of the peak value of the obtained measurement result;
In addition, the provision of the determination processing step 140 for determining a defect related to the XY scanning line has a great advantage that a pixel defect related to each pixel and a defect related to the XY scanning line can be detected. Further, in an inspection method of charging and reading with a different voltage so as to give a potential difference between a pixel of interest or a pixel of a scanning line of interest and an adjacent adjacent pixel or between pixels of an adjacent scanning line, an adjacent pixel or an adjacent scanning line is used. Since the defect factor of the insulation failure between the lines can be more accurately specified, the inspection for the pixel defect and the scanning line defect can be more accurately realized by using both of them.

[Brief description of the drawings]

FIG. 1 is a timing chart of measurement according to the present invention.

FIG. 2 is an example of an IV conversion output signal of the present invention.

FIG. 3 is an example of an internal circuit configuration of an LCD substrate having no gate control terminal.

FIG. 4 is an example of an internal circuit configuration of an LCD substrate.

FIG. 5 is an example of a measurement configuration of a conventional LCD substrate inspection apparatus.

FIG. 6 is a timing chart of a conventional measurement.

FIG. 7 is an example of a measurement configuration of the LCD substrate inspection apparatus of the present invention.

FIG. 8 is a distribution display example of a two-dimensional array of pixel distributions according to the present invention.

FIG. 9 is a diagram illustrating a charged state between a pixel of interest and an adjacent pixel according to the present invention.

FIG. 10 is a timing chart of measurement of a pixel or a scanning line of interest according to the present invention.

[Explanation of symbols]

 CLX1 to 4 Clock 9 Gate control terminal 10 LCD substrate 11 Row select shift register 1411 to 14 nm, 14ij Thin film transistor 1511 to 15 nm, 15ij Auxiliary capacitor 181 to 18 m AND gate 191 to 19 m, 19j Gate line (video signal scanning line) 201 to 20n , 20i Data line 21 Video line group 211 to 21p Video line 23, 231 to 23p Video terminal 34 S & H circuit (sample and hold circuit) 35 Amplifier 36 A / D converter 37 Image processing unit 38 Buffer memory 39 Test pattern generation unit 40 Driver 41 Switch 42 IV converter 43 IV conversion circuit 47 Analog multiplexer

Claims (3)

[Claims] 1. An auxiliary capacitor for a pixel formed in an XY lattice array in an LCD substrate under test, an XY scanning line (a data line for column scanning and a gate line for row scanning) for driving the pixel, and defects related thereto. In the method of inspecting an LCD substrate for detecting, a charging step of sequentially scanning a pixel scanning data line and a gate line and charging an auxiliary capacitor of a predetermined pixel scanned through a video terminal with a predetermined high voltage, and a signal passing through the video terminal A charge erasing step of erasing charges on the data lines for scanning and column scanning to zero; a discharge reading step of sequentially measuring charges charged to the auxiliary capacitors of all the pixels through the video terminals; A judgment processing step of judging a pixel defect relating to each pixel and a defect relating to an XY scanning line from the deviation; 2. An LCD substrate inspection method for detecting an auxiliary capacitor of pixels formed in an XY lattice array in an LCD substrate under test, an XY scanning line for driving pixels, and a defect related thereto, comprising the steps of: The gate line scans at least the auxiliary capacitor of the pixel of interest and the adjacent pixel, or the auxiliary capacitor of the pixel on the pixel of interest and the adjacent scan line, and supplies a predetermined high voltage to the auxiliary capacitor of the pixel of interest or the pixel on the scan line of interest through the video terminal. And charging the auxiliary capacitor of an adjacent pixel or a pixel on an adjacent scanning line with a different predetermined voltage or zero voltage; and setting a charge on a signal path leading to the video terminal and a data line for column scanning to zero. A charge erasing step for erasing, and assisting at least a pixel of interest and an adjacent pixel through the video terminal. A discharge readout step of sequentially measuring the charges charged in the capacitor; and a determination processing step of determining a pixel defect between adjacent pixels and a defect on an adjacent scanning line from a deviation of the obtained measurement result, LCD board inspection method. 3. The method according to claim 1, further comprising: repeating a predetermined number of times from a charging step of charging and scanning the auxiliary capacitor of the pixel to a discharge reading step of reading and scanning the charge stored in the auxiliary capacitor, and cumulatively adding the discharge current data. 3. The method for inspecting an LCD substrate according to claim 1, wherein: