JPH10104300A - Lcd substrate inspection device and method therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve an S/N ratio in the inspection of an open failure and a short defect of each pixel of an LCD(Liquid Crystal Display) substrate by ten times or more of a conventional ratio. SOLUTION: A common grounding terminal 22 of an auxiliary capacitor of an LCD substrate 10 is grounded, and an H voltage from a driver 40 is applied to a video terminal 23 to open a gate of TFT(Thin Film Transistor) so that the auxiliary capacitor 15ij is charged to the maximum extent. Next, the gate is closed, and an L voltage of grounding electric potential is applied to the video terminal 23 so that a charge of floating capacity of a data line and a video line is discharged sufficiently. Then, each picture element is driven selectively and sequentially in a picture image display mode to read information of each pixel, convert it into a current and a voltage in an I-V conversion circuit 43, sample it in a sample-and-hole circuit 34, amplify it, and perform A/D conversion by an A/D converter 36 so that amplitude values are compared in a picture image processing part 37 to judge whether it is good or not.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a polycrystalline TFT (Thin F TFT) used for a projector, a rear transmission type TV or the like.
LCD (Liquid Crystal Transistor)
The present invention relates to an LCD substrate inspection apparatus and method for detecting a pixel defect of each pixel in a crystal display (LCD) substrate.

[0002]

2. Description of the Related Art First, an LCD substrate which is a DUT to be measured will be described. FIG. 3 shows an LCD substrate 1 of a polycrystalline TFT.
0 shows an example of the configuration diagram. A plurality of gate lines 19j was parallel to the quartz substrate (19 ₁ ~ 19 _m) is provided, a plurality of data lines 20i perpendicular to these gate lines 19
(20 ₁ ~20 _n) are provided in parallel. A TFT is provided at each intersection of these gate lines 19j and data lines 20i.
14ij (14 _{11 to} 14 _nm ), each TFT 14ij has a gate connected to a nearby gate line 19j, a source connected to a data line 20i, and a drain connected to an auxiliary capacitor 15ij (15 ₁₁ to 15 _nm ). It is connected. The other ends of the auxiliary capacitors 15ij are commonly connected, and are connected to a common ground terminal 22. That is, a large number of pixels including the TFT 14ij and the auxiliary capacitor 15ij are arranged in a matrix. The number of pixels is 640 x 480 = 307,200 points in the VGA standard, SV
800 × 600 = 480,000 points in GA standard, XGA standard
1,024 x 768 = 786,432 points. In the EWS specification, a very large number of pixels are arranged at 1,280 x 1,024 = 1,310,720 points.

The gate lines 19 _{1 to} 19 _m are sequentially connected to each shift stage of the row selection shift register 11, and the data lines 20 _{1 to} 19 _m are connected to each other.
₁ to 20 _n column select switch 13i (13 ₁ ~13 _n)
Through to the video line 21. Column selection switches 13 ₁ to 13 _{each having a} thin film transistor configuration
The 3 _n gates are sequentially connected to corresponding ones of the n shift stages of the column selection shift register 12, respectively.
When the number of pixels is very large, there is a case where the video line 21 and the column selection shift register 12 have a plurality of columns in order to maintain high speed. For example, video line 21
There are 6 columns, most often 24 columns, and some column select shift registers 12 have 2 to 4 columns and operate alternately.

[0006] When a vertical start signal is supplied to a DY terminal and a vertical operation clock is supplied to a CLY terminal, the row selection shift register 11 receives a vertical start signal every horizontal cycle.
1 sequentially outputs a high level to the shift stage. That is,
High levels are sequentially output to the gate lines 19 _{1 to} 19 _m . Similarly, a horizontal start signal is applied to the DY terminal of the column selection shift register 12, and the horizontal operation clock is set to CL.
Shift stage column select shift register 12 when given every pixel cycle in the X terminal is sequentially high level is applied is sequentially high level to the gate of the column selection switches 13 ₁ to 13 _n.

Therefore, for example, the gate line 19₁Is high level
Between the column selection switch 13₁Gate is high level
Becomes TFT14₁₁Is turned on and video line 21 is turned on.
The video signal of the column selection switch 13₁Through the TFT
14₁₁Through the auxiliary capacitor 15₁₁Of the video input
The charge corresponding to the level is charged. This gate line 19 ₁
Select switch 13 while is high₁~ 13_nIs sequential
Since it is turned on, the TFT 14₁₁~ 14_1nAre turned on sequentially
Is the video signal at that time from video line 21
Auxiliary capacitor 15 corresponding to the level₁₁~ 15_1n
Is charged. Then the gate line 19_Two
Becomes high level, and scanning of the pixel of the gate line is performed.
Done. Hereafter, the same TFT matrix
Scanning, that is, scanning for each pixel electrode is performed.
You.

The defects of the LCD substrate 10 include a line defect and a pixel defect. Since a line defect is the presence or absence of a disconnection, the inspection is a continuity and non-continuity inspection and is easy.
Pixel defects include open defects and short defects. Several proposals have conventionally been made for the inspection of the pixel defect. For example, according to Japanese Patent Application Laid-Open No. H5-158056 filed by the present applicant, the auxiliary capacitor 1 of each pixel is disclosed.
5ij applies a rectangular wave signal to a common ground terminal 22 to which the LCD panel 10 is connected in common, detects an amplitude value corresponding to each pixel of the signal output to the video line 21 of the LCD substrate 10, and detects each pixel value based on the amplitude value. Is detected, and a pass / fail judgment is made.

FIG. 5 shows an example of a conventional inspection apparatus. LCD
The substrate 10 is the LCD substrate 10 shown in FIG. 3 and is a device for inspecting pixel defects of the LCD substrate 10. The vertical activation signal from the scanning timing generator 30 is supplied to the DY terminal, and the vertical operation clock is supplied to the DY terminal.
By applying a horizontal start signal to the DX terminal and a horizontal operation clock to the CLX terminal to the LY terminal, the pixels are sequentially selected in a so-called image display mode. The inspection signal generation unit 31 outputs a square wave inspection signal in the middle part of the selection cycle of each pixel.
Common ground terminal 2 of auxiliary capacitor 15ij of CD substrate 10
Give to 2.

If the selected pixel is normal, an output waveform corresponding thereto appears on the video line 21. For example, if the auxiliary capacitor 15ij of the selected pixel is short-circuited, an extremely high level is applied to the video terminal 23. Appear,
Conversely, when the TFT 14ij of the pixel is open, the level of the video terminal 23 becomes low. The high-speed switch 32 is connected between the video terminal 23 and the common potential point. The high-speed switch 32 is turned on at the beginning and end of each pixel selection period, and the high-speed switch 32 is stored in the stray capacitance at the portion connected to the video terminal 23. Discharge the charge.

The output waveform of the video terminal 23 is converted from a high impedance input to a low impedance output by an impedance converter 33, supplied to a sample and hold circuit 34, and sampled and held near the end of each test signal. The output is amplified by an amplifier 35, converted into a digital signal by an A / D converter 36, and supplied to an image processing unit 37. The image processing section 37 relatively compares the input level between adjacent pixels, that is, the level of the signal output from the video terminal 23, and checks the presence or absence of an image defect from these levels.

[0010]

These conventional inspection means could easily determine the short-circuit failure because the output signal would be abnormally large, but could easily determine the open failure by the S / N ratio (signal-to-signal ratio). Noise ratio) was poor, and the judgment accuracy was not good. The reason is that the stray capacitance on the data line 20i and the video line 21 is larger than the capacitance of the auxiliary capacitor 15ij of each pixel, and the influence of the charge of the stray capacitance is large.

FIG. 4 shows an equivalent circuit when one pixel is turned on in FIG. Parts corresponding to those in FIG. 3 are denoted by the same reference numerals. R8 is the on-resistance of the column selection switch 13i, whose value is about 10 KΩ, and R9 is the on-resistance of the TFT 14ij, which is about 1 MΩ. The capacitance of the auxiliary capacitor 15 is about 0.1 pF, while the stray capacitance is
In general, the stray capacitance of the data line depends on the size of the substrate.
6 is about 5 pF, and the stray capacitance 17 of the video line is 10
There is also about pF. That is, the capacitance ratio between the auxiliary capacitor 15ij and the stray capacitance is 1/100 or less,
The capacity of ij is very small. Therefore, even if an open defect of the auxiliary capacitor 15ij is detected by applying a rectangular wave signal from the common ground terminal 22, there is only a small difference between the amplitude value of the output signal in the normal state and the amplitude value of the output signal in the abnormal state due to the stray capacitance. It was difficult to accurately determine the quality of the product.

According to the present invention, in the inspection of the LCD substrate 10, a voltage close to the maximum specified value is applied to each auxiliary capacitor 15ij to charge the maximum charge, and the charge of the stray capacitance 16 of the data line and the stray capacitance 17 of the video line is reduced. The discharge is performed to near zero, and the S / N ratio is improved to 10 times or more of that of the conventional device, and the open / short inspection of each pixel is performed.

[0013]

In order to achieve the above-mentioned object, the present invention provides a liquid crystal display device in which a liquid crystal is sealed before liquid crystal is sealed.
Common ground terminal 2 of auxiliary capacitor 15ij of CD substrate 10
2 is grounded, and first, an H voltage close to the upper limit of the specified value is applied to the video terminal 23 to open the gate of the TFTij and charge the auxiliary capacitor 15ij to the maximum. The so-called writing is performed.
Subsequently, with the gate of the TFTij turned off, the L voltage of the common ground potential is applied to the video terminal 23, the column selection switch is turned on, the data line 20i is turned on, and the data line 20i is turned on.
Of the floating capacitance 16 of the video line 21 and the floating capacitance 17 of the video line 21 are sufficiently discharged. Thereafter, the gate is turned on again to selectively drive each pixel sequentially, and the auxiliary capacitor 1 is turned on.
5ij is read out, and the presence or absence of an image defect is checked by an image processing apparatus via a sample-and-hold circuit 34 and the like as in the prior art.

In order to realize this, a signal from the scanning timing generator 39 is used to generate a reference voltage, ie, H voltage or L voltage.
A driver that outputs a voltage and an IV conversion circuit that supplies the H voltage and the L voltage to the video terminal 23 of the LCD substrate 10 in real time, reads an output signal from the video terminal 23, and outputs the read signal to the sample and hold circuit 34 are provided. .

The driver only needs to be capable of receiving the input signal and outputting the H voltage set in real time or the L voltage of the common ground potential. That is, the H voltage and the L voltage may be switched at high speed.

The first stage of the IV conversion circuit can be realized by using the characteristics of the differential amplifier of the operational amplifier. This is because the input impedance is infinite and the two input terminals are imaginary short (virtual short). Therefore, when a reference H voltage or L voltage is applied to one input terminal, the other terminal voltages follow that voltage in real time. The tracked voltage is supplied to a video terminal. The output signal from the video terminal may be subjected to current-voltage conversion by the differential amplifier and the next-stage differential amplifier.

[0017]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The first invention is a configuration of the basic invention. In addition to the conventional inspection apparatus, a driver that outputs the H voltage and the L voltage in real time based on a signal from the scanning timing generator, and the H and L voltages supplied from the driver to the video terminal of the LCD board in real time. And an IV conversion circuit for converting a video signal from a video terminal into a current-voltage signal and outputting the converted signal to a sample-and-hold circuit. Here, it is assumed that the scanning timing generator also serves as a control unit having a CPU and generates all measurement timings. This control unit may be provided separately.

The second invention is the most suitable configuration of the driver used in the first invention. The driver can be configured by a transistor switch circuit, a bistable circuit, or the like, but the one that uses an operational amplifier is the most appropriate for the fastest real-time switching.

The third invention is the most appropriate configuration of the IV conversion circuit used in the first invention. At least two differential amplifiers are used to take advantage of the characteristics. The reference voltage from the driver is input to the positive phase input terminal of each differential amplifier. The negative-phase input terminal of the first-stage differential amplifier is connected to the video terminal of the LCD substrate, and the H voltage and the L
After the voltage is supplied to charge the auxiliary capacitor, the charge of the stray capacitance is discharged. Thereafter, an output signal from the video terminal is taken out, amplified, converted into a current-voltage signal, and output to a sample-and-hold circuit.

A fourth aspect of the present invention is a configuration in which the LCD substrate has a very large number of pixels as in the EWS standard and has a plurality of video terminals. That is, an IV conversion circuit is provided for each video terminal, and each IV conversion circuit receives a reference voltage from a driver and outputs each output signal to a sample-hold circuit via an analog multiplexer. Hereinafter, embodiments will be described.

[0021]

FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a timing chart of the embodiment. FIG. 1 shows both the case where there is one video terminal 23 and the case where there are a plurality of video terminals 23. That is, in the case of one, only one IV conversion circuit 43 is required, and the analog multiplexer 47 is unnecessary. However, in the case of a plurality, the video terminals 23i (i = 1 to
p), an IV conversion circuit 43 is provided.
Output to

The common ground terminal 22 of the LCD substrate 10 is grounded. The driver 40 includes a scan timing generator 39
, And switches between the H voltage and the L voltage which are reference voltages. The H voltage is, for example, 12 V, and the L voltage is a common ground potential. An operational amplifier 41 is used for switching in real time. This output voltage is supplied to each IV conversion circuit 43.

The IV conversion circuit 43 includes two differential amplifiers 44
And 45, and an H voltage or an L voltage is supplied to each positive phase input terminal via a resistor R1 or R5. The negative-phase input terminal a of the first-stage differential amplifier is connected to the video terminal 23 and its output terminal b via the resistor R2.
It is connected to the. As shown in FIG. 1, point a and b
The feedback resistor between the points connects R2 in parallel via switch SW in parallel with R3. This is because the feedback resistance value is changed as necessary, and the differential amplifier 44 is switched between high-speed stabilization and high amplification for stabilization. That is, the smaller the feedback resistance value, the quicker the stabilization, and the larger the feedback resistance value, the higher the amplification.

Therefore, the resistance R2 is set to about 1 KΩ and R3 is set to 4
When the H voltage and the L voltage are supplied to the LCD substrate 10 at about 0 KΩ, the switch SW is turned on, the feedback resistance is reduced to 1 KΩ, and the write clock speed is increased. When reading out the signal, turn off the switch SW and set to 40KΩ
To increase the read clock speed, obtain a high amplification degree, and at the same time the speed of the subsequent signal processing system, especially A / D
Match the conversion speed. Second stage differential amplifier 45
Is for differentially amplifying the signal from the first stage, and supplies the output signal to the sample and hold circuit 34.

In this embodiment, the optimum configuration is realized by utilizing the input characteristics of the differential amplifier, but there is another configuration using a changeover switch. That is, when the H voltage or the L voltage is supplied to the video terminal 23 of the LCD substrate 10, it is directly connected to the driver 40, and when reading out the charge information from the video terminal 23, it is switched by a switch and output to the IV conversion circuit.

FIG. 2 is an embodiment of a timing chart of the operation of the embodiment of FIG. (A) shows a period of column selection in a period in which one row is selected. That is, the write period, the charge elimination period of the floating capacitance of the video line 21 and the data line 20i, and the read period. (B) shows the H voltage and the L voltage applied to the video terminal 23. For example, 12V is applied in the writing period, and 0V of the common ground potential is applied in other periods. (C) is a gate control for turning off the gate line 19j, which is turned off only during the charge elimination period, that is, the so-called clear period. In the circuit diagram of FIG.
Give a signal to close j. If there is no gate 18j, all gate lines 19j should be turned off.

(D) is a shift start signal DX to the column selection shift register 12, which is given to the DX terminal at the beginning of each period. (E) is a shift clock signal CLX to the column selection shift register 12. Since the A / D conversion in the signal processing is not performed during the writing period and the clear period, the driving is performed at the specified operation frequency. In the reading period, A / D conversion is performed and the signal processing speed is reduced. Therefore, the clock signal is reduced to 1 / N of the specified operating frequency. That is, the cycle is increased by N times. (F) is a switching signal of the switch SW of the feedback resistor of the first-stage differential amplifier 44. The writing period and the charge extinguishing period are turned on to set the feedback resistance to 1 KΩ, thereby shortening the stabilization time of the system.
The reading period is turned off to 40 KΩ to obtain a high amplification degree. The reason why the readout period is set to about 1 / N is to sufficiently set the discharge of the pixel.

In the example of the timing chart, the column selecting operation is performed three times in one row selecting period. However, the present invention is not limited to this. Writing of charge, clearing of floating capacitance, and reading of charge information may be performed in units of several rows.

FIG. 6 is a flowchart showing an LCD substrate inspection method according to the present invention. First, the common ground terminal of the auxiliary capacitor 15ij on the LCD substrate is grounded (step 1).
00). Next, an H voltage is applied to the video terminal 23 from the driver (step 110). Next, the gate of the TFTij is opened to charge the auxiliary capacitor 15ij (step 12).
0). Next, the gate of the TFTij is closed (step 13).
0). Next, the ground potential L voltage is applied to the video terminal 23 to sufficiently discharge the stray capacitance of the data line and the video line (step 140). Next, each pixel is sequentially and selectively driven in the image display mode, and information of the auxiliary capacitor 15ij corresponding to each pixel is read out, and the current-voltage conversion is performed by the IV conversion circuit and read out (step 150). Next, the output voltage of the IV conversion circuit is sampled by the sampling and holding circuit (step 160). Next, the voltage obtained by the sampling and holding circuit is converted by an A / D converter into an A / D
Conversion (step 170). Next, the image processing unit compares the amplitude values to determine the quality (step 180). Thus, the LCD substrate inspection method is configured.

[0030]

As described above in detail, according to the present invention, the auxiliary capacitor 15ij of each pixel of the LCD substrate 10 is charged with a sufficient charge, and the stray capacitance 16 of the data line 20i and the stray capacitance 17 of the video line 21 are charged. After almost completely discharging the pixel, the charge information of each pixel is sequentially read out and image processing can be performed. Therefore, not only short defects of each pixel but also open defects can be accurately determined. That is, the S / N ratio was improved by 15 times compared to the conventional art, and the erroneous determination was eliminated.

The timing can be easily obtained. In the conventional device for applying a rectangular wave signal from the common ground terminal 22 and extracting the signal from the video terminal 23, fine timing adjustment was required to release the charge of the stray capacitance of the video line 21. Then you only need to decide the time of each period. Operation became easier. This is an inspection method in which each pixel is charged with a sufficient amount of charge by a normal method of using the LCD substrate 10, so that it is easy to understand.

As described above, since the inspection of the LCD substrate 10 can be performed easily, accurately, and at high speed, the technical effect is large for practical use.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of an embodiment of the present invention.

FIG. 2 is a timing chart of the embodiment of FIG.

FIG. 3 is a configuration diagram of an LCD substrate.

FIG. 4 is an equivalent circuit diagram when one pixel on the LCD substrate is in an ON state.

FIG. 5 is a configuration example diagram of a conventional inspection device.

FIG. 6 is a flowchart illustrating an LCD substrate inspection method according to the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 LCD board 11 Row selection shift register 12 Column selection shift register 13, 13i Column selection switch 14, 14ij TFT 15, 15ij Auxiliary capacitor 16 Floating capacitance of data line 17 Floating capacitance of video line 18j Gate 19, 19j Gate line 20, 20i Data line 21 Video line 22 Common ground terminal 23 Video terminal 30 Scan timing generator 31 Inspection signal generator 32 High-speed switch 33 Impedance converter 34 Sample hold circuit 35 Amplifier 36 A / D converter 37 Image processor 39 Scan timing generator Reference Signs List 40 Driver 41 Operational amplifier 42 H voltage input terminal 43 IV conversion circuit 44, 45 Differential amplifier

Claims (5)

[Claims] 1. The T of each pixel of an LCD substrate to be measured (10).
The FT (14 _ij ) is selectively driven in the image display mode from the scanning timing generator (39), and the output signal from the video terminal (23) of the LCD substrate (10) is sampled by the sample and hold circuit (34). Inspection apparatus for amplifying the output signal of the sample and hold circuit (34) with an amplifier (35), A / D converting with an A / D converter (36), and detecting a pixel defect with an image processing unit (37). A driver (40) for outputting an H voltage or an L voltage to an IV conversion circuit (43) based on a signal from the scanning timing generator (39), and an H or L voltage from the driver (40) for an L
I is supplied to a video terminal (23) of the CD substrate (10), converts a video signal from the video terminal (23) into a current voltage, and outputs an output signal to a sample and hold circuit (34).
An LCD substrate inspection device, comprising: a V conversion circuit (43). 2. The operational amplifier (4) according to claim 1, wherein the driver (40) switches and outputs an H voltage or an L voltage.
An LCD board inspection apparatus characterized by the above 1). 3. The IV conversion circuit according to claim 1, wherein
3) uses at least two differential amplifiers, both of which are input to the positive-phase input terminal via a resistor using the H voltage or the L voltage from the driver (40) as a reference voltage, and are the inverse of the first stage operational amplifier (44). Phase input terminal is LCD board (10)
, And a negative-phase amplifier connected to the output terminal via a resistor. The negative-phase input terminal of the second-stage operational amplifier (45) is an output terminal of the first-stage operational amplifier (44). Characterized by comprising a differential amplifier connected to the output terminal and the output terminal thereof via a resistor.
D board inspection device. 4. A video terminal (2) of an LCD substrate (10).
When there are a plurality of 3), each video terminal (23) is provided with an individual IV conversion circuit (43), and an output signal of each IV conversion circuit (43) is selected by an analog multiplexer (47) and sampled. 4. A structure for outputting to a hold circuit (34).
An LCD substrate inspection apparatus as described in the above. 5. The T of each pixel of the LCD substrate to be measured (10).
An inspection method for selectively driving an FT (14 _ij ) in an image display mode from a scanning timing generator and detecting a pixel defect by an output signal from a video terminal (23) of the LCD substrate (10). The common ground terminal of the auxiliary capacitor (15ij) on the board is grounded (step 100), and the video terminal (2
3) Applying a high H voltage from the driver (step 110), opening the gate of the TFT (14ij), charging the auxiliary capacitor (15ij) (step 120), and closing the gate of the TFT (14ij) (step 120). Step 130),
An L voltage of the ground potential is applied to the video terminal (23) to discharge the electric charge of the stray capacitance (step 140). The image display mode is set, and the information of the auxiliary capacitor (15ij) is current-voltage converted by an IV conversion circuit. And read (Step 1
50) The output voltage of the IV conversion circuit is sampled by a sampling and holding circuit (step 160), and the sampled and held voltage is A / D converted by an A / D converter.
After the conversion (Step 170), the image processing unit compares the amplitude values to determine the quality (Step 180).