JPH1174242A - Method for manufacturing semiconductor device - Google Patents

Abstract

(57) [Summary] In a conventional method of manufacturing a semiconductor device, planarization is insufficient, a surface step is large, and when performing multi-layer wiring, disconnection of wiring is apt to occur, which causes a decrease in yield. Has become. In addition, it has been difficult to miniaturize wiring due to insufficient depth of focus of lithography. Further, there is a problem that the process technology is complicated and the number of steps is increased. Furthermore, in the planarization method by polishing, as the size of a wafer forming a semiconductor device increases, the size of a polishing machine used increases, and in addition to the use of auxiliary materials such as polishing abrasive grains and polishing pads,
Great effort is required to replace the polishing pad. Further, there are disadvantages that the flatness of the processed surface is deteriorated due to the deterioration of the polishing pad during the processing, and the polishing efficiency is not stable. In addition, there is a problem that the wiring is cut by the processing using the grindstone because the wafer is undulating. In the present invention, after swelling of a semiconductor device is corrected and the semiconductor device is fixed flat on the basis of the upper surface of a wiring or the upper surface of an interlayer film, cutting or grinding is performed.
The semiconductor device is processed in parallel with the reference plane.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device for planarizing the surface of an interlayer insulating film for insulating a wiring of a semiconductor device and a wiring thereover. is there.

[0002]

2. Description of the Related Art Conventionally, in order to realize the planarization of the surface of an interlayer insulating film of a semiconductor device, the surface of the interlayer insulating film having irregularities has been planarized using SOG. However, as pattern miniaturization and multilayering have progressed, the focus margin of exposure light has decreased, and sufficient effects have not been obtained. Recently, IBM Journal of Research and development vol.3
6, No.5, September 1992 p845 and 1993 Precision Engineering Society Spring Conference Lecture Paper p839, an elastic pad that rotates a workpiece while supplying a polishing solution containing abrasive grains. In addition, a chemical mechanical polishing (CMP) polishing method in which a convex portion of unevenness on the surface of a workpiece is preferentially polished with an abrasive while being pressed against the workpiece and performing relative movement is also used.

[0003]

In the conventional method, the planarization is insufficient, the surface steps are large, and when performing multi-layer wiring, disconnection of the wiring is likely to occur, which causes a decrease in yield. In addition, it has been difficult to miniaturize wiring due to insufficient depth of focus of lithography. Further, there is a problem that the process technology is complicated and the number of steps is increased. Further, in the planarization method by polishing, as the size of a wafer forming a semiconductor device increases, the size of a polishing machine used also increases, and the amount of auxiliary materials such as polishing abrasive grains and polishing pads increases. In addition, there is a problem that a great deal of labor is required for replacement of the polishing pad, flatness of a processed surface is deteriorated due to deterioration of the polishing pad during processing, and polishing efficiency is not stable. In addition, there is a problem that the wiring is cut by the processing using the grindstone because the wafer is undulating.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method of manufacturing a semiconductor device which does not require a polishing pad or abrasive grains and can realize high-precision planarization.

[0005]

The object of the present invention is to correct the undulation of a semiconductor device, fix the semiconductor device flat with reference to the upper surface of the wiring or the upper surface of the interlayer insulating film, and then cut or grind the semiconductor device so as to be parallel to the reference surface. This is achieved by processing to

[0006]

An embodiment of the present invention will be described below in detail with reference to the accompanying drawings. FIG. 1 shows a processing apparatus for realizing a method of manufacturing a semiconductor device according to the present invention. Reference numeral 10 denotes a main body of the processing apparatus, 20 denotes a waviness correction unit that corrects the waviness of a semiconductor device (wafer) 50 and fixes it flat. 30 is a tool for flattening the surface of the semiconductor device 50, for example, a grindstone made of superabrasive grains such as diamond, and 41 is a tool for maintaining the sharpness of the diamond grindstone when a metal bond diamond grindstone is used as the tool 30. An electrode for electrolytic dressing, 44 a working fluid supply unit made of pure water for cooling and lubricating the processing tool 30 and the semiconductor device 50, 60 a device for measuring the surface shape of the semiconductor device 50, 70 a swell correction unit 20 is a fixing device for attaching 20 to the processing apparatus main body 10. The semiconductor device 50 mounted on the undulation correcting section 20 on the indexing table 80 having a circular or linear shape corrects the undulation under the surface shape measuring device 60, and then the processing tool 30.
Moved below and processed.

FIG. 2 is an enlarged view of the waviness correction section 20 in the case of the first waviness correction method.
Is detachable from the fixing device 70, and a porous ceramic block group 7 is provided on one surface of a thin, for example, steel plate 73.
2 is fixed, and can be evacuated to vacuum through a hole formed in a dense ceramic ring 74 on the outer periphery. At a position corresponding to the back of the porous ceramic block group 72 of the steel plate 73, the ceramic block group 7
5 are arranged.

A method for manufacturing a semiconductor device 50 having a flat surface by the above processing apparatus will be described below. FIG.
5A, after the surface of the interlayer insulating film 52 of the semiconductor device 50 is vacuum-sucked to the fixing device 70 with reference to the surface, the vacuum suction valve 78 is opened and the silicon substrate 53 on the back surface of the semiconductor device 50 is fixed to the surface. The jig 71 is fixed by vacuum suction. A jig 71 for fixing the semiconductor device is fixed to the back surface of the semiconductor device 50 by vacuum suction, and a jig 71 for fixing the surface reference is provided.
Planarizes the ceramic block group 75 while following the back surface of the semiconductor device 50, and processes the ceramic block group 75 in parallel with the front surface of the semiconductor device 50.

Next, with the vacuum suction valve 78 closed, the vacuum system of the fixing device 70 is cut off while the semiconductor device 50 is adsorbed on the surface reference fixing jig 71, and the semiconductor device 50 is fixed to the surface reference fixing jig. Inverted while in close contact with 71,
The ceramic block group 75 is fixed on the fixing device 70 by vacuum suction. Then, the semiconductor device 50 and the processing tool 3
During zero, both are rotated while supplying pure water from the working fluid supply unit 44 to reduce the gap between them. At this time, the super-abrasive grains 3 of the processing tool 30 are used so that the super-abrasive grains 31 do not fall off and damage the interlayer insulating film 52 of the semiconductor device 50.
It is preferable to use a super-abrasive grain having a particle size of 5 μm or less so that the bond material holding 1 is made of metal or the like and the grinding resistance is not increased due to the crushing of the super-abrasive grain 31 and the processing accuracy is not deteriorated. In addition, in order to prevent the grinding resistance from increasing due to clogging between the superabrasive grains 31 and the superabrasive grains 31, an electrode 41 for electrolytic dressing is provided on a part opposed to the superabrasive grains 31. A partition 45 is provided around the periphery, and the electrolyte 43 is applied between the processing tool 30 and the electrode 41 while spraying the electrolyte 43 so that the electrolyte is not scattered.

The contact between the semiconductor device 50 and the processing tool 30 is detected by a sensor 76 disposed below the fixing device 70, and from the position, either the semiconductor device 50 or the processing tool 30 is determined by a desired amount. By displacing, the thickness of the interlayer insulating film 52 on the wiring 51 can be processed by a certain amount. According to the processing of the above embodiment, a semiconductor device 50 having a flat interlayer insulating film 52 can be obtained as shown in FIG.

FIG. 3 is an enlarged view of the undulation correction section 20 in the case of the second undulation correction method. On the upper surface of a thin steel plate 23, for example, a block group 24 of porous ceramics for vacuum-suctioning the semiconductor device 50 is arranged. On the lower surface, a block group 25 made of a rigid body such as ceramic is arranged at a position facing the block group 24 of porous ceramic. An actuator 21 such as a piezo element is disposed below the block group 25 in correspondence with each block.
5 is also displaced, so that the steel plate 23 can be freely deformed corresponding to the actuator 21.

A method for manufacturing a semiconductor device 50 having a flat surface by the above processing apparatus will be described below. First, the dummy semiconductor device 55 (not shown) is undulated by the swell corrector 20.
Is fixed on the porous ceramic block group 24 by vacuum suction, the semiconductor device 55 is processed by a tool 30 made of superabrasive grains 31 such as diamond, the surface shape is measured by a measuring device 60, and the shape is measured by a computer. 28 (FIG. 1).

Next, the semiconductor device 50 is moved to the swell corrector 20.
Is fixed on the porous ceramic block group 24 by vacuum suction, and the gap 29 having the block group 25 and the actuator 21 is vacuum-sucked, and each block 25 and each actuator 21 are brought into contact with each other. And fix it in the state of following. The coordinates of the surface of the interlayer insulating film 52 deposited on the semiconductor device 50 or the coordinates of the wiring 51 formed on the semiconductor device 50 are measured by the surface shape measuring device 60, and the reference values stored in the computer 28 are measured. The voltage is applied to each actuator 21 so that the height from the surface is constant, and each block 25 and each porous ceramic block 24 on the actuator 21 are displaced by the dimensional change of the actuator 21 to correct the undulation of the semiconductor device 50. do it,
The surface of the interlayer insulating film 52 of the semiconductor device 50 or the wiring 5
The upper surface of 1 is made to have the same state as the surface shape stored in the computer 28 in advance.

In this state, the space 2 having the block group 25
9 is evacuated, and the fixing block 24 is
And between the wall 27 and fixed.

Next, the semiconductor device 50 is rotated as shown by an arrow A in FIG. 3 in a state where the undulation is corrected, and a tool 30 made of superabrasive grains 31 such as diamond is also shown by an arrow B in FIG. The semiconductor device 50 and the tool 30
The gap between the super-abrasive grains 31 is reduced while supplying pure water from the machining fluid supply unit 44 between the super-abrasive grains 31.

At this time, the super-abrasive grains 3 are formed so that the super-abrasive grains 31 do not fall off and damage the interlayer insulating film 52 of the semiconductor device 50.
The bonding material of the tool 30 holding the tool 1 is a bonding material having a large abrasive holding force such as metal, and the grain size is 5 μm or less so that the grinding resistance is not increased due to the crushing of the superabrasive grains 31 and the processing accuracy is not deteriorated. It is preferable to use super abrasive grains of Further, in order to prevent an increase in grinding resistance due to clogging between the superabrasive grains 31, an electrode 41 for electrolytic dressing is provided on a part opposed to the superabrasive grains 31, and around the electrode 41. Is provided with a partition wall 45 so that the electrolytic solution does not scatter.
Applying while spraying the electrolytic solution 43 between 0 and the electrode 41,
Process while dressing.

When the gap between the semiconductor device 50 and the super-abrasive grains 31 of the tool 30 is reduced and the two are brought into contact, the semiconductor device 50 is deformed due to contact resistance, and the porous ceramic block group 24 adhered by vacuum suction. And the block group 25 is displaced. By setting the actuator 21 or the gap sensor 18 below the block group 25, the semiconductor device 50 and the super abrasive grains 31 of the tool 30 are provided.
Can be detected. By displacing either the semiconductor device 50 or the tool 30 from that position by an amount to be processed, the thickness of the interlayer insulating film 52 on the wiring 51 formed on the surface of the semiconductor device 50 can be processed by a certain amount.

At this time, by processing while measuring the thickness of the interlayer insulating film 52 with the surface shape measuring device 60, processing can be performed with higher precision.

FIG. 4 shows another embodiment, in which the actuator 2 when a force is applied to an actuator 21 such as a piezo element.
By measuring the relationship between the amount of displacement and the voltage of 1 in advance and always applying feedback during processing, the semiconductor device 50 can be processed flat with reference to the upper surface of the wiring 51 or the upper surface of the interlayer insulating film 52. .

At this time, the contact position can be detected by the displacement of the actuator 21. After the contact position is detected, all the actuators 21 are displaced by an amount to be processed, and the deformation due to the processing pressure is corrected. In addition, the thickness 54 of the interlayer insulating film on the wiring 51 can be accurately and uniformly processed.

Next, another embodiment will be described with reference to FIG. Reference numeral 11 denotes a main shaft for rotating the tool 30, and the bearing outer periphery 12 is supported by a fluid 15. Spindle 11
A gap sensor 18 is provided at a position
Are measured, and an axial gap 19 between the flange portion 14 and the bearing outer periphery 12 is measured. The processing tool 30 and the semiconductor device 50 are brought closer to each other while rotating. When they come into contact with each other, the main shaft 11 on which the machining tool 30 is attached is displaced due to contact resistance, and the contact is detected by changing the gap between the main shaft flange 14 and the bearing outer periphery 12. To increase the rigidity of the fluid bearing, the main shaft flange 14 returns so that the distances 17 and 19 between the bearing outer circumferences 12 become the same, and a cut is made substantially between the semiconductor device 50 and the processing tool 30. And the surface of the semiconductor device 50 is processed.

Another embodiment will be described with reference to FIG. 77
Is a gap sensor that measures the amount of displacement of the tool 30 or the undulation correcting section 20. After correcting the undulation of the semiconductor device 50, the gap between the semiconductor device 50 and the tool 30 is reduced, and the gap of the tool 30 or the undulation correcting section 20 is reduced. By measuring the amount of displacement with the gap sensor 77, the semiconductor device 50
The contact is detected from the change in the displacement amount due to the inclination of the tool 30 or the swell correction unit when the tool 3 comes into contact with the tool 30, and the tool 3
By providing a predetermined notch amount between 0 and the semiconductor device 50, the thickness 54 of the interlayer insulating film on the wiring 51 can be made constant. Further, as in the embodiment shown in FIG. 5, the contact between the tool 30 and the semiconductor device 50 is detected by measuring the vibration of the tool spindle 11 by the measuring means 42, and a cut is made between the tool 30 and the semiconductor device 50. Also, the thickness of the interlayer insulating film 54 on the wiring 51 can be made uniform.

In any of the embodiments described above, the tool 30 is rotated in a state where the undulation of the semiconductor device 50 is corrected by using a diamond tool (omitted) instead of the superabrasive grindstone, and the diamond tool and the semiconductor tool are rotated. Device 50
By providing a notch between them, the thickness of the interlayer insulating film 52 on the wiring 51 can be made uniform.

[0024]

As described above, according to the present invention, there is no need for a polishing pad or abrasive grains, the cost can be reduced, the remaining film can be controlled, and a semiconductor device with high flatness can be obtained. .

[Brief description of the drawings]

FIG. 1 is a perspective view of a first embodiment of a processing apparatus used for a method of manufacturing a semiconductor device according to the present invention.

FIG. 2 is an enlarged sectional view of a processing apparatus according to the first embodiment of the present invention.

FIG. 3 is a sectional view of a second embodiment of a processing apparatus used in the method of manufacturing a semiconductor device according to the present invention.

FIG. 4 is a sectional view of a third embodiment of a processing apparatus used in the method of manufacturing a semiconductor device according to the present invention.

FIG. 5 is a sectional view of a fourth embodiment of a processing apparatus used for the method of manufacturing a semiconductor device according to the present invention.

FIG. 6 is a sectional view of a fifth embodiment of the processing apparatus used in the method of manufacturing a semiconductor device according to the present invention.

FIG. 7 is a cross-sectional view of a semiconductor device planarized by the present invention.

[Explanation of symbols]

Reference numeral 10: processing apparatus main body, 20: undulation corrector, 30: flattening tool, 50: semiconductor device, 51: wiring, 52: interlayer insulating film, 60: surface shape measuring device, 70: fixing device, 71: surface Reference fixing jig, 72: porous ceramic block group, 73: steel plate,
74: ceramic ring, 75: ceramic block group, 78: vacuum suction valve, 80: indexing table.

Continued on the front page (72) Inventor Tetsuo Okawa 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture Inside Hitachi, Ltd.Production Technology Research Institute (72) Inventor Hiroyuki Kojima 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Hitachi, Ltd. In Production Technology Laboratory (72) Inventor Yuko Kawamori 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture In-house Production Technology Laboratory, Hitachi, Ltd.

Claims (12)

[Claims] An undulation on a surface of a semiconductor device is corrected based on the surface of the semiconductor device or the upper surface of the wiring, and a predetermined amount of cut is provided between the tool and the surface of the semiconductor device or the upper surface of the wiring based on the surface of the semiconductor device or the upper surface of the wiring. A method for manufacturing a semiconductor device, comprising: 2. The method of manufacturing a semiconductor device according to claim 1, wherein the interlayer insulating film of the semiconductor device is planarized.
After depositing an interlayer insulating film for insulating the wiring and the wiring above it, the surface of the semiconductor device is fixed to a reference flat surface, and the surface of the semiconductor device is adsorbed on the back surface of the semiconductor device in a state where the undulation is corrected. A step of flattening the deformable free side of the fixing jig, a step of providing a cut between the tool and the surface of the semiconductor device based on the back of the fixing jig, and detecting contact between the tool and the surface of the semiconductor device. Providing a predetermined amount of cut between the tool and the surface of the semiconductor device. 3. The method for manufacturing a semiconductor device according to claim 1, wherein the interlayer insulating film of the semiconductor device is planarized.
After depositing an interlayer insulating film for insulating the wiring and the wiring above it, measuring the coordinates of the upper surface of the wiring and / or the coordinates of the upper surface of the interlayer insulating film; and placing the inside of a jig supporting the semiconductor device. Correcting the undulation on the upper surface of the wiring or the upper surface of the interlayer insulating film by displacing the semiconductor device from the back surface by the plurality of actuators, and providing a notch between the tool and the surface of the semiconductor device to make contact between the tool and the surface of the semiconductor device. Manufacturing the semiconductor device, comprising: providing a predetermined amount of cut between the tool and the surface of the semiconductor device to remove the interlayer insulating film surface of the semiconductor device by a predetermined amount flat. Method. 4. The method of manufacturing a semiconductor device according to claim 1, wherein the interlayer insulating film of the semiconductor device is planarized.
After depositing an interlayer insulating film for insulating the wiring and the wiring above it, measuring the coordinates of the upper surface of the wiring and / or the coordinates of the upper surface of the interlayer insulating film; and placing the inside of a jig supporting the semiconductor device. Displacing the semiconductor device from the back surface with the plurality of actuators to correct the undulation on the upper surface of the wiring or the upper surface of the interlayer insulating film; and measuring the thickness of the interlayer insulating film on the surface of the semiconductor device by measuring the thickness of the tool and the surface of the semiconductor device. Providing a predetermined amount of cuts therebetween, and flattening the surface of the interlayer insulating film of the semiconductor device by a predetermined amount. 5. A method of manufacturing a semiconductor device according to claim 3, wherein the interlayer insulating film of the semiconductor device is flattened by displacing the semiconductor device from the back surface by using a piezo element as an actuator. A semiconductor device, which corrects undulation on an upper surface of an insulating film, fixes the wiring upper surface of the semiconductor device or the upper surface of the interlayer insulating film in a flat state, and removes a predetermined amount of the interlayer insulating film surface of the semiconductor device. Manufacturing method. 6. A method of manufacturing a semiconductor device according to claim 3, wherein the interlayer insulating film of the semiconductor device is flattened by displacing the semiconductor device from the back surface by using a piezo element as an actuator. Correcting the undulation of the upper surface of the insulating film, measuring the amount of surface deformation of the semiconductor device by the processing force during the processing of the surface of the semiconductor device with reference to the upper surface of the wiring of the semiconductor device or the upper surface of the interlayer insulating film, and correcting the semiconductor device by the piezo element. A method for manufacturing a semiconductor device, wherein a predetermined amount of an interlayer insulating film surface is removed flat. 7. A method for manufacturing a semiconductor device according to claim 2, wherein the interlayer insulating film of the semiconductor device is flattened, wherein a piezo element is arranged inside a jig for supporting the semiconductor device, and the tool and the semiconductor device are arranged. A predetermined amount of notch is provided between the surface of the semiconductor device and a contact between the surface of the semiconductor device and the tool by detecting a change in the voltage of the piezo element when a force is applied to the surface of the semiconductor device by applying a force to the surface of the semiconductor device. Production method. 8. A method for manufacturing a semiconductor device according to claim 2, wherein a plurality of gap sensors are disposed inside a jig for supporting the semiconductor device. Measuring the displacement of a tool or a jig holding the semiconductor device when a force is applied to the surface of the semiconductor device to detect contact between the tool and the surface of the semiconductor device. . 9. The method for manufacturing a semiconductor device according to claim 2, wherein the interlayer insulating film of the semiconductor device is flattened, wherein the tool is supported and rotated when a force is applied to the surface of the semiconductor device. A method of manufacturing a semiconductor device, comprising: detecting a contact between a tool and a surface of a semiconductor device by a displacement of a shaft that is present or a work axis that supports a jig for fixing the semiconductor device. 10. A method of manufacturing a semiconductor device according to claim 9, wherein the interlayer insulating film of the semiconductor device is flattened, and a fluid bearing is used as a bearing of the tool shaft or the work shaft, and after contact is detected by displacement of the shaft, A method of manufacturing a semiconductor device, wherein a predetermined amount of cut is provided between a tool and a surface of a semiconductor device by changing a pressure of a fluid. 11. The method for manufacturing a semiconductor device according to claim 2, wherein the interlayer insulating film of the semiconductor device is flattened. A method for manufacturing a semiconductor device, comprising: detecting a contact between a surface of the semiconductor device and a tool based on a change in vibration. 12. A semiconductor device manufactured with a flat surface by the manufacturing method according to claim 1.