JPH1168313A - Printed wiring board - Google Patents

Printed wiring board

Info

Publication number
JPH1168313A
JPH1168313A JP21673197A JP21673197A JPH1168313A JP H1168313 A JPH1168313 A JP H1168313A JP 21673197 A JP21673197 A JP 21673197A JP 21673197 A JP21673197 A JP 21673197A JP H1168313 A JPH1168313 A JP H1168313A
Authority
JP
Japan
Prior art keywords
line
circuit pattern
layer
signal line
power supply
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21673197A
Other languages
Japanese (ja)
Inventor
Osamu Gunji
修 郡司
Original Assignee
Hitachi Cable Ltd
日立電線株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Cable Ltd, 日立電線株式会社 filed Critical Hitachi Cable Ltd
Priority to JP21673197A priority Critical patent/JPH1168313A/en
Publication of JPH1168313A publication Critical patent/JPH1168313A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0216Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits

Abstract

PROBLEM TO BE SOLVED: To provide a printed wiring board capable of substantially reducing interference and electrostatic induction noise from the outside and being manufactured without complicating work processes by a conventional manufacturing device. SOLUTION: In this multi-layer printed wiring board 20 provided with the circuit pattern of a signal line and the circuit pattern of a ground line or a power supply line, a signal line circuit pattern layer 17 is provided by forming the circuit pattern of the signal line on an insulating substrate 11 and forming the circuit pattern of the ground line or the power supply line so as to hold the signal line there between and the signal line circuit pattern layer 17 other than the circuit pattern of the ground line or the power supply line is covered with the insulation layer 16 of insulating resin or the like. Then, the insulation layer 16 covering the circuit pattern of the signal line is surrounded by a shielding layer 18 connected to the circuit pattern of the ground line or the power supply line and composed of plating, copper foil or conductive resin or the like and the periphery of the respective signal lines is turned to a pseudo coaxial structure.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION
【0001】[0001]
【発明の属する技術分野】本発明は、プリント配線基板
に係り、特に高周波特性に優れ、耐ノイズ性の良好なプ
リント配線基板に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed wiring board, and more particularly to a printed wiring board having excellent high frequency characteristics and good noise resistance.
【0002】[0002]
【従来の技術】近年、集積回路の高密度化に伴い、プリ
ント配線基板は、信号線回路パターン層数を増加するた
めに多層化した多層プリント配線基板が用いられてい
る。
2. Description of the Related Art In recent years, as the density of integrated circuits has increased, multilayer printed wiring boards have been used as printed wiring boards in order to increase the number of signal line circuit pattern layers.
【0003】図3に、この多層プリント配線基板の一例
を示す。
FIG. 3 shows an example of this multilayer printed wiring board.
【0004】図3に示すように、従来の多層プリント配
線基板10は、絶縁層となる基板(プリプレグ,熱硬化
性樹脂)1の両面に、グランド線又は電源線等の銅箔パ
ターン層2、そのグランド線又は電源線等の銅箔パター
ン層2上に絶縁層4を介して信号線回路パターンの銅箔
パターン層5を積層して構成されている。
As shown in FIG. 3, a conventional multilayer printed wiring board 10 includes a copper foil pattern layer 2 such as a ground line or a power supply line on both sides of a substrate (prepreg, thermosetting resin) 1 serving as an insulating layer. A copper foil pattern layer 5 of a signal line circuit pattern is laminated on a copper foil pattern layer 2 such as a ground line or a power supply line via an insulating layer 4.
【0005】このように、従来の多層プリント配線基板
10は、基板1の両側に形成される信号線回路パターン
の銅箔パターン層5は、グランド線又は電源線等の銅箔
パターン層2で挟んだストリップライン構造で積層され
ており、これにより、必要な特性インピーダンスの実現
と層間クロストークの低減を図っている。
As described above, in the conventional multilayer printed wiring board 10, the copper foil pattern layers 5 of the signal line circuit patterns formed on both sides of the board 1 are sandwiched between the copper foil pattern layers 2 such as ground lines or power supply lines. They are stacked in a strip line structure, thereby realizing necessary characteristic impedance and reducing interlayer crosstalk.
【0006】[0006]
【発明が解決しようとする課題】しかしながら、この種
のプリント配線基板10は、実装される部品の高速化が
進み、実装密度が高密度化すると、信号線間の電磁結合
が密となるため、静電誘導、電磁誘導によるノイズやク
ロストークの影響を受けやすく、また、近傍に布線され
た信号線や配線パターン、部品などの影響により、信号
線の特性インピーダンスが不均一になり、信号線に流れ
る信号に反射波が生じ、これが回路動作時の誤動作の原
因となるので、更なる高密度化に対応しきれない。
However, in this type of printed wiring board 10, the speed of components to be mounted is increased, and when the mounting density is increased, the electromagnetic coupling between signal lines becomes dense. It is susceptible to noise and crosstalk due to electrostatic induction and electromagnetic induction, and the characteristic impedance of the signal line becomes non-uniform due to the influence of signal lines, wiring patterns and components laid in the vicinity. A reflected wave is generated in a signal flowing through the circuit, and this causes a malfunction during the circuit operation.
【0007】また、プリント配線基板自身に遮蔽層がな
いので、外部からの静電誘導等の外来ノイズを受けやす
く、このため導電性のシールドケース等を取り付けて外
来ノイズを遮蔽しなければならなかった。
Further, since the printed wiring board itself has no shielding layer, it is susceptible to external noise such as electrostatic induction from the outside. Therefore, it is necessary to mount a conductive shield case or the like to shield external noise. Was.
【0008】尚、上記各問題点を解決する一方法とし
て、従来より用いられているプリント配線基板に代えて
極細同軸線を用いたマルチワイヤー配線基板が提案され
ているが、この方式は、布線が難しく配線基板が高価と
なる傾向があり、実用的ではない。
As a method for solving the above problems, a multi-wire circuit board using a micro coaxial cable has been proposed in place of a conventionally used printed circuit board. Wiring is difficult and the wiring board tends to be expensive, which is not practical.
【0009】また、特開平5−191056号公報、特
開平1−163370号公報、或いは特開平7−212
043号公報などに提案されているように、信号線を、
絶縁層を介して電源線やグランド線による面状パターン
にて囲んだプリント配線板が知られているが、構成が複
雑化して作業工程が増えたり、従来のプリント配線基板
製造装置では製造できない等、コストアップする不都合
がある。
Further, Japanese Patent Application Laid-Open Nos. Hei 5-191056, Hei 1-163370 and Hei 7-212 are disclosed.
As proposed in Japanese Patent No. 043/043, signal lines are
A printed wiring board surrounded by a planar pattern of a power supply line and a ground line via an insulating layer is known, but the configuration is complicated and the number of work steps is increased, or the conventional printed wiring board manufacturing apparatus cannot manufacture the printed wiring board. However, there is a disadvantage that the cost is increased.
【0010】そこで、本発明は、このような点に鑑みて
なされたものであり、信号線を疑似同軸構造とすること
により、干渉や外部からの静電誘導ノイズを大幅に減少
させると共に、従来のプリント配線基板製造装置を使用
し、作業工程を複雑にしないで製作できるプリント配線
基板を提供することを目的とする。
In view of the above, the present invention has been made in view of the above-mentioned circumstances, and the signal line has a pseudo-coaxial structure, so that interference and external static induction noise can be greatly reduced, It is an object of the present invention to provide a printed wiring board which can be manufactured using a printed wiring board manufacturing apparatus without complicating work steps.
【0011】[0011]
【課題を解決するための手段】上記課題を解決するため
に本発明は、信号線の回路パターンとグランド線又は電
源線の回路パターンとを有する多層のプリント配線基板
において、絶縁性基板上に上記信号線の回路パターンを
形成すると共に該信号線を挟むように上記グランド線又
は電源線の回路パターンを形成して信号線回路パターン
層を設け、上記グランド線又は電源線の回路パターン以
外の信号線回路パターン層を絶縁性樹脂等の絶縁層にて
覆った後、その信号線の回路パターンを覆った絶縁層
を、グランド線又は電源線の回路パターンに接続してメ
ッキや銅箔又は導電性樹脂等からなる遮蔽層で囲って各
信号線の周りを疑似同軸構造としたものである。
In order to solve the above problems, the present invention provides a multilayer printed wiring board having a circuit pattern of a signal line and a circuit pattern of a ground line or a power supply line. A signal line circuit pattern layer is provided by forming a circuit pattern of the ground line or the power supply line so as to sandwich the signal line and a signal line other than the circuit pattern of the ground line or the power supply line. After covering the circuit pattern layer with an insulating layer such as an insulating resin, connect the insulating layer covering the circuit pattern of the signal line to the circuit pattern of the ground line or power supply line, and perform plating, copper foil, or conductive resin. A pseudo coaxial structure is formed around each signal line by being surrounded by a shielding layer made of the same.
【0012】請求項2の発明は、信号線の回路パターン
とグランド線又は電源線の回路パターンとを有する多層
のプリント配線基板において、絶縁性基板の両面に導電
層が形成された二枚の基板コア材を、それぞれ内層にグ
ランド線又は電源線の面状パターンを形成した後、絶縁
層を挟んで張り合わせ、それら基板コア材の外層となる
導電層をエッチング等して上記信号線と該信号線を挟む
よう配したグランド線又は電源線の信号線回路パターン
層を形成し、上記グランド線又は電源線の回路パターン
以外の信号線回路パターン層を絶縁性樹脂等の絶縁層に
て覆った後、その信号線の回路パターンを覆った絶縁層
を、グランド線又は電源線の回路パターンに接続してメ
ッキや銅箔又は導電性樹脂等からなる遮蔽層で囲って各
信号線の周りを疑似同軸構造としたものである。
According to a second aspect of the present invention, there is provided a multi-layer printed wiring board having a circuit pattern of a signal line and a circuit pattern of a ground line or a power supply line, the two substrates having conductive layers formed on both surfaces of an insulating substrate. After forming a planar pattern of a ground line or a power supply line in an inner layer, the insulating layer is sandwiched therebetween, and the outer conductive layer of the substrate core material is etched or the like to form the signal line and the signal line. After forming a signal line circuit pattern layer of the ground line or the power line arranged to sandwich the signal line, after covering the signal line circuit pattern layer other than the circuit pattern of the ground line or the power line with an insulating layer such as an insulating resin, Connect the insulating layer covering the signal line circuit pattern to the ground line or power line circuit pattern, surround it with a shielding layer made of plating, copper foil or conductive resin, etc. It is obtained by a coaxial structure.
【0013】上記構成によれば、絶縁性基板上に信号線
を配置し、信号線となる回路パターンを挟むように配し
たグランド線又は電源線の回路パターン以外の信号線を
覆った絶縁樹脂上に、グランド線又は電源線の回路パタ
ーンに接続して銅箔又は導電性樹脂等からなる面状パタ
ーンの遮蔽層により囲った疑似同軸構造とすることで、
信号線のインピーダンスを下げ、信号線間の電磁誘導に
よる干渉を防止することができる。
According to the above arrangement, the signal lines are arranged on the insulating substrate, and the insulating resin covering the signal lines other than the circuit patterns of the ground lines or the power supply lines arranged so as to sandwich the circuit pattern to be the signal lines. In addition, by connecting to the circuit pattern of the ground line or the power supply line, by forming a pseudo coaxial structure surrounded by a shielding layer of a planar pattern made of copper foil or conductive resin, etc.
The impedance of the signal lines can be reduced, and interference due to electromagnetic induction between the signal lines can be prevented.
【0014】また、絶縁性基板の表面を、グランド線や
電源線の面状パターンで覆い、更に隣り合わせとなる信
号線間もグランド線や電源線の回路パターンで遮蔽する
ために、これらのパターンが静電遮蔽の役割をなし、外
部の静電誘導ノイズを大幅に減少させる。
[0014] Further, in order to cover the surface of the insulating substrate with a planar pattern of a ground line or a power supply line, and to shield adjacent signal lines with a circuit pattern of the ground line or the power supply line, these patterns are used. It plays the role of electrostatic shielding and greatly reduces external static induction noise.
【0015】更に、このような構成にすることによっ
て、従来のプリント配線基板の製造装置により、信号線
となる回路パターンを挟むように配したグランド線又は
電源線の回路パターンを形成した後、その信号線を挟む
ように配したグランド線又は電源線の回路パターン以外
の信号線の回路パターンを絶縁性樹脂等にて覆う工程
は、従来のソルダーレジスト工程と同様の作業となり、
従来のプリント配線基板製造装置で製作可能である。ま
た、信号線を覆った絶縁樹脂上に、グランド線又は電源
線の回路パターンに接続された銅箔又は導電性樹脂等か
らなる面状パターンの遮蔽層にて囲った疑似同軸構造を
容易に形成できる。尚、導電性樹脂を塗布して遮蔽層を
形成する代わりに、無電解銅メッキなどによって銅箔層
を形成してもよい。
Further, by adopting such a configuration, a circuit pattern of a ground line or a power supply line arranged so as to sandwich a circuit pattern to be a signal line is formed by a conventional apparatus for manufacturing a printed wiring board. The step of covering the circuit pattern of the signal line other than the circuit pattern of the ground line or the power supply line with the insulating resin or the like arranged so as to sandwich the signal line is the same operation as the conventional solder resist process,
It can be manufactured with a conventional printed wiring board manufacturing apparatus. In addition, a pseudo-coaxial structure is easily formed on the insulating resin covering the signal lines, surrounded by a shielding layer of a planar pattern made of copper foil or conductive resin connected to the circuit pattern of the ground line or the power supply line. it can. Instead of forming the shielding layer by applying a conductive resin, a copper foil layer may be formed by electroless copper plating or the like.
【0016】[0016]
【発明の実施の形態】次に、本発明の好適一実施の形態
を添付図面を用いて詳述する。
Next, a preferred embodiment of the present invention will be described in detail with reference to the accompanying drawings.
【0017】図1に本発明にかかるプリント配線基板の
要部断面図を示す。
FIG. 1 is a sectional view of a main part of a printed wiring board according to the present invention.
【0018】図1に示すように、本発明にかかるプリン
ト配線基板20は、絶縁層と導電層とが多層に積層され
て構成されており、そのプリント配線基板20内に、信
号線の回路パターン17sがグランド線又は電源線の回
路パターン17gを挟んで形成された信号線回路パター
ン層17を有している。
As shown in FIG. 1, a printed wiring board 20 according to the present invention is formed by laminating an insulating layer and a conductive layer in multiple layers. 17s has the signal line circuit pattern layer 17 formed with the circuit pattern 17g of the ground line or the power supply line interposed therebetween.
【0019】具体的には、プリント配線基板20は、絶
縁性基板(プリプレグ,熱硬化性樹脂)11の両面に、
グランド線又は電源線の面状パターン12、プリプレグ
(熱硬化性樹脂)15、信号線回路パターン層17、絶
縁性樹脂等の絶縁層16、メッキや銅箔又は導電性樹脂
等の遮蔽層18、及び絶縁層14が順に積層されて構成
されている。
Specifically, the printed wiring board 20 is provided on both sides of an insulating substrate (prepreg, thermosetting resin) 11.
Ground line or power line planar pattern 12, prepreg (thermosetting resin) 15, signal line circuit pattern layer 17, insulating layer 16 such as insulating resin, shielding layer 18 such as plating or copper foil or conductive resin, And the insulating layer 14 are sequentially laminated.
【0020】そして、プリプレグ(熱硬化性樹脂)1
5、信号線回路パターン層17、絶縁層16、及び遮蔽
層18は、信号線回路パターン層17の信号線が、絶縁
層16で取り囲むように覆われ、更にその上から信号線
回路パターン層17のグランド線又は電源線に接続して
遮蔽層18で覆われており、これにより、信号線の回路
パターン17sの周りが疑似同軸構造となっている。
Then, prepreg (thermosetting resin) 1
5. The signal line circuit pattern layer 17, the insulating layer 16, and the shielding layer 18 are covered so that the signal lines of the signal line circuit pattern layer 17 are surrounded by the insulating layer 16, and the signal line circuit pattern layer 17 And is covered with the shielding layer 18 so as to form a pseudo coaxial structure around the circuit pattern 17s of the signal line.
【0021】次に、この疑似同軸構造のプリント配線基
板20の製造方法を説明する。
Next, a method of manufacturing the printed wiring board 20 having the pseudo coaxial structure will be described.
【0022】本発明にかかるプリント配線基板20を製
造するに際しては、基板11の両面に銅箔を貼り付けて
銅箔層を形成し、その基板11の表面の銅箔層(内層)
に電源線の面状パターン12を形成すると共に裏面の銅
箔層にグランド線の面状パターン12を形成した後、そ
れぞれの面状パターン12,12の上にプリプレグ14
及び接着剤を介して銅箔層(外層)をプレスして設け
る。尚、基板11の表面に銅箔層(内層)を形成する代
わりに、基板11の両面に予め銅箔層が形成された基板
コア材13を使用しても良い。
In manufacturing the printed wiring board 20 according to the present invention, a copper foil layer is formed by attaching copper foil to both sides of the board 11 and the copper foil layer (inner layer) on the surface of the board 11 is formed.
After the planar pattern 12 of the power supply line is formed on the copper foil layer on the back surface and the planar pattern 12 of the ground line is formed, the prepreg 14 is formed on each of the planar patterns 12 and 12.
Then, the copper foil layer (outer layer) is provided by pressing through an adhesive. Instead of forming a copper foil layer (inner layer) on the surface of the substrate 11, a substrate core material 13 having a copper foil layer formed on both surfaces of the substrate 11 in advance may be used.
【0023】そして、この外層銅箔に、信号線の回路パ
ターン17sと、信号線を挟むように配したグランド線
又は電源線の回路パターン17gをエッチングなどによ
り形成する。
Then, on the outer layer copper foil, a circuit pattern 17s of a signal line and a circuit pattern 17g of a ground line or a power supply line arranged so as to sandwich the signal line are formed by etching or the like.
【0024】更に、その信号線を挟むように配したグラ
ンド線又は電源線の回路パターン17g以外の、信号線
の回路パターン17sを絶縁層16で覆う。尚、この絶
縁層16を形成する工程は、従来のソルダーレジスト工
程と同様の作業となり、従来のプリント基板製造装置で
製作可能である。
Further, the circuit pattern 17s of the signal line other than the circuit pattern 17g of the ground line or the power supply line sandwiching the signal line is covered with the insulating layer 16. The process of forming the insulating layer 16 is the same as the conventional solder resist process, and can be manufactured by a conventional printed circuit board manufacturing apparatus.
【0025】その後、信号線を覆った絶縁層16上に、
グランド線又は電源線の回路パターン17gに接続して
面状パターンの遮蔽層18で囲うことにより、それぞれ
の信号線の周りに絶縁層16と遮蔽層18が順に積層さ
れて疑似同軸構造になっているプリント配線基板20が
製造される。
Then, on the insulating layer 16 covering the signal lines,
By connecting to the circuit pattern 17g of the ground line or the power supply line and surrounding it with the planar pattern shielding layer 18, the insulating layer 16 and the shielding layer 18 are sequentially laminated around each signal line to form a pseudo coaxial structure. Printed wiring board 20 is manufactured.
【0026】この疑似同軸構造により、信号線のインピ
ーダンスを下げ、信号線間の電磁誘導による干渉を防止
することができる。
With this pseudo coaxial structure, the impedance of the signal lines can be reduced, and interference between the signal lines due to electromagnetic induction can be prevented.
【0027】更に、絶縁性基板11の表面をグランド線
や電源線の面状パターンで覆い、しかも、隣り合せとな
る信号線間もグランド線や電源線の面状パターンで遮蔽
するために、これらの面状パターンが静電遮蔽の役割を
なし、外部の静電誘導ノイズを大幅に減少させる。
Further, in order to cover the surface of the insulating substrate 11 with a planar pattern of a ground line or a power supply line and to shield adjacent signal lines with a planar pattern of a ground line or a power supply line. The planar pattern serves as an electrostatic shield and greatly reduces external electrostatic induction noise.
【0028】次に、他の実施の形態を図2を用いて説明
する。
Next, another embodiment will be described with reference to FIG.
【0029】図2に示すように、他の実施の形態のプリ
ント配線基板30は、基板(プリプレグ)11の両面に
銅箔層が形成された2枚の基板コア材13を、それぞれ
内層にグランド線又は電源線の面状パターン12を形成
した後、プリプレグ15を挟んでプレス形成し、それら
基板コア材13の外層となる銅箔層をエッチング等によ
り、信号線とその信号線を挟むように配したグランド線
又は電源線の信号線回路パターン層17が形成されてい
る。そして、その信号線回路パターン層17の信号線の
回路パターン上には、上述したプリント配線基板20と
同様に、絶縁層16が積層されており、更にその絶縁層
16の上に、グランド線又は電源線のパターンに接続さ
れてメッキや銅箔又は導電性樹脂等からなる面状パター
ンの遮蔽層18が積層され、信号線の回路パターンの周
りが疑似同軸構造になっている。
As shown in FIG. 2, in a printed wiring board 30 of another embodiment, a board (prepreg) 11 is provided with two board core materials 13 each having a copper foil layer formed on both sides thereof, and grounds are respectively provided in inner layers. After the planar pattern 12 of the wire or the power supply line is formed, press forming is performed with the prepreg 15 interposed therebetween, and the copper foil layer serving as the outer layer of the substrate core material 13 is etched so as to sandwich the signal line and the signal line. The signal line circuit pattern layer 17 of the arranged ground line or power supply line is formed. An insulating layer 16 is laminated on the circuit pattern of the signal line of the signal line circuit pattern layer 17 in the same manner as the above-described printed wiring board 20, and a ground line or a ground line is further formed on the insulating layer 16. The shielding layer 18 having a planar pattern made of plating, copper foil, conductive resin or the like is connected to the pattern of the power supply line, and the circuit pattern of the signal line has a pseudo-coaxial structure.
【0030】すなわち、本実施の形態にあっては信号線
回路パターン層17をグランド線又は電源線の面状パタ
ーン12を介してプリプラグ15上に形成したが、信号
線回路パターン層17は、絶縁層上であれば基板11上
に直接形成しても良い。
That is, in the present embodiment, the signal line circuit pattern layer 17 is formed on the pre-plug 15 via the planar pattern 12 of the ground line or the power supply line. If it is on a layer, it may be formed directly on the substrate 11.
【0031】このように、基板11の両面に銅箔層が形
成された基板コア材13を用いる場合には、他の実施の
形態のプリント配線基板30のように構成することによ
り、容易に信号線回路パターン層17を形成できると共
にその信号線の周りに疑似同軸構造を形成できる。
As described above, when the substrate core material 13 in which the copper foil layers are formed on both surfaces of the substrate 11 is used, the signal can be easily formed by configuring the printed wiring board 30 according to another embodiment. The line circuit pattern layer 17 can be formed, and a pseudo coaxial structure can be formed around the signal line.
【0032】尚、本実施の形態にあっては、基板(プリ
プレグ)11の一方の面には電源線を形成し、他方の面
にはグランド線を形成したが、両方とも電源線あるいは
グランド線であっても良い。
In this embodiment, the power supply line is formed on one surface of the substrate (prepreg) 11 and the ground line is formed on the other surface. It may be.
【0033】また、グランド線や電源線を形成した銅箔
パターン層12の表面は、部品取付け面や半田取付け面
を兼ねてもよい。
The surface of the copper foil pattern layer 12 on which the ground lines and the power lines are formed may also serve as a component mounting surface or a solder mounting surface.
【0034】[0034]
【発明の効果】以上要するに本発明によれば、プリント
配線基板の遮蔽構造により各信号線を遮蔽するので、信
号線の特性インピーダンスを小さくかつ均一にすること
ができる。これにより、信号線に流れる電流に反射波が
少なくなり、プリント配線基板の信号線間の電磁的干渉
を小さくできる。更に、外部からの静電誘導ノイズや、
電磁波障害を大幅に減少させることができる。
In summary, according to the present invention, each signal line is shielded by the shielding structure of the printed wiring board, so that the characteristic impedance of the signal line can be made small and uniform. As a result, the amount of reflected waves in the current flowing through the signal lines is reduced, and electromagnetic interference between the signal lines on the printed wiring board can be reduced. Furthermore, external static induction noise,
Electromagnetic interference can be significantly reduced.
【0035】また、本発明は、銅メッキや導電性ペース
ト以外に、導電性樹脂等によっても遮蔽層を形成できる
ので、安価に製造できる。
In addition, according to the present invention, the shielding layer can be formed by a conductive resin or the like in addition to the copper plating and the conductive paste.
【0036】更に、本発明は、上述した従来のプリント
配線基板の層構成よりも絶縁層数が少なく、また構成が
簡単なので、従来のプリント配線基板の作業工程によっ
て製作可能であり、コストアップすることなく製造でき
る利点がある。
Further, according to the present invention, the number of insulating layers is smaller than that of the above-mentioned conventional printed wiring board, and the structure is simple. There is an advantage that it can be manufactured without using.
【図面の簡単な説明】[Brief description of the drawings]
【図1】本発明の好適一実施の形態を示す要部断面図で
ある。
FIG. 1 is a sectional view of a main part showing a preferred embodiment of the present invention.
【図2】本発明の他の実施の形態を示す要部断面図であ
る。
FIG. 2 is a cross-sectional view of a main part showing another embodiment of the present invention.
【図3】従来のプリント配線基板の一例を示す要部断面
図である。
FIG. 3 is a cross-sectional view of a main part showing an example of a conventional printed wiring board.
【符号の説明】[Explanation of symbols]
11 絶縁性基板(プリプレグ,熱硬化性樹脂) 12 グランド線又は電源線の面状パターン層 14 絶縁層 15 プリプレグ(熱硬化性樹脂) 16 絶縁性樹脂層(レジスト層等) 17 グランド線又は電源線を含む信号線回路パターン
層 18 メッキ又は導電性塗料等の遮蔽層 20 プリント配線基板
Reference Signs List 11 Insulating substrate (prepreg, thermosetting resin) 12 Planar pattern layer of ground line or power line 14 Insulating layer 15 Prepreg (thermosetting resin) 16 Insulating resin layer (resist layer etc.) 17 Ground line or power line Signal line circuit pattern layer including: 18 shielding layer of plating or conductive paint 20 printed wiring board

Claims (2)

    【特許請求の範囲】[Claims]
  1. 【請求項1】 信号線の回路パターンとグランド線又は
    電源線の回路パターンとを有する多層のプリント配線基
    板において、絶縁性基板上に上記信号線の回路パターン
    を形成すると共に該信号線を挟むように上記グランド線
    又は電源線の回路パターンを形成して信号線回路パター
    ン層を設け、上記グランド線又は電源線の回路パターン
    以外の信号線回路パターン層を絶縁性樹脂等の絶縁層に
    て覆った後、その信号線の回路パターンを覆った絶縁層
    を、グランド線又は電源線の回路パターンに接続してメ
    ッキや銅箔又は導電性樹脂等からなる遮蔽層で囲って各
    信号線の周りを疑似同軸構造としたことを特徴とするプ
    リント配線基板。
    In a multilayer printed wiring board having a circuit pattern of a signal line and a circuit pattern of a ground line or a power supply line, a circuit pattern of the signal line is formed on an insulating substrate and the signal line is sandwiched therebetween. A signal line circuit pattern layer is formed by forming a circuit pattern of the ground line or the power supply line on the other, and a signal line circuit pattern layer other than the circuit pattern of the ground line or the power supply line is covered with an insulating layer such as an insulating resin. Then, the insulating layer covering the circuit pattern of the signal line is connected to the circuit pattern of the ground line or power supply line, and is surrounded by a shielding layer made of plating, copper foil, conductive resin, or the like, and the surroundings of each signal line are simulated. A printed wiring board having a coaxial structure.
  2. 【請求項2】 信号線の回路パターンとグランド線又は
    電源線の回路パターンとを有する多層のプリント配線基
    板において、絶縁性基板の両面に導電層が形成された二
    枚の基板コア材を、それぞれ内層にグランド線又は電源
    線の面状パターンを形成した後、絶縁層を挟んで張り合
    わせ、それら基板コア材の外層となる導電層をエッチン
    グ等して上記信号線と該信号線を挟むよう配したグラン
    ド線又は電源線の信号線回路パターン層を形成し、上記
    グランド線又は電源線の回路パターン以外の信号線回路
    パターン層を絶縁性樹脂等の絶縁層にて覆った後、その
    信号線の回路パターンを覆った絶縁層を、グランド線又
    は電源線の回路パターンに接続してメッキや銅箔又は導
    電性樹脂等からなる遮蔽層で囲って各信号線の周りを疑
    似同軸構造としたことを特徴とするプリント配線基板。
    2. A multi-layer printed wiring board having a circuit pattern of a signal line and a circuit pattern of a ground line or a power supply line, wherein two substrate core members each having a conductive layer formed on both surfaces of an insulating substrate, After forming a planar pattern of a ground line or a power supply line on the inner layer, the insulating layer is sandwiched therebetween, and the conductive layer serving as the outer layer of the substrate core material is etched or the like and arranged so as to sandwich the signal line and the signal line. After forming the signal line circuit pattern layer of the ground line or the power line, and covering the signal line circuit pattern layer other than the circuit pattern of the ground line or the power line with an insulating layer such as an insulating resin, the circuit of the signal line is formed. The insulating layer covering the pattern was connected to the circuit pattern of the ground line or power supply line, surrounded by a shielding layer made of plating, copper foil, conductive resin, etc., to form a pseudo-coaxial structure around each signal line. And a printed circuit board.
JP21673197A 1997-08-11 1997-08-11 Printed wiring board Pending JPH1168313A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21673197A JPH1168313A (en) 1997-08-11 1997-08-11 Printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21673197A JPH1168313A (en) 1997-08-11 1997-08-11 Printed wiring board

Publications (1)

Publication Number Publication Date
JPH1168313A true JPH1168313A (en) 1999-03-09

Family

ID=16693053

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21673197A Pending JPH1168313A (en) 1997-08-11 1997-08-11 Printed wiring board

Country Status (1)

Country Link
JP (1) JPH1168313A (en)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1187514A2 (en) * 2000-09-12 2002-03-13 Sony Corporation Printed wiring board
JP2002335094A (en) * 2001-03-19 2002-11-22 Hewlett Packard Co <Hp> Emi shield at board level
JP2003069170A (en) * 2001-08-28 2003-03-07 Murata Mach Ltd Printed board
US6977832B2 (en) 2001-12-26 2005-12-20 Elpida Memory, Inc. Semiconductor memory device capable of improving quality of voltage waveform given in a signal interconnection layer
KR100744082B1 (en) 2005-12-30 2007-08-01 대덕지디에스 주식회사 Multi layers printed circuit board and the method for producing the same
KR101183897B1 (en) 2005-12-02 2012-09-19 엘지전자 주식회사 PCB for mobile communication terminal and Structure for preventing noises
US8873265B2 (en) 2011-03-16 2014-10-28 Kabushiki Kaisha Toshiba Semiconductor memory system
CN105578733A (en) * 2016-02-26 2016-05-11 青岛海信移动通信技术股份有限公司 PCB and manufacturing method thereof
US10211748B2 (en) 2014-09-24 2019-02-19 Aisin Aw Co., Ltd. Control board of power conversion device capable of preventing noise from being emitted to the outside

Cited By (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1187514A2 (en) * 2000-09-12 2002-03-13 Sony Corporation Printed wiring board
EP1187514A3 (en) * 2000-09-12 2004-01-02 Sony Corporation Printed wiring board
JP2002335094A (en) * 2001-03-19 2002-11-22 Hewlett Packard Co <Hp> Emi shield at board level
JP2003069170A (en) * 2001-08-28 2003-03-07 Murata Mach Ltd Printed board
US6977832B2 (en) 2001-12-26 2005-12-20 Elpida Memory, Inc. Semiconductor memory device capable of improving quality of voltage waveform given in a signal interconnection layer
KR101183897B1 (en) 2005-12-02 2012-09-19 엘지전자 주식회사 PCB for mobile communication terminal and Structure for preventing noises
KR100744082B1 (en) 2005-12-30 2007-08-01 대덕지디에스 주식회사 Multi layers printed circuit board and the method for producing the same
US9312215B2 (en) 2011-03-16 2016-04-12 Kabushiki Kaisha Toshiba Semiconductor memory system
US8873265B2 (en) 2011-03-16 2014-10-28 Kabushiki Kaisha Toshiba Semiconductor memory system
US10607979B2 (en) 2011-03-16 2020-03-31 Toshiba Memory Corporation Semiconductor memory system
US9437533B2 (en) 2011-03-16 2016-09-06 Kabushiki Kaisha Toshiba Semiconductor memory system
US9754632B2 (en) 2011-03-16 2017-09-05 Toshiba Memory Corporation Semiconductor memory system
US9859264B2 (en) 2011-03-16 2018-01-02 Toshiba Memory Corporation Semiconductor memory system
US10388640B2 (en) 2011-03-16 2019-08-20 Toshiba Memory Corporation Semiconductor memory system
US11063031B2 (en) 2011-03-16 2021-07-13 Toshiba Memory Corporation Semiconductor memory system
US10211748B2 (en) 2014-09-24 2019-02-19 Aisin Aw Co., Ltd. Control board of power conversion device capable of preventing noise from being emitted to the outside
CN105578733A (en) * 2016-02-26 2016-05-11 青岛海信移动通信技术股份有限公司 PCB and manufacturing method thereof

Similar Documents

Publication Publication Date Title
JP3002539B2 (en) Circuit board with lateral conductive pattern and shielding area and method of manufacturing the circuit board
US5571608A (en) Apparatus and method of making laminate an embedded conductive layer
JP2009535848A (en) Shielded flexible circuit and manufacturing method thereof
JPH08125380A (en) Shielded flexible wiring-board and manufacturing method thereof
JPH09289378A (en) Printed wiring board and manufacture thereof
US5483101A (en) Multilayer printed circuit board
TWI643334B (en) High frequency signal transmission structure and manufacturing method thereof
US10383212B2 (en) Printed circuit board having EMI shielding function, method for manufacturing the same, and flat cable using the same
JPH08125342A (en) Flexible multilayered wiring board and its manufacture
JP2005116811A (en) Multilayer wiring board and method for manufacturing the same
JPH1168313A (en) Printed wiring board
JP2001267710A (en) Electronic circuit device and multilayer printed wiring board
JPH06224562A (en) Multilayer board and its manufacture
JP2006344887A (en) Printed-wiring board and manufacturing method therefor
JPH0693552B2 (en) Shield type flexible circuit board and manufacturing method thereof
US6586687B2 (en) Printed wiring board with high density inner layer structure
JPH07283579A (en) Shielded type flexible wiring board
JP2889471B2 (en) Flexible printed circuit board
JP2000261150A (en) Multilayer printed wiring board and manufacture of multilayer printed wiring board
JP3191517B2 (en) Flexible printed wiring board shielding device
JPH05191056A (en) Printed wiring board
JP2001291817A (en) Electronic circuit device and multilayer printed wiring board
JPH07212043A (en) Printed wiring board and multi-wire wiring board
JP2003224227A (en) Wiring board and semiconductor device employing it
EP0872165A1 (en) Circuit board with screening arrangement against electromagnetic interference