JPH1145892A - Semiconductor device and manufacture of the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device and a method for manufacturing this device, in which a high output or a high frequency operation can be attained by making a substrate thin or forming a through-hole at the time of forming a GaN system semiconductor element on a hard and stable single-crystal substrate such as sapphire or SiC, or the operating voltage of the element can be reduced at the time of forming a GaN system light-emitting element on the substrate. SOLUTION: A GaN system semiconductor layer 2 is grown on the surface of a sapphire substrate 1, a GaN system FET 3 is formed, a particle diameter is successively made small by using diamond polishing particle slurry, the substrate is made thin so as to be less than 100 μm by polishing the back face of the substrate, and a polishing distortion layer is removed by etching the back face with phosphoric acid liquid or the like. Next, the etching of the back face of the substrate is carried out with a similar etching liquid so that a through-hole 8 is formed, a GaN system semiconductor layer 2 at the bottom part of this through-hole is removed by etching with an RIE method, and an Au pad 4 electrically connected with the source of the GaN system FET 3 is exposed, and then an Au thick film connected through the through- hole with the Au pad is formed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly, to gallium nitride (GaN).
And a method of manufacturing the same using a nitride III-V compound semiconductor such as

[0002]

2. Description of the Related Art A nitride-based III-
Group V compound semiconductor (hereinafter also referred to as "GaN-based semiconductor")
Is a direct transition semiconductor, and its forbidden band width is 1.9 to 6.
Since it is theoretically possible to realize a semiconductor light emitting device in the range from the visible region to the ultraviolet region over 2 eV, development of a semiconductor light emitting device using this GaN-based semiconductor has been actively promoted. This GaN-based semiconductor also has great potential as a material for electron transit devices. That is, GaN
Has a saturated electron velocity of about 2.0 × 10 ⁷ cm / s and Si, G
It is larger than aAs and SiC, and has a breakdown electric field of 5 × 10 ⁶ V / cm, which is second only to diamond. For these reasons, it has been expected that GaN-based semiconductors have great potential as materials for high-frequency, high-power semiconductor devices.

In order to manufacture a transistor using the GaN-based semiconductor, it is necessary to grow the GaN-based semiconductor by a chemical vapor deposition (CVD) method or a molecular beam epitaxy (MBE) method. A sapphire substrate is often used. However, although the thermal conductivity of GaN is 1.3 W / cmK at room temperature and larger than the thermal conductivity of GaAs at room temperature of 0.3 W / cmK, the thermal conductivity of sapphire is 0.4 W / cmK at room temperature, which is comparable to that of GaAs. And
Since the thermal conductivity of SiC at room temperature is 4.9 W / cmK, which is smaller than that of SiC by about 1/12, in particular, G is formed on a sapphire substrate.
It has been pointed out that when an aN-based semiconductor is grown to produce a high-power GaN-based field-effect transistor (FET), heat release during operation is poor and characteristic deterioration occurs ((1) Inst. Phys. Conf. Ser., No. 142, 765 (1996)). Therefore, in order to increase the output of the GaN-based FET, it is necessary to improve the heat emission characteristics. On the other hand, when operating this GaN-based FET at a high frequency, it is necessary to reduce the source inductance.

Conventionally, in a GaAs-based FET, a GaAs substrate thinning technique and a basic technique for high-frequency operation and high output by reducing source inductance have been proposed.
There is a technique in which a through hole (via hole) is formed in a GaAs substrate, and an electrical connection is made to the source from the back side of the substrate through the through hole. The outline of these technologies is as follows ((2) Basics of GaAs field-effect transistor, IEICE, 1992, p.207, (3)
U.S. Pat.No. 4,015,278, (4) Int.ElectronDevice
Meet., Tech. Dig., 676 (1981)).

That is, first, in order to thin a GaAs substrate, primary lapping is performed using an abrasive abrasive such as SiC or alumina, and then CeO ₂ , ZrO ₂ , CrO ₂
Polishing is performed on a soft polisher such as a synthetic resin or artificial leather using abrasive grains having a particle size of 1 μm or less to remove processing distortion due to lapping. With this alone, the depth of the remaining processing strain becomes 10 μm or less, but additional processing may be performed by wet etching. Next, GaAs
Regarding the formation of through holes in the substrate, GaAs is easily dissolved by either a sulfuric acid / hydrogen peroxide solution or an alkaline solution, and therefore, basically, only through wet etching using these solutions as an etching solution. Although a hole can be formed, this wet etching involves a large side etching, and it is difficult to control the shape of the through hole. Therefore, a reactive ion etching (RIE) method, an ion milling method, or the like is usually used. When a through hole is formed by using the RIE method, CC is used as an etching gas.
By using a mixed gas of l ₂ F ₂ and He and using a silicon oxide (SiO ₂ ) film or an organic resist film as an etching mask, a high etching rate of 50 to 100 μm / hr can be obtained, and a through hole can be easily formed. Can be formed. As described above, the GaAs substrate is easily processed both mechanically and chemically, so that the GaAs FET can be operated at a high frequency by thinning the substrate and forming a through hole in the substrate.
High output has already been realized.

[0006]

SUMMARY OF THE INVENTION However, GaAs
The technology for thinning the substrate and forming a through hole in the substrate as described above, which is used in the s-based FET, is described as a GaN-based FE.
It is difficult to apply to T. That is, as described above, a sapphire substrate is often used for manufacturing a GaN-based FET. However, since sapphire is much harder than GaAs, the sapphire substrate must be thinned using the above-described conventional lapping technique. Is extremely difficult, and if the substrate is forcibly thinned by lapping, the substrate itself is largely warped by the lapping distortion so that the principal surface side on the element side becomes concave, and eventually is destroyed. Also, regarding the formation of a through hole in a sapphire substrate, wet etching cannot be performed without an effective etching solution because sapphire is extremely stable chemically. At most several μm / h
Since there is no etching mask having an extremely small value of r and a selectivity for performing selective etching, it is practically impossible to form a through hole by any method.
As described above, when a GaN-based FET is formed on a sapphire substrate, it has been difficult to achieve high-frequency operation and high output by thinning the substrate and forming through holes.

The above is a description of a GaN-based FET on a sapphire substrate.
This problem is caused by the fact that, as with the sapphire substrate, SiC is extremely hard and chemically stable.
It also exists when a GaN-based FET is formed on a substrate or the like.

FIG. 14 shows a conventional GaN-based semiconductor laser. As shown in FIG. 14, in this GaN-based semiconductor laser, a Ga-plane sapphire substrate 101
N buffer layer 102, n-type GaN contact layer 103,
n-type AlGaN cladding layer 104, n-type GaN optical waveguide layer _{105, Ga 1-x In x} N / Ga 1-y In y N active layer having a multiple quantum well structure 106, p-type GaN optical waveguide layer 107,
A p-type AlGaN cladding layer 108 and a p-type GaN contact layer 109 are sequentially stacked. Upper layer of n-type GaN contact layer 103, n-type AlGaN cladding layer 1
04, n-type GaN optical waveguide layer 105, Ga _1-x In _x N /
Ga _1-y In _y N multiple quantum well structure active layer 106, p
-Type GaN optical waveguide layer 107, p-type AlGaN cladding layer 1
08 and p-type GaN contact layer 109 have a mesa shape with a predetermined width. Then, the p-type GaN contact layer 10
9, a p-side electrode 110 is provided in ohmic contact, and n-side electrode 110 in a portion adjacent to the mesa portion is provided.
On the GaN contact layer 103, an n-side electrode 111 is provided in ohmic contact.

However, the conventional G shown in FIG.
In the aN-based semiconductor laser, the n-side electrode 111 has an n-type GaN contact layer 10 in a portion adjacent to the mesa portion.
3, the p-side electrode 1 during operation.
Since the current flowing between 10 and the n-side electrode 111 needs to flow along the n-type GaN contact layer 103, the length of the current path becomes longer, which causes an increase in operating voltage. This GaN-based semiconductor laser has a p-side electrode 11
Since the 0 and n-side electrodes 111 are both provided on the same side of the substrate, a p-side electrode is provided on the surface of the substrate and an n-side electrode is provided on the back surface of the substrate. Therefore, a dedicated assembling device is required, which has led to an increase in manufacturing cost.

Therefore, an object of the present invention is to provide a method for forming an element using a nitride III-V compound semiconductor on a hard and chemically stable single crystal substrate such as a sapphire substrate or a SiC substrate. Semiconductor device capable of achieving high-frequency operation and / or high output by thinning a substrate and / or forming a through hole in the substrate, and manufacturing of a semiconductor device capable of easily manufacturing such a semiconductor device It is to provide a method.

Another object of the present invention is to form a light emitting element using a nitride III-V compound semiconductor on a non-conductive single crystal substrate such as a sapphire substrate. It is an object of the present invention to provide a semiconductor device capable of reducing the operating voltage and manufacturing cost of a light-emitting element and a method of manufacturing a semiconductor device capable of easily manufacturing such a semiconductor device.

[0012]

Means for Solving the Problems The present inventor has made intensive studies in order to solve the above-mentioned problems of the prior art. The outline is described below.

There is a problem to be solved when thinning a sapphire substrate on which an element using a GaN-based semiconductor has already been formed. First, in the process of thinning the sapphire substrate using a method such as lapping, the device on the substrate surface side is not damaged, processing distortion is minimized, and furthermore, substrate warpage and the like. It is sufficiently thin, specifically, about 100 μm or less in thickness, for example,
This is to reduce the thickness to 0 μm or less. In addition, unlike the case of using a GaAs substrate, when a sapphire substrate is used, the distortion of the thinned substrate must be finally removed until warping will hinder the subsequent steps. Second
Another object of the present invention is to find a processing method most suitable for forming a through hole at a desired position on a sapphire substrate. As a wet etching method of sapphire, a method using molten borax at about 900 ° C. and a method using molten phosphoric acid at about 400 ° C. are known. The present inventor examined whether these methods are applicable as a technique for forming a through hole in a sapphire substrate. In addition, the present inventors also investigated what kind of material can be used for the etching mask at that time. Furthermore, it was examined whether there is a new simple method of forming a through hole without using such an etching mask.

Now, in the case of a substrate made of a hard material such as a sapphire substrate, it is considered that the only abrasive powder for lapping is diamond powder. In general, the thickness of the work-affected layer or strained layer due to lapping is about several times the grain size of the abrasive grains used. Accordingly, for example, if the thickness is reduced to about 20 nm, the thickness of the sapphire substrate before thinning is generally about 400 μm. About 200 using a polishing liquid containing
Lapping to a thickness of μm. In this case, when the thickness is further reduced, the proportion of the strained layer in the remaining substrate increases, and warpage or breakage is caused by a large strain. Next, the diameter of the diamond abrasive grains is reduced to, for example, 10 μm, and lapping is performed to a thickness of, for example, about 100 μm. As a result, the strain layer generated during the previous lapping can be removed, but a strain layer having a thickness of several tens of μm is newly generated. Therefore, next, for example, lapping or polishing is performed to a thickness of about 40 μm using a polishing liquid containing an abrasive abrasive having a particle diameter of about 1 μm.

Here, in the case of a GaAs substrate, the strain layer due to lapping could be completely removed by the mechanochemical polishing technique. Specifically, it is known that the strained layer can be completely removed by performing polishing in a hypochlorous acid solution containing ultrafine soft particles. However, polishing of such a sapphire substrate in a solution is not known. Therefore, consider using the following method. That is, an appropriate amount of sulfuric acid is mixed with phosphoric acid, and the temperature is adjusted to 280 ° C. This solution has an etching rate of about 10 μm / hr with respect to sapphire. The etching action of sapphire by this high-temperature phosphoric acid is known (for example, see (5) Ceramic Processing Handbook, Construction Industry Research Committee (19)
87)). However, when the device is directly exposed to such a high-temperature corrosive solution, the characteristics of the device and the wiring are deteriorated. Therefore, it is necessary to devise a method in which phosphoric acid does not contact the element side. For this purpose, it is effective to first contact the liquid only on the back side of the substrate, and secondly, to form a protective film on the element side. It is valid. As the protective film, an oxide or nitride film having heat resistance to phosphoric acid, such as a SiO ₂ film or a SiN film formed by a CVD method, or a heat-resistant polyimide film is effective.

Next, as a method of forming a through hole, dry etching such as conventional RIE cannot be adopted. Therefore, consider using the following method.
That is, for example, as shown in FIG. 1, a GaN-based semiconductor layer 2 having a total thickness of, for example, several μm is grown on the surface of a sapphire substrate 1 and a GaN-based FE is formed on the GaN-based semiconductor layer 2.
After forming T3, metal wiring and pads for this GaN-based FET 3 are formed. Reference numeral 4 denotes this GaN-based FET
3 shows an Au pad electrically connected to the source No. 3. Next, the GaN-based semiconductor layer 2 is formed so as to cover the Au pad 4.
An interlayer insulating film 5 such as a SiO ₂ film is formed thereon. Thereafter, the sapphire substrate 1 is thinned to a thickness of 100 μm or less, for example, a thickness of about several tens μm. Next, the back surface of the sapphire substrate 1 in a portion other than the through hole forming portion is covered with an etching mask 6 made of a laminated film in which metal thin films are laminated. As this laminated film, Pt, on a metal thin film having good adhesion to a sapphire substrate of Ni, Cr, Ti, etc.
A two-layer film (for example, a Cr / Pt film) in which a phosphoric acid corrosion resistant metal thin film such as Au or Pd is laminated is used. on the other hand,
On the surface of the interlayer insulating film 5, a protective film 7 made of, for example, polyimide is formed. Next, the back surface of the sapphire substrate 1 is immersed in, for example, an etching solution composed of a phosphoric acid / sulfuric acid solution at a temperature of about 280 ° C. to perform etching. At this time, since the etching rate is approximately 10 μm / hr, the etching time is considered according to the thickness of the sapphire substrate 1.
In this manner, as shown in FIG.
A through hole 8 is formed in the hole. Then, the GaN-based semiconductor layer 2 exposed at the bottom of the through-hole 8 is then formed by RIE.
Is removed by etching to expose the Au pad 4. When the GaN-based semiconductor layer 2 is etched using Cl ₂ gas as an etching gas, the etching rate becomes 5
When the thickness of the Au pad 4 is 1 μm or more, even if the GaN-based semiconductor layer 2 is slightly over-etched, the Au pad 4 can be etched at a rate of about 3 or more at about 10 μm / hr. Enough thickness can be left. The etching mask 6 on the back surface of the sapphire substrate 1 may be removed when the GaN-based semiconductor layer 2 is etched by the RIE method, but there is no problem.

Thereafter, a metal film having a thickness equal to or greater than the thickness of the sapphire substrate 1 is formed on the back surface of the sapphire substrate 1 and is brought into contact with the Au pad 4 through the through hole 8. In the formation of the metal film, specifically, for example, first,
After Ni or Cr and Au are sequentially deposited on the back surface of the sapphire substrate 1 by a vacuum evaporation method or the like, a sufficient thickness, for example, several tens μm to several
An Au film having a thickness of 00 μm is deposited. The thick plate-like metal film formed in this manner allows the GaN-based F
Electrical connection with the source of ET3 and heat radiation are performed.

On the other hand, as another method for forming a through hole in the sapphire substrate, a method using a pulsed laser beam can be considered. That is, sapphire absorbs infrared light having a wavelength of about 6 μm or more. Therefore, for example, the wavelength 1
By irradiating the sapphire substrate with a pulse laser beam of a 0.6 μm CO ₂ laser, the sapphire can be locally heated to a very high temperature, and sapphire can be evaporated (ablated). This technology is a technology that has been practically used for scribing alumina substrates. Specifically, for example, a hole having a depth of about 200 μm can be formed in the alumina substrate by irradiating one pulse having a peak output of 300 W, a pulse width of 200 μs, and a beam diameter of about 100 μm. Therefore, for example, as shown in FIG. 3, a desired position on the back surface of the sapphire substrate 1 having a thickness of about 200 μm is irradiated with a pulse laser beam 9 by a CO ₂ laser to, for example, a depth of 5 μm.
After forming a hole 10 having a depth of about 0 μm, a 150 μm-thick etch
By performing uniform etching to about m, the through hole 8 can be formed as shown in FIG. This method is a maskless process, and the number of steps is very small.

Here, the significance of the thinning of the sapphire substrate will be described again. As shown in FIG. 5, the thermal conductivity of sapphire is not only small at about 0.4 W / cmK at room temperature, but also has a large negative slope with respect to temperature, and decreases with increasing temperature. When an element using a GaN-based semiconductor is formed on a sapphire substrate, the heat generated from this element during operation moves to the sapphire substrate by heat conduction. However, as described above, a decrease in the thermal conductivity of sapphire with an increase in temperature means that heat dissipation becomes difficult with an increase in temperature. Therefore,
From the viewpoint of heat dissipation, the thinner the sapphire substrate on which the element is mounted, the more advantageous it is. It is preferable that the sapphire substrate be as thin as possible within the range that can withstand mechanical strength. With this thinning,
Efficient heat dissipation becomes possible, and a rise in temperature is suppressed.

The above description is for the case where a sapphire substrate is used, but the same can be said for the case where another single crystal substrate such as a SiC substrate is used.

On the other hand, Ga constituting a GaN-based light emitting device is formed on a non-conductive single crystal substrate such as a sapphire substrate.
After forming the N-based semiconductor layer, a through hole is formed on the single crystal substrate from the back side in the same manner as described above to expose the lower surface of the GaN-based semiconductor layer, and contact the GaN-based semiconductor layer from below through the through hole. One electrode is formed on the back side of the single crystal substrate so that the other electrode is aligned with the through hole on the GaN-based semiconductor layer, so that the current flowing between these electrodes during operation can be reduced. The length of the passage is substantially equal to the thickness of the GaN-based semiconductor layer, and therefore, the length of the current passage is extremely short as compared with the conventional case.

The present invention has been devised based on the above study by the present inventors.

That is, in order to achieve the above object, a method of manufacturing a semiconductor device according to a first aspect of the present invention is directed to a method for manufacturing a semiconductor device, the method comprising: A step of forming an element using a nitride III-V compound semiconductor thereon, and polishing the other main surface of the single crystal substrate with a polishing liquid containing a polishing material composed of diamond abrasive grains; A step of thinning the single crystal substrate by lapping while gradually reducing the grain size;
Step of removing a strained layer formed on the other main surface of the single crystal substrate during lapping by etching using phosphoric acid or an etching solution containing phosphoric acid and sulfuric acid as main components at a temperature of 50 to 450 ° C. And characterized in that:

In the first invention, typically,
By lapping, the single crystal substrate is thinned to a thickness of 100 μm or less, or a thickness of several tens μm or less. Further, in order to prevent the element from being damaged at the time of etching for removing the strained layer due to lapping, preferably, the surface of the element formed on one main surface of the single crystal substrate before etching is removed. It is covered with a protective film having resistance to an etching solution. As this protective film, for example,
Silicon oxide (SiO ₂ ) film, silicon nitride (SiN)
A film, a polyimide film, or the like can be used. In this etching, preferably, only the other main surface of the single crystal substrate is immersed in an etching solution.

A semiconductor device according to a second aspect of the present invention includes a single crystal substrate made of a material different from a nitride III-V compound semiconductor, and a nitride III-V on one main surface of the single crystal substrate. In a semiconductor device having an element using a group III compound semiconductor, electrical connection to the element is performed through a through hole provided in a single crystal substrate.

The third invention of the present invention relates to a nitride III
A single crystal substrate made of a material different from a group V compound semiconductor, and an element using a nitride III-V compound semiconductor on one main surface of the single crystal substrate, provided on the single crystal substrate. A method of manufacturing a semiconductor device in which an element is electrically connected to a device through a through hole, wherein the other main surface of the single crystal substrate is etched at a temperature of 150 to 450 ° C. containing phosphoric acid or phosphoric acid and sulfuric acid as main components. A through hole is formed by selectively etching using a liquid.

In the third aspect of the present invention, a single thin film made of Cr, Ti or Ni and a second thin film made of Pt, Pd or Au on the other main surface of the single crystal substrate. An etching mask is formed, and a through-hole is formed by etching the single crystal substrate using the etching mask. At the time of this etching, etching is preferably performed by immersing only the other main surface of the single crystal substrate in an etching solution.

The fourth invention of the present invention is directed to a nitride III
A single crystal substrate made of a material different from a group V compound semiconductor, and an element using a nitride III-V compound semiconductor on one main surface of the single crystal substrate, provided on the single crystal substrate. A method for manufacturing a semiconductor device in which electrical connection to an element is made through a through-hole, wherein the other main surface of the single crystal substrate is selectively irradiated with laser light having a wavelength of 6 μm or more so as to irradiate one main surface. Forming a hole having a depth of 10 μm or more that cannot be reached, and etching the other main surface of the single crystal substrate using an etching solution containing phosphoric acid and sulfuric acid as main components at a temperature of 150 to 450 ° C. Forming a through-hole by allowing the hole to reach one of the main surfaces.

In the fourth invention, for example, a pulse laser beam having a wavelength of 10.6 μm by a CO ₂ laser is used as the laser beam.

In the present invention, the shape of the through-hole in the single crystal substrate can be selected as necessary, and is, for example, a circle or a rectangle (including a long one extending in a slit shape). In addition, one through hole may be provided for each element, or a plurality of through holes may be provided. In the case where a plurality of through holes are provided as in the latter case, these through holes may be provided in one row, or may be provided in a plurality of rows, and various arrangements can be made.

In the present invention, the single crystal substrate is, for example, a sapphire substrate, a spinel substrate, a perovskite-based yttrium aluminate (YAP) substrate, a SiC substrate, or the like.

In the present invention, the nitride III
The group-V compound semiconductor contains at least Ga and N, and optionally, one or more group III elements and / or A selected from the group consisting of Al, In and B.
It contains at least one group V element selected from the group consisting of s and P. Some specific examples of the nitride III-V compound semiconductor include GaN, AlGaN, and GaIn.
N, AlGaInN and the like.

In the present invention, the semiconductor device is, for example, an electron transit element such as a field effect transistor (FET) or a light emitting element such as a semiconductor laser or a light emitting diode.

According to the first aspect of the present invention configured as described above, the other main surface of the single crystal substrate is wrapped while gradually reducing the particle size of the abrasive, thereby forming the single crystal substrate. Even if the single crystal substrate is extremely hard, such as a sapphire substrate or a SiC substrate, it does not cause warping or destruction, while minimizing the strained layer generated at the time of lapping. In addition, the single crystal substrate can be thinned to a desired thickness. Then, the other main surface of the single crystal substrate thinned in this way is set to 150 to 45.
By etching using an etching solution containing phosphoric acid or phosphoric acid and sulfuric acid as main components at a temperature of 0 ° C., a strained layer formed on the other main surface of the single crystal substrate during lapping can be removed. it can.

According to the second aspect of the present invention configured as described above, since the element is electrically connected to the element through the through hole provided in the single crystal substrate, the element is an FET. In addition, the source inductance can be reduced. In the case where a light-emitting element using a nitride III-V compound semiconductor is formed over a non-conductive single crystal substrate, the light-emitting element corresponds to one electrode provided over the nitride III-V compound semiconductor layer. By providing a through hole from the back surface side of a part of the single crystal substrate, and making the other electrode contact the lower surface of the nitride-based III-V compound semiconductor layer through this through hole to perform the other electrical connection to the light emitting element. In addition, the length of the path of the current flowing between these electrodes during operation can be made extremely short, substantially equal to the thickness of the nitride-based III-V compound semiconductor layer.

According to the third aspect of the present invention configured as described above, the other main surface of the single crystal substrate is set to 150 to 45
Since the through-hole is formed by selectively etching using phosphoric acid at a temperature of 0 ° C. or an etching solution containing phosphoric acid and sulfuric acid as main components, the through-hole is formed at a desired position on the single crystal substrate. Holes can be easily formed.

According to the fourth aspect of the present invention configured as described above, the other main surface of the single crystal substrate is selectively irradiated with laser light having a wavelength of 6 μm or more, thereby forming one main surface. After forming a hole having a depth of 10 μm or more that does not reach the upper limit, the other main surface of the single crystal substrate is etched using phosphoric acid or an etching solution containing phosphoric acid and sulfuric acid as main components at a temperature of 150 to 450 ° C. By doing so, the hole reaches one of the main surfaces to form the through hole, so that the through hole can be easily formed at a desired position on the single crystal substrate without using a mask.

[0038]

Embodiments of the present invention will be described below with reference to the drawings. In all the drawings of the embodiments, the same or corresponding portions are denoted by the same reference numerals.

FIGS. 6 to 10 show a method of manufacturing a GaN-based FET according to the first embodiment of the present invention.

In the first embodiment, first, as shown in FIG. 6, a GaN-based semiconductor layer 22 is grown on the surface of a sapphire substrate 21, and a GaN-based FET 23 is formed on the GaN-based semiconductor layer 22. Here, the thickness of the sapphire substrate 21 is, for example, about 400 μm, and the thickness of the GaN-based semiconductor layer 22 is, for example, about 4 μm. Next, this GaN
A metal wiring and a pad for the system FET 23 are formed. Reference numeral 24 indicates an Au pad electrically connected to the source of the GaN-based FET 23. Next, an interlayer insulating film 25 such as a SiO ₂ film is formed on the GaN-based semiconductor layer 22 so as to cover the Au pad 24. Next, a protective film 26 is formed on the interlayer insulating film 25. As the protective film 26, for example, a heat-resistant polyimide film having a thickness of 10 μm is used. Next, a Si substrate 27 is placed on the protective film 26,
It adheres to the protective film 26. The thickness of the Si substrate 27 is, for example, about 250 μm. Here, this Si substrate 27
This is for preventing the thinned sapphire substrate 21 from warping after the lapping is completed and for facilitating the handling of the sapphire substrate 21. Next, this Si substrate 2
A wrapping jig 29 is adhered on the base 7 via a wax 28.

Next, this sample was set on a lapping table of a lapping apparatus (not shown).
Lapping of the back surface of the sapphire substrate 21 is performed in a polishing solution composed of an aqueous solution containing an abrasive composed of diamond abrasive grains of 0 to 40 μm. When the thickness of the sapphire substrate 21 reaches, for example, about 200 μm by the lapping, the sample and the lapping table are washed, and the polishing liquid is removed. Next, lapping of the back surface of the sapphire substrate 21 is performed in a polishing liquid composed of an aqueous solution containing an abrasive composed of diamond abrasive grains having a particle diameter of 5 to 12 μm, for example. Due to this lapping, the thickness of the sapphire substrate 21 is, for example, about 100 μm.
When it reaches m, the wrapping ends. In this way, as shown in FIG.
It is thinned to a thickness of μm. Thereafter, the sample is warmed by a hot plate (not shown), the wrapping jig 29 is removed, and the wax 28 is removed.

Next, as described above, a thickness of about 100 μm
The back surface of the thinned sapphire substrate 21 is, for example, 285.
Phosphoric acid (H ₃ PO ₄ ) / sulfuric acid (H ₂ SO
₄ ) Etch by immersing in an etching solution composed of a mixed solution. This etching can be specifically performed, for example, as follows.

That is, as shown in FIG. 8, H ₃ P
An etching solution 32 containing a mixed solution of H ₃ PO ₄ / H ₂ SO _{4 in which} O ₄ : H ₂ SO ₄ = 1: 1 is placed.
The etching liquid 32 is heated to an etching temperature by the hot plate 30 in advance. Next, a dropping lid 33 made of a donut-shaped Pt plate whose outer diameter is slightly smaller than the diameter of the Pt container 31 and whose inner diameter is slightly smaller than the diameter of the sapphire substrate 21 is held on the etching solution 32.
At this time, the upper surface of the drop lid 33 is made substantially flush with the liquid surface of the etching liquid 32. This drop lid 33
Is to keep the composition of H ₃ PO ₄ constant by preventing the evaporation of water from the etching solution 32 composed of the H ₃ PO ₄ / H ₂ SO ₄ mixed solution, and to contact the etching solution 32 only on the back surface of the sapphire substrate 21. It is to make. Then, the sapphire substrate 21 is placed on the drop lid 33.
Is placed so that the outer periphery thereof is dropped and overlaps the inner periphery of the lid 33. At this time, only the back surface of the sapphire substrate 21 contacts the etching solution 32. As a result, only the back surface of the sapphire substrate 21 is etched, and the strain layer generated during lapping is removed.

Next, as shown in FIG.
On the back surface of the sapphire substrate 21 at the portion corresponding to
After forming a resist pattern (not shown) having a shape corresponding to the through hole to be formed by photolithography, a Cr film having a thickness of, for example, 20 nm and a Pt film having a thickness of, for example, 0.1 μm are formed thereon, for example. They are sequentially formed by a vacuum deposition method. Thereafter, the resist pattern is removed together with the Cr film and the Pt film formed thereon by the lift method. Thus, the etching mask 34 made of the Cr / Pt film is formed. Next, the back surface of the sapphire substrate 21 is
As described above, for example, H ₃ PO ₄ / H ₂ SO at 285 ° C.
₄ Dipping for about 3 hours in an etching solution consisting of a mixture,
The sapphire substrate 21 is selectively etched until the GaN-based semiconductor layer 22 is exposed. Thereby, a through hole 35 is formed in the sapphire substrate 21.

Next, the sapphire substrate 21 is introduced into an RIE apparatus (not shown), for example, using a Cl ₂ gas as an etching gas. Layer 22 is selectively etched. The etching rate at this time can be, for example, about 10 μm / hr, and the thickness of the GaN-based semiconductor layer 22 is about 4 μm as described above.
m, the GaN-based semiconductor layer 2 takes about 25 minutes.
2 can be removed by etching to expose the Au pad 24.

Next, as shown in FIG. 10, a Cr film having a thickness of, for example, 20 nm and an Au film having a thickness of, for example, 5 μm are successively formed again by, for example, a vacuum evaporation method to form a Cr / Au film 3.
6 is formed on the Cr / Au film 36 by, for example, a plating method.
A u film 37 is formed. Thereafter, the protective film 26 made of a polyimide film is removed with an organic solvent.

Through the above steps, the substrate is formed on the sapphire substrate 21 thinned to a thickness of about 100 μm. The GaN-based FET 23 to which the thick Au film 37 is electrically connected from the side is manufactured.

As described above, according to the first embodiment, after the GaN-based FET 23 is formed by growing the GaN-based semiconductor layer 22 on the surface of the sapphire substrate 1, the back surface of the sapphire substrate 1 Particle size 20-4 as the first stage
Lapping is performed to a thickness of about 200 μm using a polishing liquid composed of an aqueous solution containing 0 μm diamond abrasive grains, and then, as a second step, using a polishing liquid composed of an aqueous solution containing diamond abrasive grains having a particle size of 5 to 12 μm Since lapping is performed to a thickness of about 100 μm, warping and destruction of the sapphire substrate 21 due to lapping are suppressed, and a strain layer generated during lapping is minimized.
The sapphire substrate 21 can be reduced to a thickness of about 100 μm. Further, after the lapping, the back surface of the sapphire substrate 21 is etched using an etching solution composed of a mixed solution of H ₃ PO ₄ / H ₂ SO ₄ , so that the strain layer generated on the back surface of the sapphire substrate 21 during the lapping is removed. It can be completely removed. Then, the Au film 3 acting as a heat sink is formed by thinning the sapphire substrate 21.
GaN-based FE
The temperature rise at T23 is greatly reduced. As a result, an increase in gate leakage, a decrease in carrier mobility, and the like can be suppressed, and the high-frequency characteristics of the GaN-based FET 23 can be maintained until a high output. GaN-based FET2
By significantly alleviating the temperature rise of No. 3, it is possible to suppress the migration in the metal wiring and prevent the interlayer insulating film 25 from deteriorating, thereby improving the reliability. Further, a through hole 35 is formed on the back surface of the sapphire substrate 21.
Is formed on the Au pad 24 through the through hole 35.
Since the u film 37 is electrically connected, the source inductance can be greatly reduced, and high-frequency operation can be achieved. Thus, a high-frequency, high-output, high-performance GaN-based FET 23 can be realized. In addition, since the temperature rise of the GaN-based FET 23 is greatly reduced, the GaN-based FET 23 can be formed on the sapphire substrate 21 at a high density, thereby further increasing the output. .

Next, G according to the second embodiment of the present invention will be described.
A method for manufacturing an aN-based FET will be described.

In the second embodiment, first, similarly to the first embodiment, the sapphire substrate 21 is thinned to a thickness of about 200 μm.

Next, as shown in FIG. 11, the back surface of the thinned sapphire substrate 21 is irradiated with a pulse laser beam 37 having a wavelength of 10.6 μm by, for example, a CO ₂ laser to reach the surface of the sapphire substrate 21. No, for example, a bullet-shaped hole 38 is formed. The pulse laser beam 37 has, for example, a head output of 150 W and a pulse width of 200 μm.
s, a beam diameter of about 100 μm is used. Further, for example, by irradiating the pulse laser beam 39 with one pulse at one point in the region of the Au pad 24, a hole 38 having a diameter of about 100 μm and a depth of about 100 μm on the back surface of the sapphire substrate 21 can be formed. .

Next, by the same method as described above, H ₃ P
The back surface of the sapphire substrate 21 is non-selectively etched without using a mask using an etching solution composed of an O ₄ / H ₂ SO ₄ mixed solution. As a result, the thickness of the sapphire substrate 21 is uniformly reduced, and the sapphire substrate 21 corresponding to the Au pad 24 is eliminated by, for example, etching for about 10 hours, and a through hole 35 is formed as shown in FIG. The GaN-based semiconductor layer 22 is exposed at the bottom. At this time, since the sapphire substrate 21 is etched not only in the depth direction but also in the lateral direction, the diameter of the through hole 35 on the back surface of the sapphire substrate 21 becomes larger than the diameter of the hole 38 formed initially. Therefore, by controlling the conditions for this etching, the GaN-based semiconductor layer 22 that is circularly exposed at the bottom of the through hole 35 can have a desired diameter. Thereafter, in the same manner as described above,
5, the GaN-based semiconductor layer 22 exposed in a circular shape at the bottom of the substrate 5 is removed to expose the Au pad 24. Further, the Cr / Au film 36 and the Au film 37 are formed, and the manufacture of the GaN-based FET 23 is completed.

According to the second embodiment, as in the first embodiment, by reducing the thickness of the sapphire substrate 21 and forming the through hole 35 in the sapphire substrate 21, a high-frequency, high-output, high-performance GaN The system FET 23 can be realized. In addition to this, according to the second embodiment, since the through hole 35 can be formed without using a mask, there is an advantage that the manufacturing process can be simplified.

Next, G according to the third embodiment of the present invention will be described.
The aN-based semiconductor laser will be described. This GaN semiconductor laser is SCH (Separate Confinement Heterostr
ucture) structure.

As shown in FIG. 13, in this GaN-based semiconductor laser, a Ga-plane sapphire substrate
N buffer layer 52, n-type GaN contact layer 53, n-type AlGaN cladding layer 54, n-type GaN optical waveguide layer 55,
_{Ga 1-x In x N /} Ga 1-y In y N active layer having a multiple quantum well structure 56, p-type GaN optical guide layer 57, p-type AlGa
An N cladding layer 58 and a p-type GaN contact layer 59 are sequentially stacked. On the p-type GaN contact layer 59, a stripe-shaped p-side electrode 60 having, for example, a Ni / Au structure or a Ni / Pt / Au structure is provided in ohmic contact. On the other hand, the c-plane sapphire substrate 51 at the portion corresponding to the p-side electrode 60
Is formed in ohmic contact with the n-type GaN contact layer 53 through the through hole 61, for example, Ti / A
An n-side electrode 62 having an l-structure is provided. Here, the through holes 61 may be, for example, circular or rectangular ones provided at equal intervals in the direction in which the p-side electrode 60 extends, or may extend in the direction in which the p-side electrode 60 extends, for example, slightly less than the resonator length. It may be a short slit or a combination thereof.

Next, a method of manufacturing the GaN-based semiconductor laser according to the third embodiment configured as described above will be described.

In order to manufacture this GaN-based semiconductor laser, first, a GaN buffer layer 52 is grown on a c-plane sapphire substrate 51 by MOCVD at a temperature of, for example, 560 ° C., and then the Ga-layer is grown by MOCVD.
On the N buffer layer 52, an n-type GaN contact layer 53, n
-Type AlGaN cladding layer 54, n-type GaN optical waveguide layer 5
_{5, Ga 1-x In x} N / Ga 1-y In y N multi active layer 56 of quantum well structure, p-type GaN optical guide layer 57, p-type Al
GaN cladding layer 58 and p-type GaN contact layer 5
9 is grown sequentially. Here, the n-type GaN contact layer 53, the n-type AlGaN cladding layer 54, the n-type GaN optical waveguide layer 55, the p-type GaN optical waveguide layer 57, the p-type AlGaN cladding layer 58, and the p-type GaN
The growth temperature of the contact layer 59 is about 1000 ° C., and the growth temperature of the active layer 56 having a Ga _1-x In _x N / Ga _1-y In _y N multiple quantum well structure, which is a layer containing In, is 700 to 800.
° C. As a growth material of these nitride-based III-V compound semiconductor layers, for example, trimethylgallium (TMGa) is
Trimethylaluminum (TMAl) is used as a raw material of Al which is a group element, trimethylindium (TMIn) is used as a raw material of In which is a group III element, and ammonia (NH ₃ ) is used as a raw material of N which is a group V element. .
As the carrier gas, for example, a mixed gas of hydrogen (H ₂ ) and nitrogen (N ₂ ) is used. As for the dopant, for example, monosilane (Si
H ₄ ), and bis-methylcyclopentadienyl magnesium, for example, is used as the p-type dopant. After this,
p-type layer, that is, p-type GaN optical waveguide layer 57, p-type Al
GaN cladding layer 58 and p-type GaN contact layer 5
A heat treatment for electrically activating the p-type impurity doped in 9 is performed. This heat treatment is performed at a temperature of about 800 ° C. in a nitrogen gas atmosphere, for example.

Next, a p-side electrode 60 is formed on the p-type GaN contact layer 59 by, for example, a lift-off method.

Next, the c-plane sapphire substrate 51 at the portion corresponding to the p-side electrode 60 is selectively removed from the rear surface side by the same method as in the first or second embodiment, and the through hole 61 is formed.
To form Thereafter, the GaN buffer layer 52 exposed inside the through hole 61 is removed by etching with an alkaline solution or the like, so that the lower surface of the n-type GaN contact layer 53 is exposed.

Next, a Ti / Al film is formed on the entire back surface of the c-plane sapphire substrate 51 by a vacuum deposition method or the like, and an n-side electrode 62 is formed.

Thereafter, the c-plane sapphire substrate 51 on which the laser structure is formed as described above is processed into a bar shape to form both resonator end faces, and the bar is further formed into chips.
As described above, the intended GaN-based semiconductor laser having the SCH structure is manufactured.

As described above, according to the third embodiment, the n-side electrode 62 is connected to the n-type GaN contact layer through the through hole 61 provided in the c-plane sapphire substrate 51 in alignment with the p-side electrode 60. Since the bottom surface of the GaN-based semiconductor laser 53 is in ohmic contact with the n-type GaN contact layer 53, the length of the current path flowing between the p-side electrode 60 and the n-side electrode 62 during operation of the GaN-based semiconductor laser is reduced.
n-type AlGaN cladding layer 54, n-type GaN optical waveguide layer 5
5, active layer 56, p-type GaN optical waveguide layer 57, p-type AlG
aN cladding layer 58 and p-type GaN contact layer 59
And the length of the current path is extremely shorter than that of the conventional GaN-based semiconductor laser. Therefore, the operating voltage of the GaN-based semiconductor laser can be reduced accordingly.

This GaN-based semiconductor laser is made of Ga
As in the case of the As-based semiconductor laser, the p-side electrode is provided on the front surface of the substrate and the n-side electrode is provided on the back surface of the substrate. It can be performed, and there is no need to prepare a dedicated assembly device. For this reason, Ga
The manufacturing cost of the N-based semiconductor laser can be reduced.

Although the embodiments of the present invention have been specifically described above, the present invention is not limited to the above embodiments, and various modifications based on the technical idea of the present invention are possible.

For example, the numerical values, materials, structures, processes, and the like described in the first, second, and third embodiments are merely examples, and different numerical values, materials, structures, and the like may be used as necessary. A process or the like may be used.

In the first embodiment described above,
Before lapping, the front side of the sapphire substrate 21
Although bonded to the i-substrate 27, the Si substrate 27 can be omitted if necessary.

Also, in the third embodiment described above,
The case where the present invention is applied to a GaN-based semiconductor laser having an SCH structure has been described.
In addition to a GaN-based semiconductor laser having a Heterostructure) structure, the present invention can be applied to a GaN-based light emitting diode.

[0068]

As described above, according to the first aspect of the present invention, the nitride III-III is formed on a hard and chemically stable single crystal substrate such as a sapphire substrate or a SiC substrate.
In the case of forming an element using a group V compound semiconductor, high output can be achieved by thinning the substrate.

According to the second aspect of the present invention, an element using a nitride III-V compound semiconductor on a hard and chemically stable single crystal substrate such as a sapphire substrate or a SiC substrate. In the case where the element is formed, when the element is an FET, the source inductance can be reduced and high-frequency operation can be achieved by electrical connection to the element through a through hole provided in the single crystal substrate. Alternatively, in the case where a light-emitting element using a nitride III-V compound semiconductor is formed over a non-conductive single crystal substrate such as a sapphire substrate, the operating voltage and the manufacturing cost of the light-emitting element should be reduced. Can be.

Further, according to the third or fourth aspect of the present invention, a nitride-based III-type substrate is formed on a hard and chemically stable single crystal substrate such as a sapphire substrate or a SiC substrate.
When an element using a group V compound semiconductor is formed and an electrical connection to the element is made through a through hole provided in the single crystal substrate, the through hole can be easily formed in the single crystal substrate.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view for explaining the present invention.

FIG. 2 is a cross-sectional view for explaining the present invention.

FIG. 3 is a cross-sectional view for explaining the present invention.

FIG. 4 is a cross-sectional view for explaining the present invention.

FIG. 5 is a schematic diagram showing the temperature dependence of the thermal conductivity of sapphire.

FIG. 6 is a GaN-based FE according to the first embodiment of the present invention.
FIG. 4 is a cross-sectional view for describing a method for manufacturing T.

FIG. 7 is a GaN-based FE according to the first embodiment of the present invention.
FIG. 4 is a cross-sectional view for describing a method for manufacturing T.

FIG. 8 is a GaN-based FE according to the first embodiment of the present invention.
It is a basic diagram for explaining the manufacturing method of T.

FIG. 9 is a GaN-based FE according to the first embodiment of the present invention.
FIG. 4 is a cross-sectional view for describing a method for manufacturing T.

FIG. 10 shows a GaN-based F according to the first embodiment of the present invention.
It is sectional drawing for demonstrating the manufacturing method of ET.

FIG. 11 shows a GaN-based F according to a second embodiment of the present invention.
It is sectional drawing for demonstrating the manufacturing method of ET.

FIG. 12 shows a GaN-based F according to a second embodiment of the present invention.
It is sectional drawing for demonstrating the manufacturing method of ET.

FIG. 13 is a sectional view showing a GaN-based semiconductor laser according to a third embodiment of the present invention.

FIG. 14 is a sectional view showing a conventional GaN-based semiconductor laser.

[Explanation of symbols]

1, 21 ... sapphire substrate, 2, 22 ... GaN
System semiconductor layer, 4, 24 ... Au pad, 5, 25 ...
・ Interlayer insulating film, 6, 34 ... etching mask, 7,
26: protective film, 8, 35, 61 ... through-hole, 9,
37: pulse laser beam, 10, 38: hole,
51: c-plane sapphire substrate, 53: n-type GaN
Contact layer, 54... N-type AlGaN cladding layer,
55 ... n-type GaN optical waveguide layer, 56 ... active layer, 5
7 ... p-type GaN optical waveguide layer, 58 ... p-type AlGa
N cladding layer, 59 ... p-type GaN contact layer, 6
0 ... p-side electrode, 62 ... n-side electrode

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁶ Identification code FI H01L 21/306 H01L 27/12 S 21/308 33/00 C 27/12 H01S 3/18 33/00 H01L 21/306 B H01S 3/18

Claims (15)

[Claims] 1. A step of forming an element using a nitride III-V compound semiconductor on one main surface of a single crystal substrate made of a material different from a nitride III-V compound semiconductor; The other main surface of the crystal substrate is thinned using a polishing liquid containing an abrasive made of diamond abrasive grains, and lapping while gradually reducing the particle size of the abrasive. And the other main surface of the wrapped single crystal substrate is etched using an etching solution containing phosphoric acid or phosphoric acid and sulfuric acid as main components at a temperature of 150 to 450 ° C. Removing the strained layer formed on the other main surface of the single crystal substrate. 2. The method according to claim 1, wherein said single crystal substrate is thinned to a thickness of 100 μm or less. 3. A method of protecting a surface of the element formed on the one main surface of the single crystal substrate before etching the other main surface of the single crystal substrate, the surface of the element having resistance to the etching liquid. 2. The method according to claim 1, wherein the semiconductor device is covered with a film. 4. The method according to claim 3, wherein said protective film is a silicon oxide film, a silicon nitride film, or a polyimide film. 5. The single crystal substrate according to claim 1, wherein the other main surface of the single crystal substrate is immersed in the etching solution to etch the other main surface of the single crystal substrate. A method for manufacturing a semiconductor device. 6. The method according to claim 1, wherein the single crystal substrate is a sapphire substrate, a spinel substrate, a perovskite-based yttrium aluminate substrate, or a SiC substrate.
The manufacturing method of the semiconductor device described in the above. 7. A single crystal substrate made of a material different from a nitride III-V compound semiconductor, and an element using a nitride III-V compound semiconductor on one main surface of the single crystal substrate. The semiconductor device according to claim 1, wherein the element is electrically connected to the element through a through hole provided in the single crystal substrate. 8. The substrate according to claim 7, wherein the single crystal substrate is a sapphire substrate, a spinel substrate, a perovskite-based yttrium aluminate substrate, or a SiC substrate.
13. The semiconductor device according to claim 1. 9. A single crystal substrate made of a material different from a nitride III-V compound semiconductor, and an element using a nitride III-V compound semiconductor on one main surface of the single crystal substrate. A method for manufacturing a semiconductor device, wherein electrical connection to the element is performed through a through hole provided in the single crystal substrate, wherein the other main surface of the single crystal substrate is phosphorized at a temperature of 150 to 450 ° C. A method of manufacturing a semiconductor device, wherein the through-hole is formed by selectively etching using an etching solution containing acid or phosphoric acid and sulfuric acid as main components. 10. The method according to claim 10, wherein the other main surface of the single crystal substrate has
First thin film made of Cr, Ti or Ni and P on it
An etching mask made of a second thin film made of t, Pd or Au is formed, and the other main surface of the single crystal substrate is etched using the etching mask to form the through hole. The method for manufacturing a semiconductor device according to claim 9, wherein: 11. The single crystal substrate according to claim 9, wherein the other main surface of the single crystal substrate is immersed in the etching solution to etch the other main surface of the single crystal substrate. A method for manufacturing a semiconductor device. 12. The method according to claim 9, wherein the single crystal substrate is a sapphire substrate, a spinel substrate, a perovskite-based yttrium aluminate substrate, or a SiC substrate. 13. A single crystal substrate made of a material different from a nitride III-V compound semiconductor, and an element using a nitride III-V compound semiconductor on one main surface of the single crystal substrate. A method of manufacturing a semiconductor device, wherein electrical connection to the element is performed through a through hole provided in the single crystal substrate, wherein the other main surface of the single crystal substrate has a laser beam having a wavelength of 6 μm or more. Forming a hole having a depth of 10 μm or more that does not reach the one main surface by selectively irradiating the other main surface of the single crystal substrate with phosphoric acid or a temperature of 150 to 450 ° C. Forming the through hole by etching using an etching solution containing phosphoric acid and sulfuric acid as main components, so that the hole reaches the one main surface. One . 14. The method according to claim 13, wherein a pulse laser beam having a wavelength of 10.6 μm by a CO ₂ laser is used as the laser beam. 15. The method according to claim 13, wherein the single crystal substrate is a sapphire substrate, a spinel substrate, a perovskite-based yttrium aluminate substrate, or a SiC substrate.