JPH1140911A - Printed board - Google Patents

Printed board

Info

Publication number
JPH1140911A
JPH1140911A JP9192860A JP19286097A JPH1140911A JP H1140911 A JPH1140911 A JP H1140911A JP 9192860 A JP9192860 A JP 9192860A JP 19286097 A JP19286097 A JP 19286097A JP H1140911 A JPH1140911 A JP H1140911A
Authority
JP
Japan
Prior art keywords
hole
insulating substrate
land
lands
holes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP9192860A
Other languages
Japanese (ja)
Inventor
Yasuharu Kudo
康晴 工藤
Kazuhiko Watanabe
一彦 渡辺
Toshiro Furuta
敏朗 古田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alps Alpine Co Ltd
Original Assignee
Alps Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alps Electric Co Ltd filed Critical Alps Electric Co Ltd
Priority to JP9192860A priority Critical patent/JPH1140911A/en
Priority to DE19832052A priority patent/DE19832052A1/en
Publication of JPH1140911A publication Critical patent/JPH1140911A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/111Pads for surface mounting, e.g. lay-out
    • H05K1/112Pads for surface mounting, e.g. lay-out directly combined with via connections
    • H05K1/113Via provided in pad; Pad over filled via
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4061Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in inorganic insulating substrates
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092Dispersed materials, e.g. conductive pastes or inks
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0388Other aspects of conductors
    • H05K2201/0394Conductor crossing over a hole in the substrate or a gap between two separate substrate parts
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09818Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09981Metallised walls
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10636Leadless chip, e.g. chip capacitor or resistor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/1147Sealing or impregnating, e.g. of pores
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

PROBLEM TO BE SOLVED: To avoid flowing solder flow away via through-holes and to increase the solder zones of electrodes to lands, thereby surely soldering them by forming blinding in the through-holes and blocking them. SOLUTION: Through-holes 2 of about 0.2 mm diameter are formed in an insulation board 1, a first and a second conductive patterns 3, 4 for electric writings are formed on both sides thereof. Blindings 7 for blocking the through- holes 2 are provided in the through-holes 2 near the one side of the board 1 having lands 5, and electrodes 9 of electric components 8 are mounted on the lands 5 near the through-holes 2 and soldered to the lands 5, where the in-flow of solder 10 becomes smaller in the through-holes so as to increase the solder zones of the electrodes 9 to the lands 5, thus surely soldering them.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明はチューナ等の電子機
器に使用され、特に、高密度実装に適用して好適なプリ
ント基板に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed circuit board which is used for electronic equipment such as a tuner, and is particularly suitable for high-density mounting.

【0002】[0002]

【従来の技術】従来の電子機器に使用されるプリント基
板は、図3に示すように、絶縁基板20にスルーホール
21を設けると共に、絶縁基板20の両面には電気配線
用の導電パターン22、23が形成されている。また、
絶縁基板20の一方の面には、導電パターン22と接続
されたランド24が形成されると共に、スルーホール2
1の周面には接続導体25を設けて、ランド24と絶縁
基板20の他面に設けた導電パターン23とを接続した
構成となっている。更に、前記ランド24を除く導電パ
ターン22、23と絶縁基板20上に、絶縁体から成る
レジスト膜26が形成されると共に、このレジスト膜2
6の一部26aは、絶縁基板20の他面側で、前記スル
ーホール21の一部を塞いだ構成となっている。
2. Description of the Related Art As shown in FIG. 3, a printed circuit board used in a conventional electronic device has a through hole 21 formed on an insulating substrate 20 and conductive patterns 22 for electric wiring on both surfaces of the insulating substrate 20. 23 are formed. Also,
On one surface of the insulating substrate 20, a land 24 connected to the conductive pattern 22 is formed, and a through hole 2 is formed.
A connection conductor 25 is provided on the peripheral surface of the substrate 1, and the land 24 is connected to the conductive pattern 23 provided on the other surface of the insulating substrate 20. Further, a resist film 26 made of an insulator is formed on the conductive patterns 22 and 23 excluding the lands 24 and on the insulating substrate 20.
A part 26 a of the sixth part 6 has a configuration in which a part of the through hole 21 is closed on the other surface side of the insulating substrate 20.

【0003】そして、チップ部品等から成る電気部品2
7の電極部28を、スルーホール21の近傍のランド2
4上に載置し、このランド24と電極部28とを半田2
9付けして接続するようになっている。このように、電
気部品27をスルーホール21の近傍で半田29付けす
ることにより、プリント基板の小型化を図っているが、
この時、半田29は、スルーホール21内に多く流れ込
み、電極部28近傍での半田29の量が少なくなる。ま
た、スルーホール21内に流れ込んだ半田29は、絶縁
基板20の他面側に形成されたレジスト膜26の一部2
6aで、外部への流出が阻止されている。
[0003] An electric component 2 comprising a chip component or the like.
7 is connected to the land 2 near the through hole 21.
4 and the lands 24 and the electrode portions 28 are
9 for connection. As described above, the electric component 27 is soldered in the vicinity of the through hole 21 to reduce the size of the printed circuit board.
At this time, a large amount of the solder 29 flows into the through-hole 21 and the amount of the solder 29 near the electrode portion 28 decreases. The solder 29 flowing into the through-hole 21 is part of the resist film 26 formed on the other surface of the insulating substrate 20.
At 6a, outflow to the outside is prevented.

【0004】[0004]

【発明が解決しようとする課題】従来のプリント基板
は、絶縁基板20の他面側に、スルーホール21の一部
を塞ぐレジスト膜26を設けたものであるため、レジス
ト膜26を必要とし、生産性が悪く、コスト高に成ると
いう問題がある。また、スルーホール21への半田29
の流れ込みが多く、電極部28近傍での半田29の量が
少なくなり、半田付け不良を起こすという問題があっ
た。
The conventional printed circuit board is provided with a resist film 26 for covering a part of the through hole 21 on the other surface side of the insulating substrate 20, so that the resist film 26 is required. There is a problem that productivity is low and costs increase. Also, solder 29 to through hole 21
And the amount of the solder 29 in the vicinity of the electrode portion 28 is reduced, resulting in a problem of poor soldering.

【0005】[0005]

【課題を解決するための手段】上記課題を解決するため
の第1の解決手段として、絶縁基板に設けられたスルー
ホールと、前記絶縁基板の両面に形成された第1と第2
導電パターンと、前記スルーホールの近傍で前記絶縁基
板の少なくとも一方の面に形成されたランドと、前記ス
ルーホールの周面に形成され、前記ランドと前記絶縁基
板の他方の面に形成された第2導電パターンとを接続す
る接続導体と、前記スルーホール上、或いはスルーホー
ルの近傍に位置する前記ランド上に載置されて前記ラン
ドに半田付けされた電気部品とを備え、前記ランドと前
記接続導体が銀を主成分とする同一の導体で構成され、
該導体で前記スルーホールを塞ぐ目詰まり部を設けた構
成とした。更に、第2の解決手段として、前記目詰まり
部を、前記絶縁基板の他面よりも前記ランドを形成した
前記絶縁基板の一方の面に近い位置に設けた構成とし
た。
As a first means for solving the above problems, there are provided a through hole provided in an insulating substrate and first and second holes formed on both surfaces of the insulating substrate.
A conductive pattern, a land formed on at least one surface of the insulating substrate in the vicinity of the through hole, and a land formed on a peripheral surface of the through hole and formed on the other surface of the land and the insulating substrate. A connection conductor for connecting the two conductive patterns, and an electric component mounted on the land located on the through hole or in the vicinity of the through hole and soldered to the land. The conductor is composed of the same conductor whose main component is silver,
The conductor was provided with a clogging portion for closing the through hole. Further, as a second solution, the clogging portion is provided at a position closer to one surface of the insulating substrate on which the lands are formed than the other surface of the insulating substrate.

【0006】[0006]

【発明の実施の形態】本発明のプリント基板を図1、図
2に基づいて説明すると、図1は本発明のプリント基板
の要部の拡大断面図、図2は本発明のプリント基板の他
の実施形態を示す要部の拡大断面図である。そして、本
発明のプリント基板は、図1、図2に示すように、セラ
ミックから成る絶縁基板1には、直径が約0.2mm程
度の複数個のスルーホール2が形成されると共に、絶縁
基板1の両面には、電気配線用の第1、第2導電パター
ン3、4が形成されている。
DESCRIPTION OF THE PREFERRED EMBODIMENTS A printed board according to the present invention will be described with reference to FIGS. 1 and 2. FIG. 1 is an enlarged sectional view of a main part of the printed board according to the present invention, and FIG. It is an expanded sectional view of an important section showing an embodiment. As shown in FIGS. 1 and 2, the printed board of the present invention has a plurality of through holes 2 having a diameter of about 0.2 mm formed in an insulating board 1 made of ceramic. First and second conductive patterns 3 and 4 for electric wiring are formed on both surfaces of 1.

【0007】また、前記絶縁基板1の一方の面には、ス
ルーホール2の近傍にランド5が設けられると共に、ス
ルーホール2の周面には接続導体6を形成し、この接続
導体6で、ランド5と絶縁基板1の他面側に設けられた
第2導電パターン4とを接続した構成となっている。更
に、前記スルーホール2の内部には、絶縁基板1の他面
よりもランド5を形成した絶縁基板1の一方の面に近い
位置に、スルーホール2の塞ぐ目詰まり部7を設けた構
成となっている。そして、少なくとも前記ランド5、接
続導体6、及び目詰まり部7は、銀を主成分とする導体
ペーストから成る同一の導体で構成されている。また、
この実施例では、第1、第2導電パターン3、4も銀を
主成分とする導体ペーストから成る導体で形成された状
態を示している。
A land 5 is provided on one surface of the insulating substrate 1 near the through hole 2, and a connection conductor 6 is formed on the peripheral surface of the through hole 2. The configuration is such that the lands 5 are connected to the second conductive patterns 4 provided on the other surface side of the insulating substrate 1. Further, a clogging portion 7 for closing the through hole 2 is provided inside the through hole 2 at a position closer to one surface of the insulating substrate 1 on which the land 5 is formed than the other surface of the insulating substrate 1. Has become. At least the land 5, the connection conductor 6, and the clogged portion 7 are formed of the same conductor made of a conductor paste containing silver as a main component. Also,
This embodiment shows a state in which the first and second conductive patterns 3 and 4 are also formed of a conductor made of a conductive paste containing silver as a main component.

【0008】また、抵抗、コンデンサー等のチップ部品
から成る電気部品8には、電極部9を設け、この電極部
9がスルーホール2上、或いはスルーホース2の近傍で
ランド5上に載置され、電極部9とランド5とが半田1
0付けによって、電気部品8が接続、固定された状態と
なっている。そして、この半田10付け部は、図1から
分かるように、目詰まり部7によってスルーホール2内
への半田10の流れ込みが少なくなり、電極部9とラン
ド5との半田10付け量を多くして、確実な半田付けを
行うものである。
[0008] Further, an electrode part 9 is provided on an electric part 8 composed of chip parts such as a resistor and a capacitor, and this electrode part 9 is placed on the land 5 near the through hole 2 or the through hose 2. , Electrode part 9 and land 5 are solder 1
The electrical component 8 is connected and fixed by the attachment of zero. As shown in FIG. 1, the solder 10 attachment portion reduces the flow of the solder 10 into the through hole 2 due to the clogging portion 7, and increases the solder 10 attachment amount between the electrode portion 9 and the land 5. Thus, reliable soldering is performed.

【0009】また、図2は本発明のプリント基板の他の
実施形態を示し、この実施例では、絶縁基板1の一方の
面に形成されたランド5と、第1導電パターン3とを非
接続状態とし、ランド5を独立して形成したもので、そ
の他の構成は前記の実施形態と同様であるので、ここで
は同一部品に同一番号を付し、その詳細な説明は省略す
る。
FIG. 2 shows another embodiment of the printed circuit board according to the present invention. In this embodiment, the land 5 formed on one surface of the insulating substrate 1 and the first conductive pattern 3 are not connected. In this state, the lands 5 are independently formed, and the other configurations are the same as those of the above-described embodiment. Therefore, the same components are denoted by the same reference numerals, and detailed description thereof will be omitted.

【0010】そして、上記プリント基板の製造方法は、
例えば、セラミックの絶縁基板1の他面側に、銀を主成
分とする導体ペーストをスクリーン印刷により第2導電
パターン4を形成し、その後、第1導電パターン3側と
なる他面側から吸引機(図示せず)で吸引して接続導体
6を形成する。そして、次に、この第2導電パターン4
を若干乾燥する。次に、この絶縁基板1の一方の面側
に、同じく銀を主成分とする導体ペーストをスクリーン
印刷により、スルーホール2を塞いだ状態でランド5と
第1導電パターン3とを形成する。この時、スルーホー
ル2上の導体ペーストは、若干多めの状態でスクリーン
印刷をしておく。次に、絶縁基板1の他面側よりスルー
ホール2の導体ペーストを、吸引機(図示せず)で第2
導電パターン4側から弱い力で吸引することにより、ス
ルーホール2周面に接続導体6を形成すると共に、目詰
まり部7を形成する。しかる後、セラミックの絶縁基板
1を炉(図示せず)で焼成すると、上述したようなプリ
ント基板が製造される。そして、クリーム半田により電
気部品8をランド5に仮止めした状態で、これを加熱炉
(図示せず)に通すと、電気部品8がランド5に半田1
0付けされた状態となる。
[0010] The method of manufacturing the printed circuit board is as follows.
For example, a second conductive pattern 4 is formed on the other surface side of the ceramic insulating substrate 1 by screen printing a conductive paste containing silver as a main component, and then the suction device is formed from the other surface side on the first conductive pattern 3 side. The connection conductor 6 is formed by suction using a not-shown (not shown). Then, the second conductive pattern 4
Is slightly dried. Next, a land 5 and a first conductive pattern 3 are formed on one surface side of the insulating substrate 1 by screen printing a conductive paste also containing silver as a main component while the through holes 2 are closed. At this time, the conductor paste on the through hole 2 is screen-printed in a slightly larger state. Next, the conductor paste of the through hole 2 is applied to the second surface of the insulating substrate 1 from the other surface side by a suction machine (not shown).
The connection conductor 6 is formed on the peripheral surface of the through hole 2 and the clogged portion 7 is formed by suctioning the conductive pattern 4 from the conductive pattern 4 side with a weak force. Thereafter, when the ceramic insulating substrate 1 is fired in a furnace (not shown), the printed board as described above is manufactured. When the electric component 8 is temporarily fixed to the land 5 by cream solder and passed through a heating furnace (not shown), the electric component 8 is soldered to the land 5.
It will be in the state of 0.

【0011】[0011]

【発明の効果】本発明のプリント基板は、スルーホール
2の内部に、スルーホール2を塞ぐ目詰まり部7を設け
たため、目詰まり部7によってスルーホール2を通して
半田10が流れ去ることがなくなり、電極部9とランド
5との半田10付け量が多くなって、確実な半田付けを
行うことが出来る。また、ランド5と接続導体6、及び
目詰まり部7を、銀を主成分とする同一の導体で構成さ
れているため、別部品を必要とせず、生産性が良好で、
安価なものが得られる。更に、目詰まり部7を、絶縁基
板1の一面に近い側に形成することによって、スルーホ
ール2内への半田10の流れ込みをより少なくでき、一
層電気部品8の半田付けを確実に出来るものとなる。
According to the printed circuit board of the present invention, since the clogging portion 7 for closing the through hole 2 is provided inside the through hole 2, the solder 10 does not flow through the through hole 2 due to the clogging portion 7. The amount of solder 10 between the electrode portion 9 and the land 5 is increased, so that reliable soldering can be performed. In addition, since the land 5, the connection conductor 6, and the clogged portion 7 are formed of the same conductor containing silver as a main component, no separate parts are required, and the productivity is good.
Inexpensive ones are obtained. Further, by forming the clogging portion 7 on a side near one surface of the insulating substrate 1, the flow of the solder 10 into the through hole 2 can be further reduced, and the soldering of the electric component 8 can be more reliably performed. Become.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明のプリント基板の要部の拡大断面図。FIG. 1 is an enlarged sectional view of a main part of a printed circuit board according to the present invention.

【図2】本発明のプリント基板の他の実施形態を示す要
部の拡大断面図。
FIG. 2 is an enlarged sectional view of a main part showing another embodiment of the printed circuit board of the present invention.

【図3】従来のプリント基板の要部の拡大断面図。FIG. 3 is an enlarged sectional view of a main part of a conventional printed circuit board.

【符号の説明】[Explanation of symbols]

1 絶縁基板 2 スルーホール 3、4 導電パターン 5 ランド 6 接続導体 7 目詰まり部 8 電気部品 9 電極部 10 半田 REFERENCE SIGNS LIST 1 insulating substrate 2 through hole 3, 4 conductive pattern 5 land 6 connection conductor 7 clogged part 8 electric component 9 electrode part 10 solder

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 絶縁基板に設けられたスルーホールと、
前記絶縁基板の両面に形成された第1と第2導電パター
ンと、前記スルーホールの近傍で前記絶縁基板の少なく
とも一方の面に形成されたランドと、前記スルーホール
の周面に形成され、前記ランドと前記絶縁基板の他方の
面に形成された第2導電パターンとを接続する接続導体
と、前記スルーホール上、或いはスルーホールの近傍に
位置する前記ランド上に載置されて前記ランドに半田付
けされた電気部品とを備え、前記ランドと前記接続導体
が銀を主成分とする同一の導体で構成され、該導体で前
記スルーホールを塞ぐ目詰まり部を設けたことを特徴と
するプリント基板。
A through hole provided in an insulating substrate;
First and second conductive patterns formed on both surfaces of the insulating substrate, lands formed on at least one surface of the insulating substrate in the vicinity of the through hole, and formed on a peripheral surface of the through hole; A connection conductor connecting the land and the second conductive pattern formed on the other surface of the insulating substrate; and a solder placed on the land located on the through hole or near the through hole and soldered to the land. A printed circuit board, wherein the land and the connection conductor are made of the same conductor containing silver as a main component, and a clogging portion for closing the through hole is provided by the conductor. .
【請求項2】 前記目詰まり部を、前記絶縁基板の他面
よりも前記ランドを形成した前記絶縁基板の一方の面に
近い位置に設けたことを特徴とする請求項1記載のプリ
ント基板。
2. The printed circuit board according to claim 1, wherein the clogging portion is provided at a position closer to one surface of the insulating substrate on which the lands are formed than the other surface of the insulating substrate.
JP9192860A 1997-07-17 1997-07-17 Printed board Withdrawn JPH1140911A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP9192860A JPH1140911A (en) 1997-07-17 1997-07-17 Printed board
DE19832052A DE19832052A1 (en) 1997-07-17 1998-07-16 Printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9192860A JPH1140911A (en) 1997-07-17 1997-07-17 Printed board

Publications (1)

Publication Number Publication Date
JPH1140911A true JPH1140911A (en) 1999-02-12

Family

ID=16298183

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9192860A Withdrawn JPH1140911A (en) 1997-07-17 1997-07-17 Printed board

Country Status (2)

Country Link
JP (1) JPH1140911A (en)
DE (1) DE19832052A1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ATE446667T1 (en) * 2001-09-07 2009-11-15 Medtronic Minimed Inc METHOD FOR PRODUCING A SUBSTRATE
US7323142B2 (en) 2001-09-07 2008-01-29 Medtronic Minimed, Inc. Sensor substrate and method of fabricating same

Also Published As

Publication number Publication date
DE19832052A1 (en) 1999-02-11

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Effective date: 20041005