JPH11317472A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a small-sized semiconductor device. SOLUTION: In this semiconductor device, protrusions 6 with a predetermined width are formed by laminating a second solder resist layer 5 on a first solder resist 4, immediately below a mold line M on the surface of a BT resin impregnated glass cloth wiring board, etc., of which inner leads are formed. Semiconductor elements 7 are mounted on predetermined positions on the wiring board by wire bonding, and the mounting part is sealed by a mold resin layer. Also, solder bumps are formed on the other side of the wiring board. The semiconductor device is separated using slits preformed along the mold line M on the wiring board. In this structure, resin does not bulge out of the contact surface of the mold during the molding process, which results in no burr, so that a thin and small resin-encapsulated semiconductor device that is provided with satisfactory appearance and characteristics.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly, to a thin and small resin-sealed semiconductor device suitable for portable equipment such as a cellular phone or a video camera, and the semiconductor device. And a method for producing the same.

[0002]

2. Description of the Related Art In recent years, as a semiconductor device which has been made thinner and smaller, a chip size package (C) having an outer shape formed according to the size of a semiconductor element (semiconductor chip) has been developed.
SP) has been developed, and among them, a fine pitch area package in which the pitch between terminals is narrow is promising.

[0003] Thin, fine-pitch area packages are broadly classified into those based on an insulating resin film and those based on a rigid resin-impregnated glass cloth substrate. The use of the latter is being considered.

However, in a CSP using a resin-impregnated glass cloth substrate as a base material, it is difficult to cut the base material near the outline (mold line) of the mold resin layer, and thus the package has an outer shape of the mold resin layer. There was a problem that it became much larger.

[0005] That is, in the manufacture of a CSP, a semiconductor chip is electrically connected by die bonding and wire bonding to a wiring substrate on which a wiring pattern and a hole for conduction are formed in order, and then a die is formed outside the semiconductor chip. To form a resin sealing layer (mold resin layer) by transfer-molding an epoxy resin or the like in a mold. Then, after forming solder bumps and the like as external connection terminals, finally, the wiring board is cut along the mold line.

However, in the step of forming the mold resin layer, the mold resin protrudes from the gap between the contact surface of the mold and the wiring board, and this resin becomes burrs and adheres to the wiring board. Since the length of the burr reaches 0.3 to 1.2 mm and it is difficult to cut the wiring board at the part where the burr is present, the package must be cut at a position more than the length of the burr from the mold line. Has a problem in that the outer shape of the mold resin layer is 0.6 to 2.4 mm larger than that of the mold resin layer.

Further, when the wiring board is cut, it depends on the thickness of the board and the cutting accuracy of the tool, etc., but a large cutting margin (cutting margin) is required. Could not. Further, the wear of the cutting tool is fast, and the management of the tool is not only complicated, but also the cutting failure is apt to occur, so that it has been difficult to reduce the cost.

[0008]

SUMMARY OF THE INVENTION The present invention has been made in order to solve these problems, and it is an object of the present invention to provide a thin, small, and highly reliable semiconductor device sealed with a mold resin layer.
It is an object to provide a method for efficiently manufacturing such a semiconductor device.

[0009]

According to a first aspect of the present invention, there is provided a semiconductor device, comprising: a wiring board having a wiring layer disposed on at least one main surface of a resin-impregnated glass cloth substrate; A semiconductor element mounted and mounted on the main surface, a mold resin layer covering and sealing the outside of the semiconductor element, and a plurality of external connection terminals provided on the other main surface of the wiring board. Immediately below the outline of the mold resin layer, a protrusion made of an insulating resin is formed between the mold resin layer and the wiring board.

A second aspect of the present invention is a method of manufacturing a semiconductor device, comprising the steps of: forming a wiring layer on at least one main surface of a resin-impregnated glass cloth substrate; Forming a protrusion made of an insulating resin on a first region on the substrate, mounting and mounting a semiconductor element on a region inside the first region of the wiring substrate; Forming a mold resin layer on the outside of the semiconductor element by pressing an abutting surface of a mold to the protrusion formed on the semiconductor device, and forming a mold resin layer outside the semiconductor element; Forming external connection terminals on the surface.

According to a third aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of: forming a wiring layer on at least one principal surface of a resin-impregnated glass cloth substrate; Forming a protrusion made of an insulating resin in a first region on the substrate; and performing a punching and cutting process on the first region of the wiring board while leaving a part of the protrusion. Forming a hole;
A step of mounting and mounting a semiconductor element in a region inside the first region of the wiring board, and pressing a contact surface of a molding die against the protrusion left on the wiring board to insulate the semiconductor device; Performing resin molding to form a mold resin layer outside the semiconductor element; forming an external connection terminal on the other main surface of the wiring board; and forming a wiring on which the external connection terminal is formed. Cutting between the slit holes in the substrate to separate the inner molded body.

In the semiconductor device and the method of manufacturing the same according to the present invention, as a resin-impregnated glass cloth substrate, a prepreg obtained by impregnating an insulating resin such as an epoxy resin or a BT resin with a glass cloth is laminated, and heated and pressed. Things are used. The thickness of such an insulating substrate is 0.08 to
Preferably, it is 0.30 mm. The BT resin is an addition polymerization type thermosetting resin containing bismaleimide and triazine as main components, and a substrate impregnated with this resin has excellent heat resistance and insulating properties, and has good workability. is there.

In the present invention, a wiring layer such as an inner lead group or a signal line is formed on at least one main surface of such a resin-impregnated glass cloth substrate, and the wiring layer is placed at a predetermined position on the other side. A hole for conduction for leading to the main surface is formed, and a wiring board is obtained.

Here, the pitch and arrangement of the inner lead group are set in accordance with the pitch and arrangement of the electrode terminals of the semiconductor element to be mounted. The wiring layer including the inner lead group is formed by photo-patterning a conductive metal layer such as a copper foil provided on one or both surfaces of the resin-impregnated glass cloth substrate. In addition, the hole for conduction can be formed by, for example, punching a plurality of wiring boards with a small diameter drill or the like.

In the present invention, by forming a protrusion made of an insulating resin on the wiring substrate immediately below the outer shape line (mold line) of the mold resin layer, the protrusion is formed in the molding resin layer forming step. It is pressed against the contact surface of the mold and comes into close contact therewith, closing the gap between the mold and the wiring board.
As a result, the mold resin does not protrude outside from the contact surface of the mold.

As described above, the protrusion made of the insulating resin formed on the wiring board is in close contact with the contact surface of the mold, and functions to prevent the mold resin from protruding.
It is necessary that the flat portion has a sufficient height and a sufficient size (width) is formed on the upper surface. Since it is difficult to form a projection having a sufficient height and flatness in a single layer, it is preferable in the present invention that the projection be formed by laminating at least two resin layers.

Further, in such a projection in which two or more resin layers are stacked, the lower resin layer may be a protective layer made of an insulating resin formed on the wiring board so as to cover the wiring layer. desirable. As such a protective layer, there is a solder resist having a function of protecting a wiring layer and preventing a short circuit or the like. The solder resist is Ni / Au.
It is generally known that a surface mounting type BGA (ball grid array) type semiconductor package in which external terminals are replaced with solder balls so that plating is not applied is provided to reinforce connection pads.

In the present invention, two or more such solder resist layers are laminated with a predetermined width immediately below the mold line to form a projection projecting in the thickness direction as compared with other regions.

More specifically, one of the solder resist layers
The thickness of the layer is preferably 15 to 40 μm, and the thickness of the protrusion having two or more layers laminated is desirably 30 to 80 μm. In addition, in consideration of the displacement of the mold and the accuracy of the resist pattern, the size of the protrusions formed by laminating two or more layers is such that the widths of the portions inside and outside the mold line are each 100 μm or more. It is desirable to provide such.

As described above, in a structure in which two or more resin layers (solder resist layers) are laminated to form a projection, a projection having a sufficient height is obtained, and a step on the upper surface is formed by the lamination. Absorption and relaxation are achieved, and a projection with high flatness is obtained. That is, the wiring pattern on the insulating substrate has a relatively large thickness of about 18 μm, and it is difficult for a single solder resist layer to absorb a step between the insulating substrate and the wiring pattern. A step remains on the upper surface, but when two solder resist layers are laminated to form a projection, there is almost no step on the upper surface (3 μm
The solder resist layer having a high degree of flatness may be formed of the same material as the solder resist layer formed inside the mold line for protection of the wiring layer and the like, and may be formed by the same coating process. desirable. Furthermore, the lower solder resist layer is a photocurable solder resist layer with good pattern accuracy, and the upper solder resist layer laminated thereon is heat-curable solder resist with good workability such as cutting. It is desirable to form a layer.

In the present invention, as the external connection terminal formed on the other main surface of the wiring board on which the wiring layer and the like are formed, for example, there is a ball-shaped bump mainly composed of a Pb / Sn solder. These are formed in a grid pattern. The formation of such solder bumps is performed by, for example, a method of aligning and mounting a solder ball formed on a bump alignment plate on a wiring layer (connection pad) on the other main surface of the wiring board, and reflowing. Can do it.

In the present invention, the area of the wiring substrate where the protrusions are formed is adjusted to the external dimensions of the semiconductor device to be manufactured, that is, the external shape of the mold resin layer formed in a later step (mold). Line), a slit hole for separation can be formed. The shape of the slit hole is desirably rectangular so as to match the mold line, and is such that a short connecting portion remains at the apexes of the four corners. For example, the slit hole can be formed by punching and cutting with a mold.

In the case where such a slit hole is formed in the wiring board, the inner molded body can be easily separated from the surrounding frame simply by cutting the connecting portion.
In addition, in forming a slit hole in a wiring board, it is not necessary to take a margin length (cut-out margin), and the slit hole can be formed at the position of a mold line. Therefore, miniaturization of a semiconductor device such as a CSP can be achieved. it can. Furthermore, the inner peripheral end face of the slit hole formed by punching and cutting processing,
Since the outer end surface of the wiring substrate is used as it is, a smooth outer end surface can be obtained as compared with a cut surface by a tool or the like.

[0024]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a preferred embodiment of the present invention will be described. Embodiment 1 FIG. 1 is a sectional view showing a first embodiment of the semiconductor device of the present invention.

In this figure, reference numeral 1 indicates an insulating substrate such as a BT resin impregnated glass cloth substrate. A wiring layer 2 such as inner leads 2a and signal lines is provided on one surface of the insulating substrate 1, and a wiring layer 2 is provided on the other surface, and a conductive hole (via hole) 3 is formed at a predetermined position. I have.

A first solder resist layer 4 and a second solder resist layer 5 are provided on a wiring board (0.10 to 0.34 mm thick) provided with such a wiring layer 2 and the like.
(All having a thickness of 15 to 40 μm) are provided in predetermined regions, respectively.
Numeral 5 is laminated immediately below an outline (mold line) M of a mold resin layer to be described later, and a projection 6 is formed. The protrusion 6 has a thickness of 30 to 80 μm, and has a width of 100 μm or more inside and outside the mold line M, respectively.

That is, as the first solder resist layer 4, a layer of PSR-4000 AUS (trade name of Taiyo Ink Manufacturing Co., Ltd.), which is a photocurable solder resist having good pattern accuracy, is formed on both sides of the wiring board. It is formed to cover the required wiring layer 2. Then, on the inner lead 2a forming surface, on the first solder resist layer 4 formed immediately below the mold line M, as a second solder resist layer 5, a thermosetting solder resist having good cutting workability. CCR-232CFW
(Trade name of Asahi Chemical Laboratory Co., Ltd.) are laminated with a width of 200 μm or more from the outer periphery of the substrate.

Further, the semiconductor element 7 is die-bonded face-up to a predetermined position (island portion) on the surface of the wiring board on which the inner leads 2a are formed, and the electrode terminals 7a of the semiconductor element 7 and the inner leads 2a are connected to gold wires. 8 are electrically connected. Then, a mold resin layer 9 made of epoxy resin is provided outside the semiconductor element 7 mounted in this manner, and the connection portion is sealed. Further, a ball-shaped solder bump 10 is provided on the wiring layer 2 (connection pad) on the other surface of the wiring board thus resin-sealed.

The semiconductor device having such a structure is manufactured by the following method. FIGS. 2A to 2F are cross-sectional views showing respective steps of the first embodiment of the method of manufacturing a semiconductor device.

As shown in FIG. 2A, a double-sided copper foil-clad laminate in which copper foil is adhered to both sides of an insulating substrate 1 such as a BT resin-impregnated glass cloth substrate is provided with a predetermined distance along the length direction. After opening the hole for transport and the hole for positioning respectively,
In each of the semiconductor device forming portions, the inner leads 2a are formed by photo-patterning the copper foil on both surfaces.
And a wiring layer 2 such as a signal line. After drilling a hole for conducting between the wiring layers 2 on both sides using a drill or the like, the inner wall surface of the hole is plated with copper to form a via hole 3.

Next, PSR-4000 AUS, which is a first solder resist, is applied to predetermined regions on both surfaces of the wiring board on which the wiring layer 2 and the like are formed and cured, and then, is coated on one surface (the inner leads 2a are formed). Surface), CCR-232CF as a second solder resist having a predetermined width from outside to inside of the mold line formation planned position.
V is applied and cured, and the first
Is formed on the second solder resist layer.

Here, the first solder resist layer and the second solder resist layer
3 (a) and 3 (b) are enlarged views of the schematic configuration of the wiring board after formation with the solder resist layer of FIG. In these figures, illustration of via holes is omitted. In FIG. 3A, reference numeral 11 denotes a region where a protrusion is formed by laminating the first solder resist layer 4 and the second solder resist layer 5, 12 denotes an inner lead disposition portion, and 13 denotes a mold line to be formed. Each position is shown.

Next, as shown in FIG. 2B, the semiconductor element 7 arranged face-up on the island portion of the wiring board was bonded and fixed (die-bonded) using an insulating adhesive such as an epoxy resin. Thereafter, the electrode terminal 7a of the semiconductor element 7 and the inner lead 2a are wire-bonded using the gold wire 8.

Next, outside the connection portion of the semiconductor element 7,
Transfer mold epoxy resin. In the molding step, as shown in FIG. 2C, the contact surface of the mold 14 is pressed against the protrusion 6 formed on the wiring board, and the protrusion 6 is formed in the cavity 14a of the mold 14. The epoxy resin is pressed and cured. Thus, FIG.
As shown in (d), a mold resin layer 9 is formed.

Next, as shown in FIG. 2E, the solder balls are aligned and mounted on the connection pads on the back surface of the wiring board sealed with the mold resin, and the solder bumps are reflowed. Form 10.

Thereafter, the wiring substrate is cut along the mold line M using a normal cutting tool to separate the inner molded body. In this way, as shown in FIG. 2F, a singulated semiconductor device is obtained.

In the first embodiment configured as described above, the protrusions in which the first solder resist layer 4 and the second solder resist layer 5 are laminated on the wiring board immediately below the mold line M are provided. 6 is a predetermined width (mold line M
Are provided with a width of 100 μm or more on the inside and outside, respectively. Therefore, when the contact surface of the mold 14 is pressed against the protrusion 6 in the process of forming the mold resin layer 9, the protrusion 6 The second solder resist layer 5 forming the upper layer is slightly crushed by the pressure and closely contacts the mold contact surface without any gap. As a result, the mold resin press-fitted into the mold 14 does not protrude outside from the gap between the mold contact surfaces, and burrs do not occur.

Therefore, the wiring substrate can be cut at a position very close to the mold line M, and a small-sized chip size package (CSP) having good appearance and characteristics can be obtained.

Next, a second embodiment of the method for manufacturing the semiconductor device shown in FIG. 1 will be described. Embodiment 2 As shown in FIG. 4A, a copper foil is laminated on both sides of an insulating substrate 1 such as a BT resin-impregnated glass cloth substrate, and has a thickness of 0.10 to 0.34 mm on both sides. After a hole for conveyance and a hole for positioning are respectively formed at predetermined intervals along the length direction on the plate, the inner leads 2a are formed by photo-patterning the copper foil on both surfaces in each semiconductor device forming portion. And a wiring layer 2 such as a signal line is formed. Further, after making a hole for conducting between the wiring layers on both sides, the inner wall surface of the hole is plated with copper to form a via hole 3.

Next, a photo-curable solder resist is applied to predetermined regions on both surfaces of the wiring substrate on which the wiring layer 2 and the like are formed and cured, and then a mold line is to be formed on the inner lead 2a forming surface. A thermosetting solder resist was applied at a predetermined width from the outside to the inside of the position and cured, and the second solder resist layer 5 was laminated on the first solder resist layer 4 immediately below the mold line. The projection 6 is formed.

Here, the schematic structure of the wiring board after the formation of the first and second solder resist layers 4 and 5 is shown in FIG.
FIG. 5B and FIG. In these drawings, the same parts as those in FIGS. 3A and 3B are denoted by the same reference numerals, and description thereof will be omitted. Also,
The illustration of the via hole is omitted. In FIG. 5A,
Reference numeral 15 indicates a portion where a slit is to be formed.

Next, as shown in FIG. 4B, the outline (mold line) of the mold resin layer formed in a later step
A slit hole 16 having a width of 0.4 to 1.0 mm, which is left uncut at each of the four corners, is formed on the outside of M by 100 to 200 μm by punching and cutting using a mold.

FIG. 6 shows a schematic shape of the inner lead forming surface of the wiring board thus obtained. In this figure,
Reference numeral 16 denotes a slit hole, 17 denotes a transport hole, 18 denotes a positioning hole, and 19 denotes an island portion for mounting a semiconductor element. Further, a region where a protrusion is formed by laminating the first solder resist layer and the second solder resist layer is denoted by reference numeral 11 as in FIG.

Next, as shown in FIG. 4C, the semiconductor element 7 is disposed face-up on the island portion of the wiring board, and is fixed by bonding with an insulating adhesive. The lead 2a is wire-bonded using the gold wire 8.

Next, as shown in FIG. 4D, an epoxy resin is transfer-molded to the outside of the connection portion of the semiconductor element 7 using a mold 14. In the molding step, a mold 14 is arranged on the wiring board so as to straddle the slit 16, and the contact surface of the mold is pressed against the projection 6 formed on the wiring board. And mold 1
The epoxy resin is pressed into the cavity 14a of No. 4 and cured. Thus, a mold resin layer 9 is formed as shown in FIG. 4E.

Next, as shown in FIG. 4 (f), the solder balls are aligned and mounted on the connection pads on the back surface of the wiring board sealed with the mold resin, and the solder bumps are reflowed. Form 10.

Thereafter, separation is performed using the slit holes 16. That is, the connecting portions of the slit holes 16 formed in the wiring substrate in advance in accordance with the mold line M are cut, and the inner molded body is separated from the outer frame. Thus, a semiconductor device is obtained as shown in FIG.

In the second embodiment configured as described above, the first solder resist layer 4 and the second solder resist layer 5 are laminated on the wiring board immediately below the mold line M, A projection 6 having a predetermined width is formed. In the step of forming the mold resin layer 9, as shown in FIG. 7 in an enlarged manner, the contact surface 14 b of the mold 14 arranged across the slit hole 16 is brought into contact with the projection 6.
When pressed against, the second solder resist layer 5, which is the upper layer of the protrusion 6, is slightly crushed by the pressure, and closely contacts the mold contact surface 14b without any gap. As a result, the molding resin press-fitted into the molding die 14 has the mold contact surface 1.
As shown in FIG. 8, the mold resin layer 9 which does not protrude from the outside and has no burr or the like and has good appearance and characteristics is formed.

In the step of forming the slit hole 16,
Since the punching and cutting of the wiring board is performed for each of the protrusions 6 on which the solder resist layers of the layers are stacked, the slit holes 16 can be formed easily and efficiently. further,
Such protrusions 6 are formed on a first solder resist layer 4 made of a photo-curable solder resist having a good pattern accuracy, and on a second solder resist made of a thermosetting solder resist having high workability such as cutting. Since the solder resist layer 5 has a laminated structure, it is easier to form the slit holes 16 by punching and cutting.

Further, since the slit holes 16 formed in the wiring substrate in advance are used as they are for cutting, the cutting is easy, and the slits 16 are easier to cut than tools and the like.
A smooth outer peripheral end surface is obtained. Further, since the slit holes 16 are formed along the mold line M, and it is not necessary to take a margin length (separation allowance) from this line, it is possible to further reduce the size of a semiconductor device such as a CSP. it can.

Further, since the slit holes 16 and the like are formed at the stage of the wiring board, it is possible to electrically evaluate short-circuit or lack of the wiring layer group before mounting the semiconductor element.
The inspection process can be simplified, and the yield can be improved.

Further, since the cutting work of the wiring board in the final step may be performed by cutting only the connection portion, the process management and the working method are remarkably facilitated, and the cutting work is performed by a precision tool such as a cemented carbide tool. , It is possible to achieve a high yield and achieve a low price. Furthermore, by using a carbide tool, etc., the excess resin flow part formed at the position of the gate and air vent during molding is also
It can be cut at the same time and a high quality CSP can be obtained.

[0053]

As described above, according to the present invention,
Since the molding resin does not protrude outward from the contact surface of the molding die to produce burrs and the like, it is possible to obtain a resin-encapsulated semiconductor device that is thin and small and has good appearance and characteristics. In addition, by performing separation using slit holes, separation work in the final process becomes easy, and
Since there is almost no need to take a margin for separation from the mold line, it is possible to further reduce the size of a semiconductor device such as a CSP.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a first embodiment of a semiconductor device of the present invention.

FIGS. 2 (a), (b), (c), (d), (e),
(F) is a sectional view showing each step of the first example of the method for manufacturing the semiconductor device.

FIGS. 3A and 3B are a plan view and a cross-sectional view taken along line XX ′ showing a schematic configuration of a wiring board after a solder resist layer is formed in the manufacturing method according to the first embodiment.

FIG. 4 shows (a), (b), (c), (d), (e),
(F), (g) is sectional drawing which shows each process of the 2nd Example of the method of manufacturing a semiconductor device.

FIGS. 5A and 5B are a plan view and a YY ′ sectional view showing a schematic configuration of a wiring board after a solder resist layer is formed in the manufacturing method according to the second embodiment.

FIG. 6 is a plan view showing a schematic shape of a wiring board (an inner lead forming surface) after a slit hole is formed in the manufacturing method of the second embodiment.

FIG. 7 is an enlarged cross-sectional view showing a step of forming a mold resin layer in the second embodiment.

FIG. 8 is a cross-sectional view showing a state where a mold is removed after forming a mold resin layer in the second embodiment.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Insulating substrate 2 ... Wiring layer 3 ... Conducting hole 4 ... Solder resist layer 5 ... Solder resist layer 7 ... Semiconductor element

Claims (12)

[Claims] 1. A semiconductor device, comprising: a wiring substrate having a wiring layer disposed on at least one main surface of a resin-impregnated glass cloth substrate; and a semiconductor element mounted and mounted on the main surface of the wiring substrate. A mold resin layer for covering and sealing the outside of the semiconductor element; and a plurality of external connection terminals provided on the other main surface of the wiring board. A semiconductor device, wherein a protrusion made of an insulating resin is formed between a mold resin layer and the wiring substrate. 2. The semiconductor device according to claim 1, wherein said projection is formed by laminating at least two resin layers. 3. The semiconductor device according to claim 1, further comprising a protective layer made of an insulating resin formed on said wiring board so as to cover said wiring layer, wherein a lower resin layer constituting said projection is said protective layer. 3. The semiconductor device according to claim 2, wherein: 4. The method according to claim 1, wherein the lower resin layer constituting the protrusion is a photo-curable solder resist layer, and the upper resin layer is
4. The semiconductor device according to claim 3, wherein the semiconductor device is a thermosetting solder resist layer. 5. The semiconductor device according to claim 1, wherein the external connection terminals are bumps mainly composed of solder arranged in a grid. 6. A part of an outer peripheral end face of said wiring board is punched and cut along a predetermined outline of said mold resin layer.
2. The inner end face of the slit hole.
13. The semiconductor device according to claim 1. 7. A method for manufacturing a semiconductor device, wherein at least one main surface of a resin-impregnated glass cloth substrate is provided with:
A step of forming a wiring layer; a step of forming a protrusion made of an insulating resin in a first region on the wiring substrate on which the wiring layer is formed; a region inside the first region of the wiring substrate A step of mounting and mounting a semiconductor element, and pressing an abutting surface of a mold on the protrusion formed on the wiring board to perform molding of an insulating resin. A method for manufacturing a semiconductor device, comprising: a step of forming a mold resin layer; and a step of forming an external connection terminal on the other main surface of the wiring substrate. 8. The method according to claim 1, wherein the step of forming the protrusion includes the step of forming a protective layer made of an insulating resin on the wiring layer, and laminating at least two of the protective layers in a first region of the wiring substrate. 8. The method of manufacturing a semiconductor device according to claim 7, further comprising a step of forming a protrusion. 9. A step of forming a projection by laminating two or more layers of the protective layer, the step of forming a photocurable solder resist layer, and the step of forming a thermosetting solder resist on the solder resist layer. 9. The method for manufacturing a semiconductor device according to claim 8, comprising a step of stacking layers. 10. A method for manufacturing a semiconductor device, wherein at least one main surface of a resin-impregnated glass cloth substrate is provided with:
A step of forming a wiring layer; a step of forming a protrusion made of an insulating resin in a first region on the wiring substrate on which the wiring layer is formed; and a step of forming the protrusion in the first region of the wiring substrate. Forming a slit hole by punching and cutting while leaving a part of the portion; a step of mounting and mounting a semiconductor element in a region inside the first region of the wiring board; The contact surface of the mold is pressed against the protrusions left on the substrate to perform molding of the insulating resin,
A step of forming a mold resin layer outside the semiconductor element; a step of forming an external connection terminal on the other main surface of the wiring board; and a step of forming the external connection terminal on the wiring board in which the slit hole is formed. Cutting the gap and separating the inner molded body. 11. The method according to claim 11, wherein the step of forming the protrusion includes the step of forming a protective layer made of an insulating resin on the wiring layer, and the step of forming at least two of the protective layers in a first region of the wiring substrate.
11. The method of manufacturing a semiconductor device according to claim 10, further comprising: stacking layers to form a projection. 12. A step of forming a projection by laminating two or more protective layers, wherein a step of forming a photocurable solder resist layer and a step of forming a thermosetting solder resist on the solder resist layer. 12. The method for manufacturing a semiconductor device according to claim 11, further comprising a step of stacking layers.