JPH1131716A - Manufacture of semiconductor device and semiconductor chip - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent reliability in connection between the electrode pad of a wiring board and the bump electrode of a semiconductor chip from being deteriorated due to voids remaining between the wiring board and the semiconductor chip. SOLUTION: A semiconductor chip 2 in which plural bump electrodes 4 are arranged on the circuit face in an array, extended from the central part to the surrounding part is prepared. Then, sheet-shaped adhesive 5 made of thermosetting resin is adhered to one surface of the wiring board 1. Afterwards, the semiconductor chip 2 is placed through the adhesive 5 on one surface of the wiring board 1 with the circuit face of the semiconductor chip 2 facing the surface of the wiring board. Then, the semiconductor chip 2 is pressed while being heated, and the bump electrode 4 of the semiconductor chip 2 is pressure-welded to an electrode pad 1A of the wiring board 1.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a technique effective when applied to a semiconductor device in which a semiconductor chip is mounted on one surface of a wiring board by a face-down method.

[0002]

2. Description of the Related Art Face-down on one surface of a wiring board
As a mounting technique for mounting a semiconductor chip by a (Face Down) method, a mounting technique for interposing an adhesive between a wiring board and a semiconductor chip has been developed. This mounting technology
First, a semiconductor chip having a plurality of bump electrodes arranged on a circuit forming surface is prepared. Next, a sheet-like adhesive made of, for example, an epoxy-based thermosetting resin is attached to the chip mounting area on one surface of the wiring board. Next, with the circuit forming surface of the semiconductor chip facing one surface of the wiring board,
The semiconductor chip is mounted on the chip mounting area on one surface of the wiring substrate with an adhesive interposed therebetween. Next, the semiconductor chip is pressed while being heated, and the bump electrodes of the semiconductor chip are pressed against the electrode pads of the wiring board. In this step, the adhesive temporarily melts and then hardens. Semiconductor chips are
The adhesive is fixed to the wiring board by the curing of the adhesive. Further, the bump electrodes of the semiconductor chip are electrically and mechanically connected in a state of being pressed against the electrode pads of the wiring board by a compressive force such as a heat shrinkage force and a thermosetting shrinkage force of the adhesive. Thereby, the semiconductor chip is mounted on one surface of the wiring board.

[0003] In the mounting technique for mounting a semiconductor chip in this manner, since a structure is used in which an adhesive is filled between the wiring board and the semiconductor chip, the difference in thermal expansion coefficient between the wiring board and the semiconductor chip is obtained. Thereby, thermal stress concentrated on the bump electrode can be reduced. Further, after the semiconductor chip is mounted on the wiring board, it is not necessary to fill the space between the wiring board and the semiconductor chip with a resin, so that the cost can be reduced. Therefore, this mounting technique manufactures a semiconductor device having a package structure in which a semiconductor chip is mounted on one surface of a wiring board in a face-down manner, and mounts a plurality of semiconductor chips in a face-down manner on one surface of a wiring board. This is effective for manufacturing a semiconductor device having a module structure.

The above-mentioned mounting technology is disclosed in, for example, Japanese Patent Application Laid-Open Nos.
No. 75280.

[0005]

However, the following problems occur in the above-described mounting technology.

[0006] When a semiconductor chip mounted on one surface of a wiring substrate with an adhesive interposed therebetween is pressed, voids (bubble defects) are generated due to entrainment of air in the adhesive. Voids generated in the peripheral portion of the semiconductor chip are pushed out from between the wiring board and the semiconductor chip by the pressure of the semiconductor chip, but voids generated in the central portion of the semiconductor chip are formed in the peripheral portion of the semiconductor chip. It is disturbed by the arranged bump electrodes and is left behind between the wiring board and the semiconductor chip.

For this reason, the moisture contained in the adhesive material accumulates in the voids, and the moisture accumulated in the voids causes corrosion at the connection portions between the electrode pads of the wiring board and the bump electrodes of the semiconductor chip. The connection reliability between the electrode pads and the bump electrodes of the semiconductor chip is reduced.

In addition, moisture accumulated in the voids evaporates and expands due to heat during a temperature cycle test, which is an environmental test of the semiconductor device, and heat during mounting of the semiconductor device on a mounting substrate.
A gap is formed between the electrode pad of the wiring board and the bump electrode of the semiconductor chip, and the connection reliability between the electrode pad of the wiring board and the bump electrode of the semiconductor chip is reduced.

Also, the effect of reducing the thermal stress concentrated on the bump electrode is reduced due to the difference in the coefficient of thermal expansion between the wiring board and the semiconductor chip, so that the bump electrode is deformed or cracked, and the electrode pad of the wiring board and the semiconductor chip are not connected. The connection reliability with the bump electrode is reduced.

An object of the present invention is to provide a technique capable of improving the connection reliability between an electrode pad of a wiring board and a bump electrode of a semiconductor chip.

Another object of the present invention is to achieve the above object,
An object is to provide a highly reliable semiconductor device.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0013]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows.

In the method of manufacturing a semiconductor device, a step of preparing a semiconductor chip having a plurality of bump electrodes arranged in an array extending from a central portion to a peripheral portion on a circuit forming surface; A step of attaching a sheet-like adhesive made of a thermosetting resin, and in a state where the circuit forming surface of the semiconductor chip faces one surface of the wiring board,
Placing the semiconductor chip on one surface of the wiring substrate with the adhesive interposed therebetween, pressing the semiconductor chip while heating, and pressing the bump electrode of the semiconductor chip against the electrode pad of the wiring substrate. And a step of performing.

According to the above-described means, when a semiconductor chip placed on one surface of a wiring board with a connecting member interposed therebetween is pressed, voids generated at the center of the semiconductor chip are removed from the center of the semiconductor chip. Move from the section toward the periphery. At this time, since the bump electrodes are arranged in an array extending from the central portion of the semiconductor chip toward the peripheral portion, voids generated in the central portion of the semiconductor chip are not obstructed by the bump electrodes, and The chip is pushed out from between the wiring substrate and the semiconductor chip by the pressing of the chip. Therefore, no void is left between the wiring board and the semiconductor chip.

As a result, the moisture contained in the adhesive material accumulates in the voids, and the moisture accumulated in the voids can prevent corrosion generated at the connection between the electrode pad of the wiring board and the bump electrode of the semiconductor chip. The connection reliability between the electrode pads of the wiring board and the bump electrodes of the semiconductor chip can be improved.

In addition, moisture accumulated in the voids evaporates and expands due to heat during a temperature cycle test, which is an environmental test of the semiconductor device, and heat during mounting of the semiconductor device on a mounting substrate.
Since a gap generated between the electrode pad of the wiring board and the bump electrode of the semiconductor chip can be prevented, the connection reliability between the electrode pad of the wiring board and the bump electrode of the semiconductor chip can be improved.

Further, the effect of reducing the thermal stress concentrated on the bump electrode can be maintained by the difference in the coefficient of thermal expansion between the wiring board and the semiconductor chip, and the deformation and cracking of the bump electrode can be prevented. The reliability of connection between the chip and the bump electrode can be improved.

Further, since the connection reliability between the electrode pads of the wiring board and the bump electrodes of the semiconductor chip can be improved, the reliability of the semiconductor device can be improved.

[0020]

Embodiments of the present invention will be described below in detail with reference to the drawings. In all the drawings for describing the embodiments of the present invention, components having the same functions are denoted by the same reference numerals, and their repeated description will be omitted.

(Embodiment 1) Embodiment 1 describes an example in which the present invention is applied to a semiconductor device having a package structure in which a semiconductor chip is mounted on one surface of a wiring board by a face-down method.

FIG. 1 is a schematic plan view of a semiconductor device according to Embodiment 1 of the present invention, and FIG. 2 is a schematic sectional view taken along the line AA shown in FIG.

As shown in FIGS. 1 and 2, the semiconductor device of the present embodiment has a package structure in which a semiconductor chip 2 is mounted on one surface of a wiring board 1 in a face-down manner.

The wiring board 1 is composed of, for example, a resin board having a multilayer wiring structure in which resin boards in which glass fibers are impregnated with an epoxy resin or a polyimide resin are stacked in multiple stages and laminated. In this case, the wiring board 1 has 14 to 18
It has a coefficient of thermal expansion of about × 10 to ⁶ [1 / ° C.]. The planar shape of the wiring board 1 of the present embodiment is not limited to this, but is, for example, a square shape.

A plurality of electrode pads 1A are disposed on the chip mounting surface on one surface of the wiring substrate 1. Further, a plurality of electrode pads 1B are arranged on the back surface opposite to the one surface of the wiring board 1. These electrode pads 1A, 1B
Are electrically connected to each other via the internal wiring of the wiring board 1, although not shown in detail.

A plurality of bump electrodes 6 are arranged on the back surface of the wiring board 1. Each of the plurality of bump electrodes 6 is connected to a plurality of electrode pads 1 arranged on the back surface of the wiring board 1.
B is fixed to each surface and electrically and mechanically connected. The bump electrode 6 is formed of, for example, a metal material having a Pb-Sn composition.

The semiconductor chip 2 has a structure mainly composed of, for example, a semiconductor substrate made of single crystal silicon and a wiring layer formed on the semiconductor substrate. The semiconductor chip 2 in this case has a coefficient of thermal expansion of about 3.5 × 10 to ⁶ [1 / ° C.]. The planar shape of the semiconductor chip 2 of the present embodiment is not limited to this, but is, for example, rectangular.

[0028] The semiconductor in the chip 2, for example SRAM as a memory circuit system (S tatic R andom A ccess M em
ory) is on the tower. Although not shown in detail, a plurality of electrode pads 2A are arranged on the circuit formation surface (the lower surface in FIG. 2) of the semiconductor chip 2. Each of the plurality of electrode pads 2A is electrically connected to an element constituting the SRAM.

The semiconductor chip 2 is mounted on the wiring board 1 with its circuit forming surface facing one surface of the wiring board 1.
Is mounted on the chip mounting area on one surface. That is,
The semiconductor chip 2 is mounted on one surface of the wiring board 1 in a face-down manner. In addition, the semiconductor chip 2
Are bonded and fixed to a chip mounting area on one surface of the wiring board 1 with an adhesive 5 interposed therebetween. The adhesive 5 is formed of, for example, an epoxy-based thermosetting resin.

Although not shown in detail, a plurality of bump electrodes 4 are arranged on the circuit forming surface of the semiconductor chip 2. Each of the plurality of bump electrodes 4 is a semiconductor chip 2
Are fixed to the respective surfaces of the plurality of electrode pads 2A arranged on the circuit forming surface of the above, and are electrically and mechanically connected. Further, each of the plurality of bump electrodes 4 is pressed into contact with each of the surfaces of the plurality of electrode pads 1A disposed in the chip mounting area on one surface of the wiring substrate 1, and is electrically and mechanically connected. . The connection between the bump electrode 4 and the electrode pad 1A by pressure contact is performed by a compressive force such as a heat shrinkage force and a thermosetting shrinkage force of the adhesive 5.

The bump electrode 4 has, for example, but is not limited to, a stud bump structure formed by a ball bonding method. The ball bonding method is a method of thermocompression bonding a ball formed at the tip of an Au wire to an electrode pad of a semiconductor chip, and thereafter cutting the Au wire from the ball portion to form a bump electrode.

As shown in FIG. 3 (a schematic plan view of a semiconductor chip showing the arrangement of the bump electrodes), the plurality of bump electrodes 4 extend from the center of the circuit forming surface of the semiconductor chip 2 to the periphery thereof. They are arranged in an array. In the present embodiment, the plurality of bump electrodes 4 are arranged in a single character in an array along the center line in the long side direction of the semiconductor chip 2, although not limited thereto. In addition, a plurality of bump electrodes 4
Are arranged at an equal pitch from the center of the circuit forming surface of the semiconductor chip 2 to the periphery thereof. That is, the plurality of bump electrodes 4 are radially arranged from the center of the circuit forming surface of the semiconductor chip 2 to the periphery thereof.

Next, a method of manufacturing the semiconductor device will be described with reference to FIGS. 4 and 5 (schematic sectional views for explaining the manufacturing method).

First, the semiconductor chip 2 shown in FIG. 3 is prepared.

Next, as shown in FIG. 4, a sheet-like adhesive material 5 made of, for example, an epoxy-based thermosetting resin is attached to the chip mounting area on one surface of the wiring board 1. As the sheet-like adhesive 5, a material that is appropriately cut in accordance with the outer size of the semiconductor chip 2 is used.

Next, the semiconductor chip 2 is mounted on one surface of the wiring board 1 with an adhesive 5 interposed therebetween, with the circuit forming surface of the semiconductor chip 2 facing one surface of the wiring board 1. .

Next, the semiconductor chip 2 is pressed against the wiring board 1 while heating, and the bump electrodes 4 of the semiconductor chip 2 are applied to the electrode pads 1A of the wiring board 1 as shown in FIG.
Pressure contact. In this step, the adhesive 5 temporarily melts and then hardens. The semiconductor chip 2 is bonded and fixed to the wiring board 1 by melting and curing of the adhesive 5, and the bump electrodes 5 of the semiconductor chip 2 are compressed by the compressive force of the adhesive 5 such as the heat shrinking force and the thermosetting shrinking force. Electrically and mechanically in a state of being pressed against. Further, in this step, voids (bubble defects) are generated in the adhesive material 5 due to entrainment of air. The void generated in the peripheral portion of the semiconductor chip 2 is pushed out from between the wiring board 1 and the semiconductor chip 2 to the outside by the pressing of the semiconductor chip 2. On the other hand, the void generated at the center of the semiconductor chip 2 moves from the center of the semiconductor chip 2 toward the periphery. At this time, since the bump electrodes 4 are arranged in an array extending from the center of the semiconductor chip 2 toward the periphery thereof, voids generated at the center of the semiconductor chip 2 are obstructed by the bump electrodes 4 ( Without being hindered, the semiconductor chip 2 is pushed out of the space between the wiring board 1 and the semiconductor chip 2 by the pressing of the semiconductor chip 2. Therefore,
No void is left between the wiring board 1 and the semiconductor chip 2. Through this step, the semiconductor chip 2 is mounted on one surface of the wiring board 1.

Next, the semiconductor device shown in FIGS. 1 and 2 is almost completed by fixing the bump electrodes 6 to the respective surfaces of the plurality of electrode pads 1B arranged on the back surface of the wiring board 1.

Thereafter, the semiconductor device is subjected to a temperature cycle test as an environmental test, and is shipped as a product. The semiconductor device shipped as a product is mounted on one surface of the mounting board 10 and incorporated in an electronic device such as a personal computer as shown in FIG. The mounting of the semiconductor device on the mounting board 10
The heat treatment is performed to melt the bump electrodes 6 and connect the bump electrodes 6 to the electrode pads 10A of the mounting substrate 10.

As described above, according to the present embodiment,
The following effects can be obtained.

In the method of manufacturing a semiconductor device, a step of preparing a semiconductor chip 2 on which a plurality of bump electrodes 4 are arranged in an array extending from a central portion to a peripheral portion on a circuit forming surface; Attaching a sheet-like adhesive material 5 made of a thermosetting resin to one surface;
With the circuit forming surface of the semiconductor chip 2 facing one surface of the wiring board 1, the adhesive 5
Mounting the semiconductor chip 2 with the intermediary of the wiring board 1 and pressing the semiconductor chip 2 while heating.
Of the semiconductor chip 2 on the electrode pad 1A.
And pressing the same.

Accordingly, when the semiconductor chip 2 placed on one surface of the wiring board 1 with the connecting material 5 interposed therebetween is pressed, voids generated at the center of the semiconductor chip 2 are removed. Move from the center to the periphery. At this time, since the bump electrodes 4 are arranged in an array extending from the central portion of the semiconductor chip 2 toward the peripheral portion, voids generated in the central portion of the semiconductor chip 2
The semiconductor chip 2 is pushed out of the space between the wiring board 1 and the semiconductor chip 2 by the pressing of the semiconductor chip 2 without being disturbed (obstructed). Therefore, the wiring board 1 and the semiconductor chip 2
No void is left behind.

As a result, the moisture contained in the adhesive 4 accumulates in the voids, and the moisture accumulated in the voids causes the electrode pads 1 A of the wiring board 1 and the bump electrodes 4 of the semiconductor chip 2.
Can prevent corrosion occurring at the connection portion with the wiring board 1
The connection reliability between the electrode pad 1A and the bump electrode 4 of the semiconductor chip 2 can be improved.

In addition, moisture accumulated in the voids evaporates and expands due to heat during a temperature cycle test, which is an environmental test of the semiconductor device, and heat during mounting of the semiconductor device on the mounting board 10, and the electrode pads of the wiring board 1 are expanded. Since the gap generated between 1A and the bump electrode 4 of the semiconductor chip 2 can be prevented, the connection reliability between the electrode pad 1A of the wiring board 1 and the bump electrode 4 of the semiconductor chip 2 can be improved.

Also, the effect of reducing the thermal stress concentrated on the bump electrode 4 can be maintained by the difference in the coefficient of thermal expansion between the wiring board 1 and the semiconductor chip 2, and the deformation and cracking of the bump electrode 4 can be prevented. The connection reliability between the electrode pad 1A and the bump electrode 4 of the semiconductor chip 2 can be improved.

Further, since the connection reliability between the electrode pads 1A of the wiring board 1 and the bump electrodes 4 of the semiconductor chip 2 can be improved, the reliability of the semiconductor device can be improved.

In this embodiment, an example in which the plurality of bump electrodes 4 are arranged in a single character has been described. However, as shown in FIG. They may be arranged in a single character in an arrangement along the center line in the side direction. Further, as shown in FIG. 7- (B), the semiconductor chips 2 may be arranged in a cross shape from the center of the semiconductor chip 2 toward the periphery thereof. In this case, the number of bump electrodes 4 can be increased. Further, as shown in FIG. 7C, the semiconductor chips 2 may be arranged in an X shape from the center to the periphery of the semiconductor chips 2. In this case, the number of bump electrodes 4 can be further increased. Further, as shown in FIG. 7- (D), the semiconductor chips 2 may be arranged in a U-shape from the center to the periphery thereof. In this case, the number of bump electrodes 4 can be further increased. The semiconductor chip 2 may be arranged in any shape as long as it extends radially from the center of the semiconductor chip 2 toward the periphery thereof.

In this embodiment, an example is described in which a sheet-like adhesive 4 made of an epoxy-based thermosetting resin is used. For example, a large number of conductive particles are mixed in an epoxy-based thermosetting resin. anisotropic conductive film (ACF: A nis
otropic C onductive F ilm) an adhesive may be used consisting of. Alternatively, a liquid adhesive made of a thermosetting resin may be used. In this case, the adhesive is applied to the chip mounting area on one surface of the wiring board 1.

In this embodiment, the example in which the bump electrode 4 is formed by the ball bonding method has been described.
The bump electrodes 4 may be formed by a ball supply method.

(Embodiment 2) Embodiment 2 describes an example in which the present invention is applied to a semiconductor device having a package structure in which a semiconductor chip is mounted on one surface of a wiring board by a face-down method.

FIG. 8 is a schematic plan view of the semiconductor device according to the second embodiment of the present invention, and FIG. 9 is a schematic sectional view taken along the line BB shown in FIG.

As shown in FIGS. 8 and 9, the semiconductor device of the present embodiment has a package structure in which a semiconductor chip 3 is mounted on one surface of a wiring board 1 in a face-down manner.

The wiring board 1 is composed of, for example, a resin board having a multilayer wiring structure in which resin boards in which glass fiber is impregnated with an epoxy resin or a polyimide resin are stacked and laminated in multiple stages. The planar shape of the wiring board 1 of the present embodiment is not limited to this, but is, for example, a square shape. A plurality of electrode pads 1A are arranged on the chip mounting surface on one surface of the wiring substrate 1, and a plurality of electrode pads 1B are arranged on the back surface opposite to the one surface of the wiring substrate 1. A bump electrode 6 is electrically and mechanically connected to each surface of the plurality of electrode pads 1B.

The semiconductor chip 3 has a structure mainly composed of, for example, a semiconductor substrate made of single crystal silicon and a wiring layer formed on the semiconductor substrate. The planar shape of the semiconductor chip 3 of the present embodiment is not limited to this, but is, for example, a square shape.

For example, a logic circuit system is mounted on the semiconductor chip 2. Although not shown in detail, a plurality of electrode pads 3A are arranged on the circuit formation surface (the lower surface in FIG. 2) of the semiconductor chip 3. Each of the plurality of electrode pads 3A is electrically connected to an element constituting a logic circuit system.

The semiconductor chip 3 is mounted on the wiring board 1 with its circuit forming surface facing one surface of the wiring board 1.
Is mounted on the chip mounting area on one surface. Also,
The semiconductor chip 3 is bonded and fixed to a chip mounting area on one surface of the wiring board 1 with an adhesive 5 interposed therebetween. The adhesive 5 is formed of, for example, an epoxy-based thermosetting resin.

Although not shown in detail, a plurality of bump electrodes 4 are arranged on the circuit forming surface of the semiconductor chip 3. Each of the plurality of bump electrodes 4 is a semiconductor chip 3
Are fixed to the respective surfaces of the plurality of electrode pads 3A arranged on the circuit formation surface of the above, and are electrically and mechanically connected. Further, each of the plurality of bump electrodes 4 is pressed into contact with each of the surfaces of the plurality of electrode pads 1A disposed in the chip mounting area on one surface of the wiring substrate 1, and is electrically and mechanically connected. . The connection between the bump electrode 4 and the electrode pad 1A by pressure contact is performed by a compressive force such as a heat shrinkage force and a thermosetting shrinkage force of the adhesive 5. Bump electrode 4
Although not limited to this, is constituted by a stud bump structure formed by, for example, a ball bonding method.

As shown in FIGS. 9 and 10 (schematic plan views of the semiconductor chip showing the arrangement of the bump electrodes), among the plurality of bump electrodes 4, the plurality of bump electrodes 4 A are located near the center of the semiconductor chip 3. Are arranged in a matrix. Further, among the plurality of bump electrodes 4, the plurality of bump electrodes 4 </ b> B are arranged along the outer periphery of the semiconductor chip 3 in the peripheral portion of the semiconductor chip 3. The arrangement pitch 2P of the bump electrodes 4B is wider than the arrangement pitch P1 of the bump electrodes 4A. That is, the plurality of bump electrodes 4 are densely arranged near the center of the semiconductor chip 3 and are sparsely arranged around the semiconductor chip 3.

Next, a method of manufacturing the semiconductor device will be described with reference to FIGS. 11 and 12 (schematic sectional views for explaining the manufacturing method).

First, the semiconductor chip 3 shown in FIG. 10 is prepared. A plurality of bump electrodes 4A are arranged in a dense state near the center of the circuit forming surface of the semiconductor chip 3, and a plurality of bump electrodes 4B are arranged in a sparse state in the periphery thereof.

Next, as shown in FIG. 11, a sheet-like adhesive material 5 made of, for example, an epoxy-based thermosetting resin is attached to the chip mounting area on one surface of the wiring board 1. As the sheet-like adhesive 5, a material that is appropriately cut in accordance with the outer size of the semiconductor chip 2 is used.

Next, the semiconductor chip 3 is placed on one surface of the wiring board 1 with an adhesive 5 interposed therebetween, with the circuit forming surface of the semiconductor chip 2 facing one surface of the wiring board 1. .

Next, the semiconductor chip 3 is pressed toward the wiring board 1 while heating, and the bump electrodes 4 of the semiconductor chip 3 are pressed against the electrode pads 1A of the wiring board 1 as shown in FIG. In this step, the adhesive 5 temporarily melts and then hardens. The semiconductor chip 3 is bonded and fixed to the wiring board 1 by melting and curing the adhesive 5, and the bump electrodes 5 of the semiconductor chip 3 are electrically connected to the electrodes of the wiring board 1 by a compressive force such as a heat shrinking force and a thermosetting shrinking force of the adhesive 5. Electrically and mechanically connected in a state of being pressed against the pad 1A. In this step, a void is generated in the adhesive 5 due to the entrainment of air. The void generated in the peripheral portion of the semiconductor chip 3 is pushed out from between the wiring board 1 and the semiconductor chip 2 by the pressing of the semiconductor chip 3. On the other hand, the void generated near the center of the semiconductor chip 3 moves from the vicinity of the center of the semiconductor chip 3 toward the periphery. At this time, since the arrangement pitch of the bump electrodes 4B arranged in the peripheral portion of the semiconductor chip 3 is wide, voids generated near the central portion of the semiconductor chip 2 are obstructed (inhibited) by the bump electrodes 4B. Instead, the semiconductor chip 2 is pushed out of the space between the wiring board 1 and the semiconductor chip 2 by the pressing of the semiconductor chip 2. Therefore,
No void is left between the wiring board 1 and the semiconductor chip 2. Through this step, the semiconductor chip 3 is mounted on one surface of the wiring board 1.

Next, the semiconductor device shown in FIGS. 8 and 9 is almost completed by fixing the bump electrodes 6 on the respective surfaces of the plurality of electrode pads 1B arranged on the back surface of the wiring board 1.

Thereafter, the semiconductor device is subjected to a temperature cycle test as an environmental test, and is shipped as a product. The semiconductor device shipped as a product is mounted on one surface of the mounting board 10 as shown in FIG. 13 (a schematic cross-sectional view of a main part showing a mounting state) and is incorporated in an electronic device such as a personal computer. To mount the semiconductor device on the mounting substrate 10, heat treatment is performed to melt the bump electrodes 6, and
This is performed by connecting the bump electrode 6 to the 0 electrode pad 10A.

As described above, according to the present embodiment, when the semiconductor chip 3 placed on one surface of the wiring board 1 with the connecting material 5 interposed therebetween is pressed in the manufacture of the semiconductor device, Since the arrangement pitch of the bump electrodes 4B arranged on the periphery of the chip 3 is wide, voids generated near the center of the semiconductor chip 3
The semiconductor chip 2 is pushed out of the space between the wiring board 1 and the semiconductor chip 2 by the pressing of the semiconductor chip 2 without being disturbed (obstructed) by B. Therefore, no void is left between the wiring board 1 and the semiconductor chip 2. As a result, the same effects as in the first embodiment can be obtained.

As described above, the invention made by the present inventor is:
Although specifically described based on the embodiment, the present invention
It is needless to say that the present invention is not limited to the above-described embodiment, but can be variously modified without departing from the scope of the invention.

For example, according to the present invention, a plurality of semiconductor chips are mounted on one surface of a wiring board in a face-down manner.
The present invention can be applied to a semiconductor device having a module structure that constitutes one circuit system.

[0069]

The effects obtained by the representative ones of the inventions disclosed in the present application will be briefly described as follows.

According to the present invention, the connection reliability between the electrode pads of the wiring board and the bump electrodes of the semiconductor chip can be improved.

Further, according to the present invention, a highly reliable semiconductor device can be provided.

[Brief description of the drawings]

FIG. 1 is a schematic plan view of a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a schematic cross-sectional view taken along a line AA shown in FIG.

FIG. 3 is a schematic plan view of a semiconductor chip showing an arrangement of bump electrodes.

FIG. 4 is a schematic cross-sectional view for explaining a method for manufacturing the semiconductor device.

FIG. 5 is a schematic cross-sectional view for explaining the method for manufacturing the semiconductor device.

FIG. 6 is a schematic cross-sectional view of a main part in a state where the semiconductor device is mounted on a mounting board.

FIG. 7 is a schematic plan view of a semiconductor chip showing another arrangement example of bump electrodes.

FIG. 8 is a schematic plan view of a semiconductor device according to a second embodiment of the present invention.

9 is a schematic cross-sectional view taken along the line BB shown in FIG.

FIG. 10 is a schematic plan view of a semiconductor chip showing an arrangement of bump electrodes.

FIG. 11 is a schematic cross-sectional view for explaining the method for manufacturing the semiconductor device.

FIG. 12 is a schematic cross-sectional view for explaining the method for manufacturing the semiconductor device.

FIG. 13 is a schematic cross-sectional view of a main part in a state where the semiconductor device is mounted on a mounting board.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Wiring board, 1A, 1B ... electrode pad, 2 ... semiconductor chip, 2A ... electrode pad, 3 ... semiconductor chip, 3A ... electrode pad, 4 ... bump electrode, 5 ... adhesive, 6 ... bump electrode, 10 ... mounting Substrate, 10A ... electrode pad.

Claims (7)

[Claims] A step of preparing a semiconductor chip having a plurality of bump electrodes arranged on a circuit forming surface in an array extending from a central portion to a peripheral portion thereof; and forming a circuit of the semiconductor chip on one surface of a wiring board. A method of manufacturing a semiconductor device, comprising: a step of pressing a semiconductor chip on one surface of the wiring substrate with an adhesive interposed therebetween with the forming surfaces facing each other. 2. A step of preparing a semiconductor chip on which a plurality of bump electrodes are arranged in an array extending from a central portion to a peripheral portion on a circuit forming surface; Attaching a sheet-like adhesive material,
Placing the semiconductor chip on one surface of the wiring substrate with the adhesive interposed therebetween, with the circuit forming surface of the semiconductor chip facing one surface of the wiring substrate;
Pressing the semiconductor chip while heating, and pressing a bump electrode of the semiconductor chip against an electrode pad of the wiring board. 3. The method for manufacturing a semiconductor device according to claim 1, wherein the plurality of bump electrodes are arranged in a single character, a cross, or an X shape. 4. A semiconductor chip in which a plurality of bump electrodes are densely arranged near a central portion of a circuit forming surface and a plurality of bump electrodes are arranged sparsely in a peripheral portion of the circuit forming surface is prepared. And a step of pressing the semiconductor chip with an adhesive interposed on one surface of the wiring board with the circuit forming surface of the semiconductor chip facing one surface of the wiring board. Manufacturing method of a semiconductor device. 5. A semiconductor chip in which a plurality of bump electrodes are densely arranged near a central portion of a circuit forming surface and a plurality of bump electrodes are arranged sparsely in a peripheral portion of the circuit forming surface is prepared. A step of attaching a sheet-like adhesive made of a thermosetting resin to one surface of the wiring board; and forming the circuit board of the semiconductor chip on one surface of the wiring board. Placing the semiconductor chip on one surface with the adhesive interposed therebetween, pressing the semiconductor chip while heating, and pressing a bump electrode of the semiconductor chip against an electrode pad of the wiring board. A method for manufacturing a semiconductor device, comprising: 6. A semiconductor chip, wherein a plurality of bump electrodes are arranged on a circuit forming surface in an array extending from a central portion to a peripheral portion thereof. 7. A plurality of bump electrodes are arranged in a dense state near a central portion of a circuit forming surface, and a plurality of bump electrodes are arranged in a sparse state in a peripheral portion of the circuit forming surface. Semiconductor chip.