JPH11312703A - Solder ball-mounting device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent dead solder balls, by operating the optimum alignment of a plurality of mount heads based on the chip arranging pattern on a water, controlling the up and down movements of a plurality of the mount heads, and mounting solder balls on the chips on the wafer. SOLUTION: The image of the entire body of a wafer 1 on a wafer stage is picked up with an image recognizing camera. The positioning of the wafer 1 and the positions of the good chips and the defective chips 3 in the wafer 1 are confirmed. Then, from the position data of the good chips 2 and the defective chips 3 on the wafer 1, the defective chips 3 on the wafer 1 are skipped. The using pattern of the mount head, which can mount solder balls 16, is operated. Based on the result of the operation, the up and down movements of a plurality of the mount heads are controlled, and the solder balls 16 are mounted on the chips of the wafer 1.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement in an apparatus for mounting a micro solder ball for bonding used on a semiconductor chip, and more particularly, to controlling a plurality of mount heads which can be moved up and down independently to form a wafer. And an apparatus for directly mounting a solder ball on a semiconductor chip.

[0002]

2. Description of the Related Art Conventionally, a plating method, a printing method, and the like have been mainly used for forming bumps in a wafer state. In the case of the plating method or the printing method, bumps are formed on a wafer at one time, so that bumps are formed on all defective chips.

Conventionally, there has also been an apparatus for mounting a solder ball for bonding on a semiconductor chip. However, in the conventional solder ball mounting apparatus, since the semiconductor chip is transported by a frame having a single unit or a plurality of units,
It has a single semiconductor chip alone or a number of mount heads corresponding to the number of semiconductor chips in the transport frame.

However, with the recent spread of the use of solder balls, there has been a demand for improved production, and the need for mounting solder balls directly on chips on a wafer has been increasing. Since many identical or similar chips are arranged on a wafer, there is a possibility that the chips can be mounted on several chips at one time. Mounting these chips one by one is inefficient. For this reason, Patent No. 2657
Attempts have been made to mount, for example, four adjacent chips on a wafer at once, as in the apparatus described in the '356 patent.

However, as shown in FIG. 6, defective chips 3 (chips marked X in FIG. 6) exist on the wafer 1 in addition to the non-defective chips 2, and the method described in Japanese Patent No. 2657356 is used. In this case, the solder balls are also mounted on the defective chips 3, resulting in waste of the solder balls. When the number of defective chips 3 is small as in the wafer shown in FIG. 7, the waste of the solder balls is not a problem in terms of cost.

[0006]

SUMMARY OF THE INVENTION The present invention cancels the mounting of solder balls on defective chips 3 on a wafer 1, prevents waste of solder balls, and simultaneously solders a plurality of chips on a wafer. An object of the present invention is to provide a solder ball mounting device capable of mounting a ball.

[0007]

In order to solve the above-mentioned problems, the present invention has a plurality of mounting heads for mounting a solder ball which can be lifted and lowered independently, and has a chip arrangement pattern on a wafer or a chip arrangement pattern. Provided is a solder ball mounting device that calculates an optimal arrangement of the plurality of mount heads based on non-defective chip position data, controls elevation of the plurality of mount heads based on the calculation result, and mounts solder balls on chips on a wafer. I do.

[0008]

Embodiments of the present invention will be described below with reference to the illustrated embodiments. FIG. 1 is a schematic plan view showing an embodiment of a solder ball mounting device according to the present invention. The solder ball mounting device includes a mounting unit 4 having a plurality of mounting heads that move up and down independently, a ball supply unit 5, and a ball. Suction confirmation unit 6, ball discharge box 7, wafer stage 8, wafer magazines 9, 1
0, drive devices 11, 12, and 13 for driving the mount head and the mount unit.

First, the operation of the solder ball mounting device will be described. First, the mounting unit 4 is moved above the ball supply unit 5 by the driving device 11 and descends, and the soldering is performed by suction holes formed in the lower surface of the mounting head. Ball 16
To adsorb.

Next, the mount unit 4 moves to the ball suction confirming unit 6 to check for the leakage of the solder balls 16 and the extra suction of the solder balls 16. If there is a suction leak, the process returns to the ball supply unit 5 again to perform the suction operation. If there is an excess, it moves to the ball discharge box 7 and discharges it.

Thereafter, the mount head moves to the wafer stage 8 shown in FIG. On the wafer stage 8, the wafer 1 is positioned in advance and is on standby. The wafer 1 is taken out of the wafer magazine 9 in which the unmounted wafer 1 is stored, and is coated with a flux by a flux supply device (not shown).
Supplied to.

An image of the entire wafer 1 is captured on the wafer stage 8 by an image recognition camera (not shown), and the positioning of the wafer 1 and the positions of the non-defective chips 2 and the defective chips 3 in the wafer 1 are confirmed. At this time, defective product 3
The position data of (1) can be used by transmitting the position data of the defective chip 3 recognized in the wafer inspection in the previous process without using an image recognition camera.

Based on the position data of the non-defective chips 2 and the defective chips 3 on the wafer 1, a defective head chip 3 on the wafer 1 is skipped, and a use pattern of a mount head capable of efficiently mounting the solder balls 16 is calculated.

The mount unit 4 includes a wafer stage 8
The solder balls 16 are mounted on the wafer 1 which is moved upward and is on standby from the mount head. The movement between chips to be mounted on the wafer 1, that is, movement on a plane (movement to the X axis, Y axis, and θ axis) is performed by the wafer stage 8.
Is performed on the XY table 17 and the rotary table 18.

Wafer 1 on which solder balls 16 are mounted
Is moved to and stored in a wafer magazine 10 for storing the mounted wafer 1.

The first feature of the present invention is that it has a plurality of mount heads which can move up and down independently. The mount head has solder ball suction holes arranged on the lower surface. When referring to a plurality of mount heads that move up and down independently, it is conceivable that the arrangement pattern of the solder ball suction holes is the same or different.

The mount unit 4 shown in FIG. 2 has two mount heads 14 and 15 having different arrangement patterns of solder ball suction holes, and carries and mounts only one chip of solder ball. A single chip head 14 and a plurality of heads 14 in the embodiment shown in FIG.
A multi-chip head 15 capable of transporting and mounting solder balls for a number of chips is prepared.

The single-chip head 14 and the multi-chip head 15 can be independently raised and lowered by separate lifting devices 12 and 13, respectively. The suction of the solder balls 16 is performed by a separate vacuum suction device (not shown). This operation is sequentially performed by two mount heads, that is, a single-chip head 14 and a multi-chip head 15.

Focusing on the arrangement pattern of the solder ball suction holes of the mount heads 14 and 15 in FIG. 2, the multi-chip head 15 has four arrangement patterns of the single-chip head 14. When a part of the arrangement pattern of the multi-chip head 15 is extracted and observed, it has the same arrangement pattern as that of the single-chip head 14, but moves up and down as the multi-chip head 15. Are not independently raised and lowered, so it can be said that the arrangement pattern of the solder ball suction holes is different.

In the mount unit 4 shown in FIG. 3, a mount head having the same arrangement pattern of the solder ball suction holes is used. The mount unit 4 shown in FIG. 3 has four mount heads 31, 32, 33, and 34 as schematically shown in FIG.

On the lower surface of one mount head 31, 1
An array pattern of solder ball suction holes that can carry and mount only solder balls for the individual chips is formed. Solder ball suction holes having the same arrangement pattern are also formed on the lower surfaces of the other mount heads 32, 33, and. Individual mount heads 31, 32, 33, 34
Is the same as the solder ball suction hole arrangement pattern of the single-chip head 14 in FIG.

The mount unit 4 has a head holding portion 30 which can be moved up and down by one driving device. The head holding portion 30 has four mounting heads 31,
32, 33 and 34 are attached. Each of the mount heads 31, 32, 33, and 34 is provided with an air cylinder 20 for ascending and descending independently of the mount unit 4. Incidentally, reference numeral 2 in FIG.
1 is a vacuum suction device (not shown) and a mount head 3
1 and 32, each connecting head 3
1, 32, 33, and 34 are separately connected.

A second feature of the present invention is that the control means calculates an optimum arrangement of the plurality of mount heads based on a chip arrangement pattern on a wafer or the chip arrangement pattern and defective chip position data, The lifting and lowering of the plurality of mount heads is controlled based on the calculation result to mount the solder balls on the chips on the wafer.

The control means is a mount head 1 shown in FIG.
When using the mount heads 4 and 15 and when using the mount head shown in FIGS.

In the first control example, the single-chip head 1 is mounted after mounting with the multi-chip head 15 shown in FIG.
4, and the description will be given with reference to FIG. 11 showing the first control example. The solder ball mounting device is started, and the position data of the defective chip 3 on the wafer is fetched.

Next, the defective chip 3 on the wafer 1 is skipped and the optimum ball mounting order is calculated.
FIG. 8 shows an optimal arrangement when the mount heads 14 and 15 of FIG. 2 are used. In FIG. 8, one unit divided by a line that traverses the inside of the wafer 1 vertically and horizontally is a chip.
Is the position of the defective chip 3 and the other part is the non-defective chip 2 on which the solder ball should be mounted.

In the non-defective chip 2, four rectangular portions connecting four adjacent ones are portions indicating positions at which all four can be mounted at a time, and a portion indicated by a circle is a fractional portion. The portions indicated by rectangles are mounted by the multi-chip head 15, and the portions indicated by ○ are positions mounted by the single-chip head 14.

At this time, the number of mounts by the multi-chip head 15 is substituted into a variable M, and the number of mounts by the single-chip head 14 is substituted into a variable S. Here, the ball mounting operation starts, and first, the multi-chip head 1
5 is performed.

In one mounting operation of the multi-chip head 15, M = M-1 is calculated, and it is checked whether M = 0. Unless M = 0, ball mounting by the multi-chip head 15 is performed. When the number of times assigned to the variable M ends and M = 0 holds,
The operation shifts to ball mounting using the single-chip head 14.

Here, S = S-1 is calculated for each mounting of the single-chip head 14, and it is checked whether S = 0 or not. If S = 0, the ball mounting by the single-chip head 14 is performed. Is performed. When S = 0 is satisfied, the mounting operation ends.

The second control example is a case where mounting is performed by simultaneously using the multi-chip head 15 and the single-chip head 14 shown in FIG.
A control example will be described. The process from the start to fetching the position data of the defective chip 3 on the wafer 1, skipping the defective chip 3 and calculating the optimum ball mounting order, and starting the ball mounting operation is the same as in the first control example. is there.

In the ball mounting operation, first, after the ball mounting by the first multi-chip head 15 is completed, the calculation of M = M−1 is performed, and then the ball mounting by the single-chip head 14 is performed. S
= S-1 is calculated. At this time, whether M = 0 or not, S = 0
The multi-chip head 15 and the single-chip head 1 are again checked if they are NO.
The ball mounting at 4 is performed. Note that the calculation of M = M-1 and S = S-1 is performed for each mount.

When ball mounting is performed several times by both mounting heads 14 and 15 and M = 0 is established and S = 0 is not established, the single chip head 14 is maintained until S = 0 is established. Ball mounting is performed. Thereafter, when S = 0 is established, the mounting ends.

In the above example, when the number of mountings on the single-chip head 14 is larger than the number of mountings on the multi-chip head 15, on the contrary, when the number of mountings on the multi-chip head 15 is larger, After several mounts, M = 0 does not hold and S = 0 holds,
Until M = 0, the multi-chip head 15 is used.
Only when ball mounting is performed, and when M = 0 holds, the mounting ends.

When the number of times of mounting with the single-chip head 14 and the number of times of mounting with the multi-chip head 15 are the same, mounting with the multi-chip head 15 and mounting with the single-chip head 14 were performed alternately. Thereafter, when M = 0 and S = 0 are established, the ball mounting ends. In any case, when both M = 0 and S = 0 are established, the ball mounting ends.

In the first control example and the second control example, the mounting in the case where a number of defective chips 3 exist in the mount heads 14 and 15 in FIG.
In the case where the number of defective chips 3 (parts indicated by the symbol x in FIG. 7) is small, such as the wafer 1 shown in FIG. Without taking in, the optimal arrangement is calculated based only on the chip arrangement pattern as shown in FIG.
Can be ball mounted.

A third control example will be described with reference to FIG. The third control example is the mount head 3 shown in FIGS.
In the case of mounting at 1, 32, 33 and 34, the position data of defective chips 3 on the wafer 1 is taken in after the start of the solder ball mounting device.

Next, the defective chip 3 on the wafer 1 is skipped and an optimum ball mounting order is calculated. FIG. 10 is a diagram showing an example of the calculated optimal array.
The number of position data that can be mounted using all of the mount heads is substituted for the variable F (for convenience, this is referred to as the number of mounts of four heads).

Next, the number of position data that can be mounted using three of the four mount heads, for example, excluding the lower right mount head 32 in FIG. 4, is substituted into a variable T1 (for convenience). , Which is referred to as the number of mounts of the three-shaped head).

The number of position data mountable by using three mount heads, for example, excluding the mount head 34 at the upper left in FIG.
(For convenience, it is referred to as the number of mounts of the inverted three-cavity head).

The number of position data that can be mounted by using two mount heads excluding the two upper and lower or left and right mount heads among the four mount heads is substituted into a variable D (for convenience, This is referred to as the number of mounts of the two-piece head).

The number of position data that can be mounted using one mount head among the four mount heads is substituted into a variable S (for convenience, referred to as the number of single head mounts).

Here, the ball mounting operation starts, and first, ball mounting is performed by a four-piece head. In FIG. 10, a square connecting four adjacent chips is a ball mounting position by a four-piece head. In one mount operation, F = F−1 is calculated, and it is checked whether F = 0. Unless F = 0, ball mounting is performed by a four-piece head. When the number of times assigned to the variable F is completed and F = 0 is satisfied, the process shifts to ball mounting using a three-shaped U-shaped head.

As shown in FIG. 3, one mount head 3
The air cylinder 20, which is the second lifting device, is operated, and one mount head 32 is retracted upward. This retreat operation is to avoid the interference between the solder balls already mounted on the wafer and the mount head 32 when mounting with the three-letter-shaped head.

In FIG. 10, the figure for connecting the three chips adjacent to the figure is the ball mounting position by the three-piece taking head. In the ball mounting using the three-letter head, the calculation of T1 = T1-1 is performed by one mounting operation. It is checked whether T1 = 0 or not. If T1 = 0 is not satisfied, ball mounting is performed by the three-letter head. Variable T1
Is completed, and when T1 = 0 holds,
The process shifts to ball mounting using a three-sided head.

In FIG. 10, 3
The inverted figure connecting the chips is the ball mounting position by the inverted three-head. Inverted character 3
In the ball mounting using the individual picking head, in one mounting operation, T2 = T2-1 is calculated, and whether or not T2 = 0 is checked. If T2 = 0 is not set, three inverted characters are picked. Ball mounting is performed by the head. When the number of times assigned to the variable T2 ends and T2 = 0 holds, the process shifts to ball mounting using a two-piece head.
It should be noted that mounting with the inverted three-piece head can also be performed by rotating the Θ-axis of the rotary table 18 of the wafer stage 8 by 180 degrees, and using the inverted three-piece head.

In FIG. 10, a bar-shaped figure connecting two horizontally or vertically adjacent chips is a ball mounting position by a two-piece head. In the ball mounting using two heads, D = D-1 is calculated by one mounting operation. It is checked whether D = 0 or not, and D =
While it is not 0, ball mounting by the two-piece head is performed. When the number of times assigned to the variable D is completed and D = 0 holds, the process shifts to ball mounting with a single head.

In FIG. 10, a circle represents a ball mounting position by a single head. In a single-head ball mounting, S = S−
The calculation of 1 is performed, and it is checked whether S = 0 or not,
Unless S = 0, ball mounting by a single head is performed. The number of times assigned to the variable S ends, and S = 0
When is established, the bowl mounting ends.

In this embodiment, the mount head 3
The movement of 1, 32, 33, 34 is performed integrally with the movement of the mount unit 4 by the driving device. First, the mounting unit 4 moves the driving device 1
1 and is lowered by the driving device of the mount unit 4 to suck the solder balls 16 through the suction holes formed in the lower surfaces of the mount heads 31, 32, 33 and 34.

The four mount heads 31, 32, 33,
In the case where the solder balls are attracted to all of the parts 34, it is only necessary to raise and lower the mount unit 4 as described above. When the solder balls are sucked only by the three mount heads 31, 33, and 34, the air cylinder 20 of the mount head 32 that does not suck the solder balls operates as shown in FIG. With only the head 32 positioned upward, and then only the mount head 32 disconnected from the vacuum suction device, the mount unit 4 is lowered for suction of solder balls, and the three mount heads 31, 33, and 34 are moved downward. It absorbs solder balls. The suction of the solder balls 16 is performed by a vacuum suction device (not shown) provided separately. Reference numeral 21 in FIG.
It is a connecting pipe for connecting the mount heads 31, 32 and the vacuum suction device.

In the third control example, the mounting operation is performed by attracting solder balls only to the mount heads necessary for ball mounting with the mount heads 31, 32, 33, and 34 shown in FIGS.

However, all the mount heads 31, 32, 33 and 34 are lowered at the time of solder ball suction,
After adsorbing the solder balls, move the mount head at the position where mounting is not necessary to the chip pattern at the time of mounting, retreat it, mount only the necessary part, and then move the remaining unmounted mount head to the fractional chip part A control example is also considered in which the mount head is lowered and mounted, and the mounted head is lifted and retracted for mounting.

The case where the arrangement pattern of the solder ball suction holes is the same has been described on the premise of the mount head shown in FIGS. 3 and 4. However, the use of two single-chip heads 14 shown in FIG. , Multi-chip head 15
It is also conceivable to use two. The former is advantageous when there are many defective chips 3, and the latter is advantageous when there are few defective chips 3.

[0054]

According to the present invention, firstly, since a plurality of mount heads can simultaneously mount solder balls on a plurality of chips on a wafer, the time required for solder ball mounting is reduced. I do.

Second, a plurality of mount heads are individually held so as to be vertically movable, and the plurality of mount heads are raised and lowered based on a chip arrangement pattern on a wafer or a chip arrangement pattern on a wafer and defective chip position data. Control, ball mounting on defective chips is avoided,
Waste of solder balls can be eliminated.

[Brief description of the drawings]

FIG. 1 is a schematic plan view showing an embodiment of a solder ball mounting device.

FIG. 2 is a perspective view showing an example of a multiple mount head.

FIG. 3 is an explanatory sectional view showing another example of the multiple mount head.

FIG. 4 is a perspective view showing an elevating state of the mount head.

FIG. 5 is a perspective view of a wafer stage.

FIG. 6 is an explanatory plan view of a wafer having a high ratio of defective chips;

FIG. 7 is an explanatory plan view of a wafer having a low ratio of defective chips;

FIG. 8 is an explanatory plan view showing a first example of a mount on a wafer.

FIG. 9 is an explanatory plan view showing a second example of a mount on a wafer.

FIG. 10 is an explanatory plan view showing a third example of a mount on a wafer.

FIG. 11 is an explanatory diagram showing a first control example.

FIG. 12 is an explanatory diagram showing a second control example.

FIG. 13 is an explanatory diagram showing a third control example.

[Explanation of symbols]

 1. . . . . . . . . . Wafer 2. . . . . . . . . . Good chip 3. . . . . . . . . . Defective chip 4. . . . . . . . . . Mount unit 5. . . . . . . . . . Ball supply unit 6. . . . . . . . . . 6. Ball suction confirmation unit . . . . . . . . . 7. Ball discharge box . . . . . . . . . Wafer stage 9, 10. . . . . . . Wafer magazine 11, 12, 13. . . Drive device 14. . . . . . . . . Head for single chip 15. . . . . . . . . Multi-chip head 16. . . . . . . . . Solder ball 17. . . . . . . . . XY table 18. . . . . . . . . Rotary table 20. . . . . . . . . Air cylinder 21. . . . . . . . . Connecting pipes 31, 32, 33, 34. . . . Mount head

Claims (1)

[Claims] A plurality of mounting heads for mounting a solder ball which can be lifted and lowered independently; and based on the chip arrangement pattern on the wafer or the chip arrangement pattern and defective chip position data, the plurality of mount heads are optimized. A solder ball mounting device that calculates an array, controls elevation of the plurality of mount heads based on a calculation result, and mounts a solder ball on a chip on a wafer.