JPH11261074A - Semiconductor device and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a contact structure of connecting wirings together for bringing them into good ohmic contact with each other. SOLUTION: A contact 105 electrically connects a gate wiring 104 with a lead-out wiring 113 formed above the gate wiring 104, a contact hole is provided to the contact 105 penetrating through an aluminum film 109, and the lead-out wiring 113 is brought into ohmic contact with a valve metal film 108. By this constitution, a contact structure which is simple and high in reliability can be realized.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technique relating to a wiring connection method for a thin film transistor (hereinafter, referred to as a TFT) using a thin film semiconductor. The present invention is effective for all semiconductor devices using TFTs.

[0002]

2. Description of the Related Art In recent years, a liquid crystal display device in which a semiconductor circuit is constituted by a plurality of TFTs formed on a glass substrate and control of image display is controlled by the circuit has attracted attention. Various structures have been reported for the TFT constituting such a semiconductor device.

[0003] For example, Japanese Patent Application Laid-Open No.
Japanese Patent Publication No. 18 discloses a TFT structure in which a thin film containing aluminum as a main component (also referred to as an aluminum alloy) is used as a gate wiring and the periphery of the gate wiring is protected by an anodic oxide film (alumina film). In this specification, the thin film containing aluminum as a main component also includes a thin film having extremely few impurities such as so-called high-purity aluminum.

In the case of the TFT structure described in the publication,
In order to connect the gate wiring and the lead wiring, a step of etching the alumina film is required. At first, the present applicant used an etchant (a mixed solution of ammonium fluoride and hydrofluoric acid) called buffered hydrofluoric acid when etching the alumina film.

However, buffered hydrofluoric acid has a problem that the selectivity between alumina (typically, Al ₂ O ₃ ) and aluminum is small, so that not only the alumina film but also the gate wiring thereunder are etched. was there. This is shown in FIG.

In FIG. 2, reference numeral 201 denotes a substrate having an insulating surface; 202, an insulating film made of a silicon oxide film (which functions as a gate insulating film on the active layer); 203, a gate wiring made of an aluminum alloy; 203
Is an alumina (anodically oxidized) film obtained by anodizing aluminum.

When a part of the upper surface of the alumina film 204 is etched with buffered hydrofluoric acid, first, the gate wiring 2
03 is exposed. Usually, since the etching is performed with a certain distribution in the substrate surface, it is necessary to completely remove the alumina film 204 by over-etching.

At this time, if the over-etching is too much, the gate wiring 203 is etched by buffered hydrofluoric acid. In the worst case, the etching hole 205 may penetrate the gate wiring 203 and reach the insulating film 202.

In such a state, only the cross section of the gate wiring 203 indicated by 206 (thick line) comes into contact with the extraction wiring (not shown). Considering that the thickness of the gate wiring is several hundred nm, while the diameter of a general contact hole is several microns, in the state shown in FIG. Is reduced to about 1/100.

That is, when the state shown in FIG. 2 is reached, the contact area between the wirings is extremely reduced, and almost no electrical connection is possible. Therefore, the TFT cannot be operated, which causes a malfunction of the circuit itself.

If there is a structure in which an active layer of a TFT exists under the insulating film 202 (for example, a case where a gate electrode and a lead-out wiring are contacted on the TFT),
The extraction wiring and the active layer may be short-circuited.

Therefore, the present applicant has developed a process using a special etchant instead of the above-mentioned buffered hydrofluoric acid. The etchant used by the applicant is phosphoric acid:
This is an etchant in which 550 g of a chromic acid solution (300 g of chromic acid, 250 g of water) is mixed with 10 liters of a mixed solution of nitric acid: acetic acid: water = 85: 5: 5: 5. The applicant has named this chromium mixed acid.

This chromium mixed acid solution has a selectivity that an alumina film as an anodized film is etched, but an aluminum film is not etched. Is possible.

As described above, at present, a contact hole for connecting the gate electrode and the extraction wiring is formed by a special etchant. This method certainly has a high yield and can achieve good ohmic contact.

However, it is necessary to use a large amount of heavy metal chromium which may harm the body.
Processes utilizing chromium mixed acids are not industrially desirable. For such reasons, the development of an alternative etchant to replace chromium mixed acid is urgent, but at present no such etchant has been found.

[0016]

The present applicant has studied the development of a process that does not use chromium mixed acid from the aspect of the TFT structure, in parallel with the development of an etchant replacing chromium mixed acid.

The present invention provides a method for realizing good ohmic contact between a wiring and an electrode having a laminated structure of alumina and aluminum and a wiring electrically connected to the wiring and the electrode without using a chromium mixed acid. Make it an issue.

[0018]

According to the invention disclosed in this specification, a first wiring and a second wiring formed in a layer above the first wiring with an insulating film interposed therebetween are provided. A contact hole for electrically connecting the first wiring and the second wiring, wherein the first wiring comprises aluminum as a main component on a valve metal film. Wherein the second wiring is in contact with the valve metal film through the contact hole formed through the thin film containing aluminum as a main component. Is what you do.

In the above-described structure, the valve metal refers to a metal such that a barrier type anodic oxide film formed as an anode allows a cathode current to flow but does not allow an anode current to flow, that is, a metal exhibiting a valve action. (Electrochemical Handbook, 4th edition; edited by The Electrochemical Society, p.370, Maruzen, 1985).

The valve metal film used in the present invention must have a low etching rate with buffered hydrofluoric acid, that is, it must have hydrofluoric acid resistance. Materials satisfying such requirements are typically tantalum (Ta), niobium (Nb), hafnium (Hf), zirconium (Z
r) and the like.

In particular, it has been confirmed that tantalum can be anodized in the same electrolytic solution as a thin film containing aluminum as a main component, and is suitable for the present invention. It is also possible to use a tantalum alloy such as molybdenum tantalum (MoTa).

When the above configuration is applied to an active matrix type liquid crystal display device, the first wiring corresponds to a gate wiring for supplying a gate signal to a plurality of TFTs.
The second wiring corresponds to a wiring for transmitting a signal from the outside to the gate wiring (referred to as an extraction wiring).

The gist of the present invention resides in that a valve metal film having resistance to hydrofluoric acid is provided under a thin film containing aluminum as a main component.

In this way, even if the thin film containing aluminum as a main component is etched with buffered hydrofluoric acid, the valve metal film functions as an etching stopper, so that further progress of the etching can be prevented.

Further, since good ohmic contact can be made between the valve metal film and the second wiring, it is possible to prevent a contact failure between the first wiring and the second wiring. It is.

As described above, the effect of the present invention is that good ohmic contact with aluminum wiring can be realized without using an etchant such as chromium mixed acid which is difficult to handle industrially due to structural improvement of a semiconductor device. It is.

[0027]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described with reference to FIG. In FIG. 1A, 101 is T
FT active layers 102 and 103 are contact portions (source / drain contact portions) between the active layer 101 and the source or drain electrode, and 104 is a gate wiring. Note that a portion where the gate wiring 104 overlaps with the active layer 101 may be particularly referred to as a gate electrode. Reference numeral 105 denotes a contact portion (gate contact portion) between the gate wiring 104 and a lead-out wiring (not shown). The present invention relates to a technique relating to the structure of the gate contact portion 105.

FIG. 1B is a sectional view taken along the line AA ′ of FIG. In FIG. 1B, reference numeral 106 denotes a substrate having an insulating surface, 107 denotes an insulating film made of silicon oxide, and a laminated structure of a valve metal film 108 and an aluminum film (a thin film mainly containing aluminum) 109 thereon. Is provided.

Here, the thickness of the valve metal film 108 is 5-30.
0 nm (preferably 10-100 nm, more preferably 20-50
nm).

If the film thickness is less than 5 nm, there is a possibility that it will not function effectively as an etching stopper. Also,
When the thickness is 300 nm or more, the total thickness of the gate wiring 104 becomes too large, and the risk of disconnection when another wiring passes over the gate wiring increases, which is not preferable.

The thickness of the valve metal film 108 is set at 10 to 10
If it is set to 0 nm, the end of the valve metal film becomes completely oxide by anodic oxidation. Considering the function of the valve metal film 108 as an etching stopper and the film thickness (including the margin) at which the end is completely oxidized, the valve metal film 1
It can be said that the film thickness of 08 is preferably about 20 to 50 nm.

If the thickness of the valve metal film is set in this way, the gate wiring 104 is finally covered with two different types of anodic oxide films. Specifically, the valve metal film 1
08 is anodized by metal oxide film 110
The alumina film 111 is formed around the aluminum film 109 by anodic oxidation.

The thickness of the valve metal film 108 is 100 nm.
With the above, the valve metal film may remain under the metal oxide film 110, but this does not hinder the effect of the present invention at all.

Then, an interlayer insulating film 112 is provided so as to cover the gate wiring 104, and a contact hole is opened in a portion corresponding to the gate contact portion 105, and a lead wiring 113 is formed.
To form Buffered hydrofluoric acid was used to form the contact holes, and the interlayer insulating film 112, the alumina film 111,
The aluminum film 109 is continuously removed in this order.

At this time, since the valve metal film 108 is not etched with buffered hydrofluoric acid, the valve metal film 1
08 serves as a stopper to stop etching.

After the contact hole is formed, a lead-out wiring 113 made of a metal film is formed, and the valve metal film 108 is formed.
To achieve ohmic contact with Of course, it comes into contact with the aluminum film 109, but comes into contact only with the cross section, so it is considered that it hardly contributes to ohmic contact.

The most significant feature of the present invention is that the contact hole can be formed by using buffered hydrofluoric acid by forming the gate wiring 104 to have a laminated structure of valve metal and aluminum. That is, buffered hydrofluoric acid, which is easy to obtain and manage, can be used without using an etchant that is difficult to handle, such as chromium mixed acid, and is industrially very effective.

By implementing the present invention, the TFT structure also becomes characteristic. The TFT portion of FIG.
FIG. 1C shows a cross-sectional view taken along B ′.

The TFT structure shown in FIG. 1C is disclosed in Japanese Patent Application Laid-Open No. Hei 7-135318 by the present applicant.
Since the structure is almost the same, a detailed description is omitted, but the point different from the publication is that the gate electrode has a laminated structure of the valve metal film 108 and the aluminum film 109.

In this case, the valve metal film 108 also functions as a blocking layer for preventing the component material of the aluminum film 109 from flowing out (diffusion) to the active layer 101 through the gate insulating film 107. Such diffusion of aluminum may be caused by the fluidity of the aluminum alloy due to heat treatment or heat generated by static electricity.However, it is possible to prevent such diffusion by providing a valve metal film under the aluminum film. It is possible.

Reference numerals 114 and 115 denote a source wiring and a drain wiring made of a conductive film, respectively, which are formed of the same material and in the same layer as the extraction wiring 113 shown in FIG. A stacked film of titanium and aluminum may be used for these wirings.

The present invention having the above configuration will be described in detail with reference to the following embodiments.

[0043]

[Embodiment 1] FIG. 3 shows an embodiment of the present invention.
This will be described with reference to FIG. First, a substrate 301 having an insulating surface
A glass substrate provided with an insulating film on the surface is prepared. In addition, a silicon substrate on which a thermal oxide film is formed, a quartz substrate, a ceramic substrate provided with a silicon oxide film, or the like can be used.

Next, an island-shaped semiconductor layer to be an active layer of the TFT is formed on the substrate 301. In this embodiment, Japanese Patent Application Laid-Open No.
The active layer 302 is formed from a polysilicon film formed by the technique described in Japanese Patent No. 30652.

As a method for forming the polysilicon film, any known means such as a method using laser annealing can be used. Alternatively, a silicon germanium film represented by Si _x Ge _1-x (0 <X <1) may be used.

Next, the active layer 302 is covered with an insulating film 303 made of silicon oxide, and a 20 nm tantalum film 304 is formed thereon.
Then, a gate wiring 304 having a laminated structure of a and an aluminum film 304b containing 2 wt% scandium is formed.

Although the gate wiring on the left side and the gate wiring on the right side are separately illustrated in FIG. 3A, they are actually the same as shown in FIG. 1A. The gate wiring 304 on the left side finally overlaps the active layer 302 and functions as a gate electrode of the TFT. Further, the gate wiring 304 on the right side becomes a contact portion for connecting to an external terminal later.

Thus, the state shown in FIG. 3A is obtained. Although not shown, a resist mask used for patterning is left on the gate wiring 304 in this state.

After the state shown in FIG. 3A is obtained, a porous anodic oxide film 305 is formed using the technique described in Japanese Patent Application Laid-Open No. Hei 7-135318.

The porous anodic oxide film 305 is obtained by anodic oxidation in a 3% oxalic acid aqueous solution. Also,
At this time, the tantalum film 304a remains as it is without being subjected to anodic oxidation. The publication may be referred to for details of the anodizing conditions. After the etching of the porous anodic oxide film is completed, the resist mask (not shown) used for patterning the gate wiring is removed.

Then, a dense anodic oxide film 306 is formed by anodizing in a 3% tartaric acid ethylene glycol solution.
Is formed to a thickness of 10 to 30 nm. As for the anodic oxidation conditions, reference may be made to JP-A-7-135318. This dense anodic oxide film 306 is used as the aluminum film 304 in the next step.
b has the effect of protecting it from an etchant. In this specification, the alumina film refers to this dense anodic oxide film.

Next, the insulating film 303 is etched using the gate wiring 304 and the porous anodic oxide film 305 as a mask. The etching is performed by a dry etching method using CHF ₃ gas. After the etching of the insulating film 303 is completed, the porous anodic oxide film 305 is removed.

For removal of the anodic oxide film 305, an etchant mixed at a ratio of phosphoric acid: nitric acid: acetic acid: water = 85: 5: 5: 5 (vol%) is used. I can't get a ratio. However, since the dense anodic oxide film 306 is formed on the surface of the aluminum film 304b in this previous step, it is possible to prevent the aluminum film 304b from being etched.

Next, after the porous anodic oxide film 305 is removed, the dense anodic oxide film 306 is thickened by anodic oxidation again in a 3% tartaric acid ethylene glycol solution, and the thickness of the anodic oxide film 305 is increased to 100 to 150 nm. A thick and dense anodic oxide film 307 is formed.

At this time, the exposed portion of the tantalum film 304a is also completely anodized to form an oxide (Ta _X O _y).
Tantalum oxide) 308. By doing so, the periphery of the gate wiring 304 is surrounded by an oxide 308 of a tantalum film (tantalum oxide film) 308 and an oxide of an aluminum film (alumina film) 307, and serves to protect the gate wiring from an etchant or the like in a subsequent step. Fulfill.

Next, a step of adding impurity ions imparting one conductivity is performed. To manufacture an N-channel TFT, phosphorus or arsenic is added, and to manufacture a P-channel TFT, boron or gallium is added. These impurity ions may be added by any of ion implantation, plasma doping, and laser doping.

In the case where a CMOS circuit is formed, impurity ions may be separately formed by using a resist mask.

This step is performed by dividing the acceleration voltage into two parts.
The first time is performed by setting the acceleration voltage to be as high as about 80 keV, and the second time is performed by setting the acceleration voltage to be as low as about 30 keV. By doing so, the impurity ions are also added under the tantalum oxide film 308 and the insulating film 303 first, and the tantalum oxide film 308 and the insulating film 30
3 serves as a mask, under which no impurity ions are added.

By such an impurity ion adding step, T
FT source region 309, drain region 310, low concentration impurity region (LDD region) 311, channel formation region 3
12 are formed. The concentration of impurity ions added to each impurity region may be appropriately set by a practitioner. (FIG. 3 (D))

After the step of adding impurity ions is completed, furnace annealing, lamp annealing, laser annealing, or a combination thereof is used to perform a heat treatment to activate the added impurity ions.

Next, an interlayer insulating film 3 made of a silicon oxide film
13 is formed to a thickness of 1 μm. Next, the interlayer insulating film 3
13 to form contact holes 314 to 31
6 is formed. This contact hole is formed as follows.

First, LAL500 manufactured by Hashimoto Kasei Co., Ltd.
The interlayer insulating film 313 is etched using an etchant referred to as an etchant. LAL500 is a buffered hydrofluoric acid mixed with ammonium fluoride, hydrofluoric acid and water, with several percent
This is an etchant to which a surfactant is added. Of course, other buffered hydrofluoric acid may be used.

The buffered hydrofluoric acid used here is preferably capable of etching a silicon oxide film at a relatively high rate. Since the interlayer insulating film 313 is as thick as 1 μm, a higher etching rate leads to an improvement in throughput.

When the interlayer insulating film 313 is thus etched, the source region 309, the drain region 310 and the anodic oxide film 307 are exposed. Here, the etching is advanced using thin buffered hydrofluoric acid in which ammonium fluoride, hydrofluoric acid, and water are mixed at a ratio of 2: 3: 150 (vol%).

In this buffered hydrofluoric acid, a silicon film,
That is, the source region 309 and the drain region 310 are hardly etched. However, the anodic oxide film 307 made of alumina is etched, and the aluminum film 30 thereunder is etched.
4b is also etched. Finally, the tantalum film 304
When the etching reaches a, the etching is stopped, and a contact hole 316 as shown in FIG. 3E is formed.

When the state shown in FIG. 3E is obtained,
A source wiring 317 and a drain wiring 318 made of a conductive film are formed, and an extraction wiring 319 electrically connected to the gate wiring 304 is formed using the same material. (FIG. 3
(F))

In this embodiment, a three-layered wiring of titanium / aluminum alloy / titanium is used as the conductive film constituting the source wiring 317, the drain wiring 318, and the extraction wiring 319. By doing so, a low-resistance wiring can be realized while protecting a highly reactive aluminum film with titanium. Of course, the conductive film applicable to this embodiment is not limited to this.

Through the above steps, a TFT having a structure as shown in FIG. 3F is completed. Further, according to the structure of this embodiment, the electrical connection between the gate wiring and the extraction wiring is achieved with the structure as shown in FIG.

In the structure of this embodiment, the contact holes 3
Since the tantalum film 304a functions as an etching stopper when forming 16, the controllability and margin of the process are greatly improved.

That is, it is possible to prevent a contact defect such as over-etching which has conventionally been a problem. Further, it is economically advantageous to use buffered hydrofluoric acid which can be easily controlled without requiring an etchant which is difficult to handle industrially like the chromium mixed acid described in the conventional example.

[Embodiment 2] In this embodiment, an example in which a TFT is manufactured by a different process from that of Embodiment 1 will be described. FIG. 4 is used for the description.

First, according to the steps of Embodiment 1, FIG.
Get the state of. Next, a porous anodic oxide film 401 is formed in accordance with JP-A-7-135318. After the formation of the porous anodic oxide film 401, dry etching is performed using CHF ₃ gas to form the insulating film 402 in a self-aligned manner. (FIG. 4 (A))

At this time, a resist mask (not shown) used for patterning remains on the gate wiring 304, and this resist mask functions as a mask during dry etching.

After the formation of the insulating film 402, it is desirable to provide a thin oxide film (not shown) on the surface of the active layer 302. By doing so, the silicon film as the active layer is not directly exposed to the electrolytic solution in the next anodizing step, so that contamination from the electrolytic solution can be prevented. Note that a known oxide film may be formed by a known method.

Next, after removing the above-described resist mask, anodic oxidation is performed in a 3% tartaric acid solution in ethylene glycol to form a thin and dense anodic oxide film 403 of 10 to 30 nm. The detailed conditions can be referred to JP-A-7-135318. At this time, the surface of the tantalum film 304a is also anodic oxidized, but the porous anodic oxide film 401 hinders the oxidation speed. (FIG. 4 (B))

After forming the dense anodic oxide film 403, the porous anodic oxide film 401 is removed. In this removal step, the etchant described in the first embodiment may be used.
(FIG. 4 (C))

Next, the dense anodic oxide film 4 is again anodized in a 3% tartaric acid ethylene glycol solution.
03, and a dense anodic oxide film 404 having a thickness of 100 to 150 nm is finally formed. At the same time, the tantalum film 304a is also completely anodized to become tantalum oxide 405. (FIG. 4 (D))

Thereafter, according to the steps of Embodiment 1, FIG.
A TFT having a structure as shown in FIG. 1F and a contact portion between the gate wiring and the lead-out wiring are completed.

[Embodiment 3] In this embodiment, Embodiments 1 and 2
An example in which a TFT is manufactured in a step different from that shown in FIG. FIG. 5 is used for the description.

First, according to the steps of Embodiment 1, FIG.
Get the state of. Next, a porous anodic oxide film 501 is formed in accordance with JP-A-7-135318. After the formation of the porous anodic oxide film 501, the resist mask (not shown) thereon is removed. (FIG. 5 (A))

Next, anodic oxidation is performed in a 3% tartaric acid ethylene glycol solution to form a dense anodic oxide film 502 having a thickness of 100 to 150 nm. Detailed conditions are described in JP-A-7-135.
318 may be referred to. At this time, the tantalum film 3
A high voltage is also applied to 04a, and it is almost completely anodized. (FIG. 5 (B))

At this time, the tantalum film 304a changes to tantalum oxide 503, but care must be taken in setting the conditions so that the tantalum film becomes completely tantalum oxide. If anodic oxidation is insufficient, tantalum oxide 5
03, a tantalum film remains in the lower layer, which has the same function as the gate electrode.
There is a possibility that the effect of the D region is impaired.

After the dense anodic oxide film 502 and tantalum oxide 503 are formed, dry etching is performed with CHF ₃ gas to form an insulating film 504 in a self-aligned manner. Then, when the dry etching is completed, the porous anodic oxide film 501 is removed. In this removal step, the etchant described in the first embodiment may be used. (FIG. 5
(C))

Thereafter, according to the steps of Embodiment 1, FIG.
A TFT having a structure as shown in FIG. 1F and a contact portion between the gate wiring and the lead-out wiring are completed.

[Embodiment 4] The structure of the present invention is not limited to a TFT, and a MOSFET formed using a silicon substrate.
It is also possible to apply to. MO for the present invention
FIG. 6 shows an example in which the present invention is applied to an SFET.

In FIG. 6, reference numeral 601 denotes a silicon substrate;
02 is a field oxide film, 603 is a source region, 604
Is a drain region, and 605 is a pair of LDD regions. The other structure is almost the same as the structure described in the first embodiment, and the description is omitted. Also, MOS
The structure may be such that the FET is manufactured inside the well structure.

As described above, since the present invention relates to a technique relating to a contact structure between wirings, the present invention is also applicable to TFTs.
It can also be applied to SFETs. Also, TF
The present invention is applied not only to semiconductor devices such as T and MOSFET but also to a case where a structure for electrically connecting an aluminum wiring protected by an anodic oxide film and a conductive film formed in a different layer is required. It is effective to do.

Embodiment 5 The structure of the present invention is an active matrix type liquid crystal display device in which a pixel matrix circuit and a driver circuit are integrally formed on a substrate having an insulating surface, an EL (electroluminescence) display device, an image sensor, and the like. Can be applied to the electro-optical device.

In particular, in a driver circuit, there are many structures in which the drain wiring of one TFT is connected to the gate wiring of another TFT, so that the number of contact portions for connecting the gate wiring and the extraction wiring becomes very large.

The present invention is a technique suitable for such a portion, and can achieve good ohmic contact with a simple process, and can improve the manufacturing cost, the manufacturing yield, and the reliability. it can.

The electro-optical device shown in the present embodiment has a T
Since it functions using FT, it is included in the category of a semiconductor device.

[Embodiment 6] The present invention can be applied not only to a display device as shown in Embodiment 5 but also to a thin film integrated circuit (or semiconductor circuit) in which functional circuits are integrated.
For example, it may be used for an arithmetic circuit such as a microprocessor or a high-frequency circuit (MMIC: Microwave Module IC) for a portable device.

Further, even when a semiconductor circuit having a three-dimensional structure is formed by combining TFTs and MOSFETs to form a VLSI circuit integrated at a very high density,
The contact structure of the present invention is very effective.

Note that the thin film integrated circuit as shown in this embodiment is formed of a TFT, and therefore is included in the category of a semiconductor device.

[Embodiment 7] In this embodiment, an example of an electronic apparatus (applied product) equipped with the display device or the semiconductor circuit shown in Embodiments 5 and 6 is shown in FIG. Note that an electronic device is defined as a product on which a semiconductor circuit or a display device is mounted.

The electronic apparatus to which the present invention can be applied includes a video camera, an electronic still camera, a projector, a head mounted display, a car navigation, a personal computer, a portable information terminal (mobile computer, mobile phone, PHS, etc.).

FIG. 7A shows a mobile phone, and a main body 200.
1, audio output unit 2002, audio input unit 2003, display device 2004, operation switch 2005, antenna 2006
It consists of. The present invention can be applied to the audio output unit 2002, the audio output unit 2003, the display device 2004, and the like.

FIG. 7B shows a video camera,
101, display device 2102, audio input unit 2103, operation switch 2104, battery 2105, image receiving unit 210
6. The present invention can be applied to the display device 2102, the sound input unit 2103, the image receiving unit 2106, and the like.

FIG. 7C shows a mobile computer (mobile computer), which includes a main body 2201 and a camera section 2.
202, an image receiving unit 2203, operation switches 2204, and a display device 2205. The present invention is a camera unit 220.
2. Applicable to the image receiving unit 2203, the display device 2205, and the like.

FIG. 7D shows a head-mounted display, which includes a main body 2301, a display device 2302, and a band 2
303. The present invention can be applied to the display device 2302.

FIG. 7E shows a rear type projector, in which a main body 2401, a light source 2402, a display device 2403,
Polarizing beam splitter 2404, reflector 240
5, 2406 and a screen 2407. The invention can be applied to the display device 2403.

FIG. 7F shows a front type projector, which includes a main body 2501, a light source 2502, and a display device 250.
3. It comprises an optical system 2504 and a screen 2505. The invention can be applied to the display device 2503.

As described above, the applicable range of the present invention is extremely wide, and can be applied to electronic devices in various fields. Further, the present invention can be applied to all products requiring an electro-optical device or a semiconductor circuit.

[0104]

According to the present invention, it is not necessary to use an etchant containing heavy metal chromium when forming a contact hole in an aluminum film protected by an alumina film. Therefore, an industrially safe manufacturing process can be constructed.

Further, since the above-mentioned contact hole is formed by using buffered hydrofluoric acid, which is easily available and managed, as an etchant, it is very economically advantageous.

Further, since an etching stopper is present at the time of forming a contact hole, a contact failure due to over-etching can be prevented. That is, the manufacturing yield of the contact portion is improved, and the reliability after the completion of the TFT is also improved.

[Brief description of the drawings]

FIG. 1 is a diagram showing a TFT structure and a structure of a contact portion with a gate wiring.

FIG. 2 is a view showing a state of contact failure.

FIG. 3 is a view showing a manufacturing process of a contact portion with a TFT and a gate wiring.

FIG. 4 is a diagram showing a manufacturing process of a TFT.

FIG. 5 is a diagram showing a manufacturing process of a TFT.

FIG. 6 is a diagram showing a structure of a MOSFET to which the present invention is applied.

FIG. 7 illustrates an example of an electronic device.

Claims (8)

[Claims] A first wiring, a second wiring formed in a layer above the first wiring with an insulating film interposed therebetween, and an electrical connection between the first wiring and the second wiring. A contact structure comprising: a contact hole for electrically connecting; and a contact structure comprising: a first electrode having a laminated structure in which a thin film containing aluminum as a main component is provided on a valve metal film; The semiconductor device, wherein the second wiring is in contact with the valve metal film via the contact hole formed through the thin film containing aluminum as a main component. 2. A plurality of TFTs formed on a substrate having an insulating surface, a gate wiring for supplying a gate signal to the plurality of TFTs, and a layer formed above the gate wiring with an insulating film interposed therebetween. A lead wire, and a contact hole for electrically connecting the gate wire and the lead wire, wherein the gate wire is mainly composed of aluminum on a valve metal film. A semiconductor device having a laminated structure provided with a thin film, wherein the lead-out wiring is in contact with the valve metal film via the contact hole formed through the thin film containing aluminum as a main component. 3. The semiconductor device according to claim 1, wherein the valve metal film is a tantalum film. 4. The semiconductor according to claim 1, wherein the periphery of the gate wiring is surrounded by an oxide of the valve metal film and an oxide of the thin film containing aluminum as a main component. apparatus. 5. A step of forming a first wiring, a step of forming a second wiring in a layer above the first wiring with an insulating film interposed, and a step of forming the first wiring and the second wiring. Forming a contact hole for electrically connecting the wiring to the semiconductor device, wherein the first wiring is a thin film containing aluminum as a main component on a valve metal film. Wherein the second wiring is connected to the valve metal film via the contact hole formed through the thin film containing aluminum as a main component. Method for manufacturing the device. 6. A step of forming a first wiring having a laminated structure in which a thin film containing aluminum as a main component is provided on a valve metal film; and a step of forming an insulating film covering the first wiring. A step of forming a contact hole by etching the insulating film; and a step of forming a second wiring connected to the valve metal film via the contact hole. A method for manufacturing a semiconductor device, which is formed through an insulating film and a thin film containing aluminum as a main component. 7. The method for manufacturing a semiconductor device according to claim 5, wherein the valve metal film is a tantalum film. 8. The method according to claim 5, wherein an anodic oxide obtained by anodizing the valve metal film and the thin film containing aluminum as a main component is formed around the gate wiring. A method for manufacturing a semiconductor device.