JPH11260986A - Lead frame - Google Patents
Lead frameInfo
- Publication number
- JPH11260986A JPH11260986A JP10073411A JP7341198A JPH11260986A JP H11260986 A JPH11260986 A JP H11260986A JP 10073411 A JP10073411 A JP 10073411A JP 7341198 A JP7341198 A JP 7341198A JP H11260986 A JPH11260986 A JP H11260986A
- Authority
- JP
- Japan
- Prior art keywords
- die pad
- lead frame
- exposed
- depressed
- package
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、半導体搭載に用い
られる樹脂モールドパッケージ用リードフレームに関
し、特に高耐電力を得るためのリードフレームに関す
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a lead frame for a resin mold package used for mounting a semiconductor, and more particularly to a lead frame for obtaining a high power durability.
【0002】[0002]
【従来技術】例えば高電力を消費するパワー半導体装置
などでは、自ら発生するジュール熱が回路へ影響しない
よう、その樹脂モールドパッケージ(以下、パッケージ
と略称する)には十分な熱放散性を有するものを使用し
なければならない。そのため、従来からヒートシンクを
備えたパッケージが採用されている。図2に示すものは
その一例であり、本図において1はリードフレーム、2
は半導体チップ、7はモールド樹脂、8は放熱板を示
す。2. Description of the Related Art For example, in a power semiconductor device which consumes high power, a resin mold package (hereinafter abbreviated as a package) having a sufficient heat dissipation so that Joule heat generated by itself does not affect a circuit. Must be used. Therefore, a package including a heat sink has been conventionally used. FIG. 2 shows an example of such a case.
Denotes a semiconductor chip, 7 denotes a mold resin, and 8 denotes a heat sink.
【0003】本図に示すように、半導体チップ2は放熱
板8上に搭載され、放熱板8のチップ搭載部の裏面がモ
ールド樹脂7から露出している。従って、半導体チップ
2が動作し電力を消費することによって発生した熱は、
放熱板8へと伝えられ、パッケージの外側へ放出され
る。なお、リードフレーム1と放熱板8は非導電性の両
面テープにより接着してあるので、ピン間の電気的な導
通はなく、半導体の動作に支障はない。As shown in FIG. 1, the semiconductor chip 2 is mounted on a heat sink 8, and the back surface of the chip mounting portion of the heat sink 8 is exposed from the mold resin 7. Therefore, the heat generated by operating the semiconductor chip 2 and consuming power is:
The heat is transmitted to the heat radiating plate 8 and released to the outside of the package. Since the lead frame 1 and the heat radiating plate 8 are adhered with a non-conductive double-sided tape, there is no electrical continuity between the pins, and there is no hindrance to the operation of the semiconductor.
【0004】[0004]
【発明が解決しようとする課題】上記のような構造のパ
ッケージを得るには、通常のヒートシンクを持たないパ
ッケージの形成工程に加え、何らかの加工工程が必要と
なる。例えば図2の例では、放熱板の形成、放熱板とリ
ードフレームの接着が不可欠であるが、これはリードフ
レームのフォーミングとは別工程で行わねばならない。
従って、工程が増えることによって高価なパッケージと
なってしまい、さらには放熱板や両面テープの厚さの公
差分も考慮に入れる必要があり、各パッケージで放熱板
の露出度が異なるなど組立上のばらつきも大きくなる。In order to obtain a package having the above-described structure, some processing steps are required in addition to the usual steps of forming a package having no heat sink. For example, in the example of FIG. 2, the formation of the heat sink and the adhesion of the heat sink to the lead frame are indispensable, but this must be performed in a step different from the forming of the lead frame.
Therefore, an increase in the number of processes results in an expensive package, and furthermore, it is necessary to take into account the tolerance of the thickness of the heat sink and the double-sided tape, and the degree of exposure of the heat sink differs in each package. Variations also increase.
【0005】また、小型パッケージの場合、パッケージ
内放熱板の放熱効果はあまり大きくなく、むしろ放熱板
を実装基板に接着し基板をも放熱板として使用すること
により大きな放熱を得ることができる。In the case of a small package, the heat radiating effect of the heat radiating plate in the package is not so large. Rather, large heat radiation can be obtained by bonding the heat radiating plate to the mounting substrate and using the substrate as the heat radiating plate.
【0006】そこで、特開平8−2135号に開示され
ているように放熱板を用いずにダイパッド全体を深くデ
ィプレスさせ、ダイパッド裏面をパッケージ表面に露出
させる構成のものが考え出されているが、この場合、半
導体チップのサイズによっては吊りピンに過大な角度を
付ける必要がある。図3は本例を示す図であり、図2と
同一または相当するものには同一の符号を付している。
本図において、3はダイパッド5に連結する吊りピンで
ある。Therefore, as disclosed in Japanese Patent Application Laid-Open No. H8-2135, a configuration has been devised in which the entire die pad is deeply depressed without using a heat sink and the back surface of the die pad is exposed to the package surface. In this case, depending on the size of the semiconductor chip, it is necessary to make the suspension pin an excessive angle. FIG. 3 is a diagram showing this example, and the same or corresponding components as those in FIG. 2 are denoted by the same reference numerals.
In the figure, reference numeral 3 denotes a suspension pin connected to the die pad 5.
【0007】しかしながらこのような例でも、例えば、
より小さいパッケージやパッケージサイズを大きくせず
に半導体チップを複数個並べるマルチチップタイプの半
導体装置のパッケージなどにおいては、モールド樹脂量
を極限まで少なくする必要があり、その限られたモール
ド樹脂の範囲内で吊りピンをディプレスするため、その
曲げ角度が急になってしまい、吊りピンが切れるという
不具合を生じてしまう。However, in such an example, for example,
In the case of a smaller package or a package of a multi-chip type semiconductor device in which a plurality of semiconductor chips are arranged without increasing the package size, it is necessary to minimize the amount of molding resin. In this case, since the hanging pin is depressed, the bending angle becomes steep, which causes a problem that the hanging pin is cut.
【0008】本発明は、上記問題点を解消し、容易に構
成でき、吊りピンが切れることのないリードフレームを
提供することを目的とする。An object of the present invention is to provide a lead frame which solves the above problems, can be easily constructed, and does not break the hanging pins.
【0009】[0009]
【課題を解決するための手段】上記目的を達成するため
に、本発明のリードフレームは、モールド樹脂とともに
半導体パッケージを構成し、前記モールド樹脂の一面に
露出し実装基板に接触可能にディプレスされたダイパッ
ドを具備するリードフレームにおいて、前記ダイパッド
は半導体チップを搭載するチップ搭載部と、該チップ搭
載部からディプレスされ前記モールド樹脂の一面に露出
し実装基板に接触可能な露出部とからなることを特徴と
する。In order to achieve the above object, a lead frame of the present invention constitutes a semiconductor package together with a mold resin, and is depressed so as to be exposed on one surface of the mold resin and contactable with a mounting substrate. In a lead frame provided with a die pad, the die pad includes a chip mounting portion on which a semiconductor chip is mounted, and an exposed portion which is depressed from the chip mounting portion and is exposed on one surface of the molding resin and can contact a mounting substrate. It is characterized by.
【0010】また、前記ダイパッドの前記チップ搭載部
と前記露出部は吊りピンにより連結され、前記露出部は
前記吊りピンの曲げ延ばしによってディプレスされてい
ることを特徴とする。Further, the chip mounting portion and the exposed portion of the die pad are connected by a hanging pin, and the exposed portion is depressed by bending and extending the hanging pin.
【0011】[0011]
【発明の実施の形態】以下、本発明の実施の形態を複数
の実施例及び図面を用いて説明する。なお、複数の図面
にわたって同一または相当するものには同一の符号を付
し、説明の重複を避けた。Embodiments of the present invention will be described below with reference to a plurality of examples and drawings. The same or corresponding components are denoted by the same reference symbols throughout the drawings, and description thereof will not be repeated.
【0012】図1は本発明の実施の形態を示す図であ
り、図1(a)は上面図、図1(b)は図1(a)にお
けるA−A断面を示す。本図において3は吊りピン、5
及び6はそれぞれチップ搭載部及び露出部となるダイパ
ッドを示す。FIG. 1 is a view showing an embodiment of the present invention. FIG. 1A is a top view, and FIG. 1B is a sectional view taken along the line AA in FIG. In this figure, 3 is a hanging pin, 5
Numerals 6 and 6 denote die pads serving as a chip mounting portion and an exposed portion, respectively.
【0013】図1(a)に示すように、ダイパッド5
は、吊りピン3に連結されており、ダイパッド5の一部
に打ち抜きやエッチングにより透孔5aが4箇所形成さ
れている。これら透孔5a間が吊りピン4となり、透孔
5aに囲まれた島領域がダイパッド6となっている。As shown in FIG. 1A, the die pad 5
Are connected to the suspension pins 3, and four holes 5 a are formed in a part of the die pad 5 by punching or etching. The suspension pins 4 are provided between the through holes 5a, and the island region surrounded by the through holes 5a is the die pad 6.
【0014】図1(b)で明かなように、ダイパッド5
が吊りピン3の曲げ延ばしによってディプレスされてお
り、さらにダイパッド6が吊りピン4の曲げ延ばしによ
ってダイパッド5の位置からディプレスされている。ま
た、ダイパッド6の下面はガルウィング型に形成された
外部リードの基板接触面と同一面となっている。As apparent from FIG. 1B, the die pad 5
Is depressed by bending and extending the hanging pins 3, and the die pad 6 is depressed from the position of the die pad 5 by bending and extending the hanging pins 4. The lower surface of the die pad 6 is flush with a substrate contact surface of an external lead formed in a gull wing shape.
【0015】従って、このリードフレーム1には、同図
に二点鎖線で示すように半導体チップ2が搭載でき、モ
ールド樹脂7を形成することができる。即ち、ダイパッ
ド5はチップの搭載部とすることができ、ダイパッド6
の下面は実装基板に接触可能に露出した露出部とするこ
とができる。Therefore, the semiconductor chip 2 can be mounted on the lead frame 1 as shown by a two-dot chain line in FIG. That is, the die pad 5 can be used as a chip mounting portion, and the die pad 6
Can be an exposed portion exposed so as to be able to contact the mounting board.
【0016】このような構造であるため、半導体チップ
2が動作し発生した熱は四方に伝達され、パッケージ表
面に露出したダイパッド6へも伝達される。また、ダイ
パッド6と実装基板を半田付け等で接触させると、実装
基板をヒートシンクとして使用することができる。With such a structure, the heat generated by the operation of the semiconductor chip 2 is transmitted in all directions, and is also transmitted to the die pad 6 exposed on the package surface. When the die pad 6 and the mounting board are brought into contact with each other by soldering or the like, the mounting board can be used as a heat sink.
【0017】また、チップ搭載部となるダイパッド5と
露出部となるダイパッド6を吊りピン4で連結している
ため、ディプレス時にその吊りピンに応力集中がなさ
れ、容易に変形するので加工しやすい。また、吊りピン
4間は透孔5aとなるため、樹脂モールド時に透孔5a
がモールド樹脂をよく通すので、モールド樹脂の流れが
妨げられず、樹脂の未充填等の問題を発生させない。Further, since the die pad 5 serving as a chip mounting portion and the die pad 6 serving as an exposed portion are connected by the suspension pins 4, stress is concentrated on the suspension pins at the time of depressing, and the suspension pins are easily deformed, so that they are easily processed. . In addition, since there is a through hole 5a between the hanging pins 4, the through hole 5a is formed during resin molding.
Since the mold resin passes through the mold resin well, the flow of the mold resin is not hindered, and problems such as unfilled resin do not occur.
【0018】以上、本発明の実施の形態について説明し
たが、本発明はこれに限らず種々の変更が可能である。
例えば上記実施の形態ではチップ搭載部と露出部を吊り
ピンで連結しディプレスする構成としたが、他の段階的
なディプレスを採用した方法で露出部を突設させる構成
としても良い。単純な例では、始め一枚板であるダイパ
ッドをディプレスし、更にそのダイパッドの一部をディ
プレスして露出部を形成したものが挙げられる。但し、
上記したように、吊りピンで連結する構成が有利である
ことは言うまでもない。Although the embodiment of the present invention has been described above, the present invention is not limited to this, and various modifications can be made.
For example, in the above embodiment, the chip mounting portion and the exposed portion are connected by hanging pins and depressed, but the exposed portion may be protruded by another stepwise depressing method. In a simple example, a die pad which is a single plate is first depressed, and a part of the die pad is depressed to form an exposed portion. However,
As described above, it is needless to say that the configuration in which the connection is made by the hanging pins is advantageous.
【0019】また、上記実施の形態では、リードフレー
ムの外部リードをガルウィング型としたが、ダイパッド
の露出部を実装基板に接触させる構成とするのなら、バ
ットリード(Butt−Lead)でもJリード(J−
Lead)でもよい。In the above-described embodiment, the external lead of the lead frame is a gull-wing type. However, if the exposed portion of the die pad is configured to be in contact with the mounting substrate, the J-lead (Butt-Lead) may be used. J-
Lead).
【0020】[0020]
【発明の効果】以上説明したように、本発明によれば、
放熱構造をリードフレームのディプレスのみで構成し、
その形成は同一の金型で行われるので、従来の放熱板を
貼り付ける構成のものに比べ、製品間の寸法ばらつきが
ない。As described above, according to the present invention,
The heat dissipation structure consists only of depressed lead frame,
Since the formation is performed in the same mold, there is no dimensional variation between products as compared with a conventional configuration in which a heat sink is attached.
【0021】また、ディプレスしたダイパッドからさら
にディプレスしてパッケージ表面に露出する露出部を形
成し、これを実装基板に接触させることができるので、
パッケージ内の熱をダイパッドを通じて基板に放熱させ
ることができる。しかも、ディプレスを段階的に行うこ
とによってダイパッドを露出させるため、小さいパッケ
ージや大きさに制約のあるパッケージであっても、深い
ディプレスによって吊りピンを切断するという不具合を
発生させることがない。Further, since the exposed portion exposed on the package surface is formed by further depressing from the depressed die pad and can be brought into contact with the mounting substrate,
The heat in the package can be radiated to the substrate through the die pad. In addition, since the die pad is exposed by performing the depressing stepwise, even a small package or a package having a limited size does not cause a problem that the hanging pins are cut by the deep depressing.
【0022】また、ダイパッドのチップ搭載部と露出部
を吊りピンで連結する構成とすることによって成形性が
良くなるため、ディプレスが容易となり、しかも、吊り
ピン間の透孔が樹脂を良く通過させるため、樹脂モール
ドに適した形状とすることができる。In addition, since the chip mounting portion and the exposed portion of the die pad are connected to each other by the suspension pins, the moldability is improved, so that the depressing is facilitated and the through holes between the suspension pins pass through the resin well. Therefore, a shape suitable for the resin mold can be obtained.
【図1】本発明の実施の形態を示す断面図である。FIG. 1 is a sectional view showing an embodiment of the present invention.
【図2】従来のリードフレームを示す断面図である。FIG. 2 is a sectional view showing a conventional lead frame.
【図3】従来のリードフレームの他の例を示す断面図で
ある。FIG. 3 is a sectional view showing another example of a conventional lead frame.
1:リードフレーム 2:半導体チップ 3、4:吊りピン 5:ダイパッド(チップ搭載部) 5a:透孔 6:ダイパッド(露出部) 7:モールド樹脂 8:放熱板 1: Lead frame 2: Semiconductor chip 3, 4: Hanging pin 5: Die pad (chip mounting portion) 5a: Through hole 6: Die pad (exposed portion) 7: Mold resin 8: Heat sink
Claims (2)
を構成し、前記モールド樹脂の一面に露出し実装基板に
接触可能にディプレスされたダイパッドを具備するリー
ドフレームにおいて、 前記ダイパッドは半導体チップを搭載するチップ搭載部
と、該チップ搭載部からディプレスされ前記モールド樹
脂の一面に露出し実装基板に接触可能な露出部とからな
ることを特徴とするリードフレーム。1. A lead frame comprising a die package which constitutes a semiconductor package together with a mold resin and is depressed so as to be exposed on one surface of the mold resin and contactable with a mounting substrate, wherein the die pad is a chip mounting part on which a semiconductor chip is mounted. A lead frame, comprising: a part; and an exposed part which is depressed from the chip mounting part, is exposed on one surface of the mold resin, and can contact a mounting substrate.
記露出部は吊りピンにより連結され、前記露出部は前記
吊りピンの曲げ延ばしによってディプレスされているこ
とを特徴とする請求項1に記載のリードフレーム。2. The device according to claim 1, wherein the chip mounting portion and the exposed portion of the die pad are connected by a hanging pin, and the exposed portion is depressed by bending and extending the hanging pin. Lead frame.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10073411A JPH11260986A (en) | 1998-03-06 | 1998-03-06 | Lead frame |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10073411A JPH11260986A (en) | 1998-03-06 | 1998-03-06 | Lead frame |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH11260986A true JPH11260986A (en) | 1999-09-24 |
Family
ID=13517437
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10073411A Pending JPH11260986A (en) | 1998-03-06 | 1998-03-06 | Lead frame |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH11260986A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20010045637A (en) * | 1999-11-05 | 2001-06-05 | 마이클 디. 오브라이언 | Semiconductor package |
-
1998
- 1998-03-06 JP JP10073411A patent/JPH11260986A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20010045637A (en) * | 1999-11-05 | 2001-06-05 | 마이클 디. 오브라이언 | Semiconductor package |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPH11195742A (en) | Semiconductor device, manufacture thereof, and led frame therefor | |
US6242797B1 (en) | Semiconductor device having pellet mounted on radiating plate thereof | |
JP2000307049A (en) | Lead frame, resin-sealed-type semiconductor device using lead frame, and its manufacturing method | |
JPH08139218A (en) | Hybrid integrated circuit device and its manufacture | |
JP2003197664A (en) | Semiconductor device, its manufacturing method, circuit board, and electronic instrument | |
JPH0263142A (en) | Molded package and its manufacture | |
JPH03174749A (en) | Semiconductor device | |
JPH03214763A (en) | Lead frame for semiconductor integrated circuit device and the device using the same | |
JPH11260986A (en) | Lead frame | |
JP2819282B2 (en) | Semiconductor package and manufacturing method thereof | |
JPH09116045A (en) | Resin-sealed semiconductor device of bga type using lead frame and its manufacture | |
JP2001135767A (en) | Semiconductor device and method of manufacturing the same | |
JP3521931B2 (en) | Semiconductor device and manufacturing method thereof | |
JP3699573B2 (en) | Semiconductor device, circuit member used therefor, and manufacturing method thereof | |
JP2968704B2 (en) | Semiconductor device | |
JP3100833B2 (en) | Plastic package | |
KR20000039152A (en) | Printed circuit board for semiconductor package and manufacturing method thereof | |
KR100649870B1 (en) | Leadframe for manufacturing semiconductor package, and semiconductor package and manufacturing method its using the same | |
KR100297108B1 (en) | Mcm package | |
JPH08125051A (en) | Semiconductor device | |
JP2000031315A (en) | Bga package and its manufacture | |
JP2002064174A (en) | Semiconductor device and its manufacturing method | |
JPH05251619A (en) | Resin seal semiconductor device and manufacture thereof | |
JPH06163760A (en) | Electronic-component mounting board provided with heat-dissipating slug | |
JPH09331006A (en) | Resin sealed semiconductor device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20040114 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20041027 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20041109 |
|
A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20050315 |