JPH11259047A - Liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a liquid crystal display device capable of correcting with a simple composition a signal voltage value impressed on a signal line of which an impedance has risen compared with other signal lines. SOLUTION: A driving circuit 6a related to source bus wiring 1a of the liquid crystal display is constituted by being provided with an area designating signal generation part 13 for generating a signal specifying a predetermined area of a display panel in a high impedance state based on an externally inputted signal, a switching signal creating circuit 10, and a voltage correction part 12 for correcting a signal voltage value impressed on the source bus wiring 1a (1b) of the designated predetermined area.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display having a function of correcting a disconnection of a bus line, and more particularly to a liquid crystal display having an improved function of correcting a disconnection.

[0002]

2. Description of the Related Art Conventional liquid crystal display devices having a function of correcting a disconnection of a bus line are disclosed in JP-A-3-23425, JP-A-3-98023, and JP-A-3-25.
There is an apparatus disclosed in Japanese Patent No. 9222. In these prior arts, a disconnection of a gate bus line or a source bus line is provided by providing a spare line connectable to a gate bus line or a source bus line of a liquid crystal display panel.

FIG. 5 is a plan view of a conventional liquid crystal display device applied to the embodiment of the present invention. The simplest case is shown as an example of correcting the disconnection due to the spare wiring described above with reference to FIG. Referring to FIG. 5, the liquid crystal display device includes a liquid crystal display panel 8, a resin film (not shown) on which drive circuits 6a and 6b are respectively mounted, and a control circuit 7 for controlling drive circuits 6a and 6b.

The liquid crystal display panel 8 includes a plurality of parallel source bus lines 1 connected to drive circuits 6a and 6b.
a and 1b, a plurality of gate bus lines 2 crossing each of the source bus lines 1a and 1b and connected to a drive circuit (not shown) controlled by the control circuit 7, and each of the source bus lines 1a and 1b and the gate bus lines A first substrate (not shown) in which picture element electrodes connected via driving elements such as switching transistors are formed at intersections with the second substrate 2 and a second substrate (not shown) in which counter electrodes are formed over the entire surface form a liquid crystal layer. It is constructed by sandwiching and bonding.

Further, at both ends of the plurality of source bus lines 1a and 1b, spare lines 3a and 3b are respectively provided with a plurality of source bus lines 1a through insulating films (not shown).
a and 1b, and are provided so as to be parallel to the gate bus line 2. One ends 4a and 4b of the spare wirings 3a and 3b are drawn out onto a substrate (not shown) outside the liquid crystal display panel 8 and can be connected to each other.

In the liquid crystal display device provided with such spare lines 3a and 3b, when a disconnection 5 occurs in the source bus line 1a- as shown in FIG. 5, the source bus line 1a- Spare wirings 3a and 3b
Are connected at each of the connection positions 5a and 5b, and are connected to one end 4 of the spare wirings 3a and 3b.
a and 4b are connected to each other. As a result, a source signal can be supplied to all the active elements connected to the source bus line 1a- in which the disconnection 5 has occurred.

According to the above-described method, the source bus line 1a- in which the disconnection 5 is corrected is longer than the other source bus lines 1a due to the spare lines 3a and 3b and the lines (not shown) connected to them. as a result,
Due to the lack of ability of the drive circuit 6a or 6b for outputting a signal to the source bus lines 1a and 1b, the voltage level of the source signal supplied to the source bus line 1a- in which the disconnection 5 has been corrected is changed to another source bus line 1a. And 1b are lower than the voltage level of the source signal supplied to 1b. When the voltage level of the supplied source signal decreases, the disconnection 5 of the liquid crystal display panel 8 is corrected to the source bus line 1a-
For example, a portion corresponding to the image may look brighter than other portions, for example, and the image quality is reduced.

As a conventional countermeasure against the above-mentioned image quality deterioration, there is a technique disclosed in Japanese Patent Application Laid-Open No. 8-185144. FIG.
FIG. 1 is a block diagram illustrating an electrical configuration of a voltage correction unit of a liquid crystal display device disclosed in Japanese Patent Application Laid-Open No. 8-185144.
In FIG. 6, a buffer B, a comparator C, a latch circuit R, and a switch S
W is provided. Here, assuming that the source bus wiring 1a whose disconnection has been corrected is the n-th wiring, the comparator Cn is n-th.
The voltage value of the source signal applied to the -1st source bus line 1a and the voltage value of the source signal applied to the nth source bus line 1a are compared to detect a difference, and when the difference of the comparison result is larger than a predetermined threshold value, The high-level detection signal is output to the corresponding latch circuit Rn, and if it is low, the low-level detection signal is output to the latch circuit Rn.

The latch circuit Rn responds to a clock signal input from a control circuit (not shown) to respond to a comparator C.
n, and outputs a high-level latch signal to the switch SWn when the latched detection signal is at a high level, and outputs a low-level latch signal when the latched detection signal is at a low level. The signal is output to the switch SWn.

Here, the latch circuit Rn outputs a low-level latch signal until a clock signal is input, and after the clock signal is input and latched, the latched detection signal is at a high level. The latch signal to be output is held at one of a high level and a low level depending on whether it is at a low level or a high level.

The switch SWn is connected to a corresponding latch circuit Rn
When the latch signal input from is high, the bias voltage V1 is applied to the buffer Bn. When the latch signal is low, the bias voltage V2 is applied to the buffer Bn.

Here, the bias voltages V1 and V2 determine the output level of the buffer Bn.
The bias voltage V1 is set higher than the bias voltage V2. When the bias voltage V1 is applied to the buffer Bn, the buffer Bn operates to output the source signal of the corresponding source bus line at a high level as compared with the case where the bias voltage V2 is applied to the buffer Bn. The same applies to other source bus wirings.

In this conventional technique, for example, the above-described voltage correction is performed at a timing when a uniform signal level is input during a blanking period between field periods of a video signal.

[0014]

In the method using the above-described voltage correction unit, a buffer B, a comparator C, and a latch circuit R are required for each source bus line 1a (1b). The number of the circuit groups must be provided by the number of the signal lines, so that the circuit of the liquid crystal display device is complicated, and it is difficult to reduce the cost.

Therefore, an object of the present invention is to provide a liquid crystal display device capable of correcting a signal voltage applied to a signal line having a higher impedance than other signal lines to a predetermined value with a simple configuration. That is.

[0016]

According to a first aspect of the present invention, there is provided a liquid crystal display panel having a plurality of picture elements and a plurality of signal lines for supplying a signal voltage for driving the picture elements. A driving circuit for applying a signal voltage to a signal line and driving a picture element, wherein the driving circuit is in a high impedance state of the liquid crystal display panel based on an externally applied signal. An area specifying signal generating means for generating a signal for specifying an area, and a voltage correcting means for correcting a value of a signal voltage applied to a signal line based on the generated signal for specifying a predetermined area are provided.

Therefore, when an area in a high impedance state is designated by the area designating signal generating means, the impedance of the signal line becomes larger than a predetermined value due to a disconnection correction or a variation in the thickness of the signal line caused in a manufacturing process. Also, for example, the voltage correction means corrects the value of the signal voltage applied to the signal line while taking into account the high area.

Therefore, for example, when a signal voltage is applied to a signal line corresponding to an area in a high impedance state, and the value of the signal voltage decreases from a predetermined value by an amount corresponding to the increase in the impedance, , The voltage is corrected to an appropriate value.

This makes it possible to correct the value of the signal voltage applied to the signal line in the area having a higher impedance than the other areas to an appropriate value. As a result, an image is not displayed on the liquid crystal display device. When displayed, it is possible to prevent a high impedance area from being displayed as an image brighter than other areas due to a disconnection correction or a variation in a manufacturing process, for example. Can be improved.

Further, a liquid crystal display device which has been conventionally discarded due to poor image quality can be made non-defective by correcting the value of the signal voltage. As a result, the yield of the liquid crystal display device can be improved. And manufacturing costs can be reduced.

The liquid crystal display according to the second aspect is the first aspect.
In the device described in (1), the liquid crystal display panel is formed with a spare wiring that intersects at least a part of the plurality of signal lines via an insulating film at both ends of each signal line, and is drawn out of the liquid crystal display panel. One ends of the spare wirings can be connected to each other. In the liquid crystal display device configured as described above, when a disconnection occurs in a signal line, the disconnected signal line and spare wirings formed at both ends of the signal line are connected via an insulating film. Are connected to each other. This corrects the disconnection of the signal line,
It is possible to supply a signal voltage to the disconnected signal line.

The signal line to which the disconnection has been corrected and the spare wiring has been connected has a longer wiring length and a higher impedance than the signal line which has not been disconnected and corrected, but has a higher impedance. The predetermined area corresponding to the signal line is specified by the area specifying signal generating means as described above, and the value of the signal voltage applied to the signal line is corrected by the voltage correcting means based on the signal specifying the predetermined area. Therefore, it is possible to prevent the image quality of the liquid crystal display device whose disconnection has been corrected from deteriorating.

The liquid crystal display device according to the third aspect is the first aspect.
Alternatively, the voltage correcting means of the device described in 2 is configured to correct only the value of the signal voltage applied to the signal line corresponding to the predetermined area specified by the area specifying signal generating means.

Therefore, the value of the applied signal voltage is corrected by the voltage correcting means for the signal line corresponding to the predetermined area specified by the area specifying signal generating means.

Therefore, voltage correction for eliminating the high impedance state is performed only on a predetermined area of the liquid crystal display panel, so that power consumption due to the voltage correction can be minimized. As a result, the power consumption of the liquid crystal display device can be suppressed.

In the device according to any one of the first to third aspects, the predetermined area in the high impedance state is designated based on a signal supplied from the outside, so that the liquid crystal display device itself is in the high impedance state. It is not necessary to provide a circuit for detecting the area in each signal line as in the related art, so that the unit price of the liquid crystal display device itself can be reduced and its configuration can be simplified.

[0027]

FIG. 1 is a block diagram showing an electric configuration of a voltage correction unit provided in a driving circuit 6a or 6b of a liquid crystal display device according to an embodiment of the present invention and a circuit in the vicinity thereof. An example of the configuration of the display device of the present embodiment is shown in FIG. 5 described above.

Here, for simplicity, only the drive circuit 6a side will be described, but the same applies to the drive circuit 6b side. The drive circuit 6a shown in FIG. 1 relates to the switching signal generation circuit 10, the sample and hold circuit 11, the voltage correction unit 12, and the switching signal generation circuit 10 for detecting and correcting a high impedance state of the source bus wiring 1a. And a designated area designating signal generator 13.

FIG. 2 is a block diagram showing the area designation signal generator 13 shown in FIG.
FIG. Area designation signal generation unit 13 includes switches SWJ1 to SWJ3 and resistors R1 to R3. The switches SWJ1 to SWJ3 are a switching signal generation circuit 1
0, the signal levels of 3-bit data signals Vi1 to Vi3 for panel area setting described later are set to the power supply voltage V.
Open / close is switched to set one of cc ("1") and GND ("0").

The voltage correction unit 12 includes a switch SW and a buffer B for each source bus line 1a. Switch S
W is the bias voltage V1 and V2 (where V1> V2)
And one of them is given to the corresponding buffer B according to the switching signal SE output from the switching signal generation circuit 10. The buffer B applies one of the held bias voltages V1 and V2 supplied from the corresponding switch SW as a source signal to the corresponding source bus line in response to the drive signal supplied from the sample and hold circuit 11.

The sample-and-hold circuit 11 receives a clock signal CK, a horizontal scanning start signal SP, and a video signal RGB, and inputs a drive signal to each buffer B based on these signals.

In the liquid crystal display device, a drive circuit (not shown) connected to the gate bus line 2 scans the gate bus line 2 based on a control signal output from the control circuit 7 to each drive circuit. , And the driving circuits 6a and 6b supply the source signals to the source bus lines 1a and 1b in synchronization with the scanning of the gate bus line 2, whereby each picture element of the liquid crystal display panel 8 is driven. An image is displayed.

As described above, in the manufacturing process of the liquid crystal display device or the like, the source bus wiring 1a (1
When the disconnection 5 occurs in b), the source signal is not supplied beyond the disconnection point, so that in the image displayed on the liquid crystal display panel 8, the source bus wiring appears as a line having a different luminance. At this time, source bus wirings 1a and 1b and auxiliary wirings 3a and 3b are connected via insulating films at intersections 5a and 5b in FIG. 5, and ends 4a and 4b of auxiliary wirings 3a and 3b are not shown on a control board (not shown). It is electrically interconnected by a lead wire provided above. As a result, the drive circuit 6 is also connected to the active element on the lower side of FIG. 5 from the location of the disconnection 5 through the auxiliary wiring and the lead wire provided on the control board (not shown).
The source signal is supplied from a, and the disconnection 5a on the liquid crystal display panel 8 is corrected.

In the source bus line 1a- having undergone such a disconnection correction, the spare line 3a, 3a
The wiring becomes longer by an amount corresponding to b and the lead wire (not shown), and the impedance becomes higher.

As a remedy, a bias voltage for determining an output level of a buffer (not shown) provided for each source bus line may be set high to output a source signal at a high level. However, if the bias voltage is set high. However, power consumption increases, which is not desirable.

Therefore, in the present embodiment, first, when the disconnection 5 is detected during the inspection of the liquid crystal display panel 8 alone during the manufacturing process of the liquid crystal display device, the inspector of the liquid crystal display panel 8 determines the location where the disconnection 5 occurred. The area of the liquid crystal display panel 8 corresponding to the above is designated by a predetermined area number or the like, and the next half-mounting process is notified. In the latter half of the mounting step, the high impedance state described above is improved by externally inputting bit data based on the designated area number to the drive circuit. This will be described below.

FIGS. 3A and 3B are diagrams showing the position of the designated area on the liquid crystal display panel and the area when the panel area is designated by 3 bits according to the embodiment of the present invention. is there. 4A to 4F are timing charts for explaining a bias voltage switching signal of a liquid crystal display device for correcting a voltage value according to the embodiment of the present invention.

As shown in FIG. 3B, seven areas E1 to E7 can be designated using a 3-bit data signal. As shown in FIG. 3A, the seven areas E1 to E7 correspond to the seven equally divided areas of the liquid crystal display panel 8.

Now, assuming that the location of the disconnection 5 as shown in FIG. 5 is within the area E2 of FIG.
To “a”, 3-bit data “010” is externally input as a panel area setting signal PS. in this case,
Since "0" is at the GND level and "1" is at the power supply voltage Vcc level, the switches SWJ1 and SWJ3 are opened and the switch SWJ2 is closed. This part may be set using a jumper resistor or the like.

Therefore, the switching signal generation circuit 1
0 includes signals Vi1 and Vi shown in FIGS. 4A to 4C including a counter, a flip-flop, and a gate circuit.
2 and Vi3 are inputted, and the horizontal clock signal CK and the horizontal scanning start signal SP shown in FIGS. 4D and 4E are inputted in relation to the image signal to generate the switching signal SE shown in FIG. The signal is supplied to the voltage correction unit 12.

The level "H" of the switching signal SE corresponds to the level of the horizontal clock signal CK, and the source signal sampled and held by the level of the horizontal clock signal CK is supplied to the source bus line 1a- and the buffer B of FIG. Supplied.

Each buffer B outputs a predetermined source signal to the corresponding source bus line 1a based on one of the bias voltages V1 and V2 supplied via the corresponding switch SW.

Here, the bias voltage V2 is applied to the buffer B electrically connected to the source bus line 1a in the area Ei in which the disconnection 5 is not corrected.
Bus wiring 1 in the area Ei where the correction of
A buffer B electrically connected to a.
1 is applied. Therefore, since the high voltage is supplied only to the area where the disconnection 5 is corrected, the power consumption can be suppressed as much as possible.

The switching between the bias voltages V1 and V2 is as follows.
The switching is performed by each switch SW based on the switching signal SE output from the switching signal generation circuit 10 as described later. The bias voltages V1 and V2 are for determining the source signal level output from the buffer B. When the bias voltage V1 is applied to the buffer B,
The buffer B outputs the source signal at a higher voltage level than when the bias voltage V2 is applied.

On the other hand, if there is no disconnection 5, the panel area setting signal PS is "0", that is, "000" is input as a 3-bit data input. Therefore, the bias voltage is applied to the buffers B of all the source bus lines 1a. The source signal of V2 is output.

In this embodiment, the number of source bus lines is set to 14 for easy understanding, but the same applies to any number of source bus lines. The bit data for setting the area of the liquid crystal display panel 8 is not limited to 3 bits.
That is, if 4-bit input is used, one of the liquid crystal display panels 8
Five areas can be set, and 63 areas can be set with 6-bit input. Therefore, it is desirable that the total number of areas that can be designated in the liquid crystal display panel 8 and the number of bits for the panel area setting signal PS be determined by comparing the reduction in circuit configuration and the reduction in power consumption.

In general, in a liquid crystal display device using m source drivers, bit data for selecting a panel area is set to n.
If bit input is used, the panel area can be divided into (2 ⁿ -1) .m pieces.

In this embodiment, the source bus wiring 1
a (1b) becomes a high impedance state by disconnection 5
However, in the manufacturing process of the liquid crystal display panel 8, the source bus wiring may be thinner or thicker than other source bus wirings.

The embodiments disclosed this time are to be considered in all respects as illustrative and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an electrical configuration of a voltage correction unit provided in a drive circuit 6a or 6b of a liquid crystal display device according to an embodiment of the present invention and circuits in the vicinity thereof.

FIG. 2 is a configuration diagram of an area designation signal generation unit 13 of FIG.

FIGS. 3A and 3B show a position of a designated area on a liquid crystal display panel and a bit input value indicating the area when a panel area is designated by 3 bits according to the embodiment of the present invention; FIG.

FIGS. 4A to 4F are timing charts for explaining a bias voltage switching signal of the liquid crystal display device for correcting a voltage value according to the embodiment of the present invention.

FIG. 5 is a plan view of a conventional liquid crystal display device applied to the embodiment of the present invention.

FIG. 6 is a block diagram showing an electrical configuration of a voltage correction unit of the liquid crystal display device disclosed in Japanese Patent Application Laid-Open No. 8-185144.

[Explanation of symbols]

 Reference Signs List 10 switching signal generation circuit 11 sample and hold circuit 12 voltage correction unit 13 area designation signal generation unit Bn-2 to Bn + 1 Buffer SWn-2 to SWn + 1 Switch 1a, 1b Source bus wiring Note that the same reference numerals in each figure are the same or corresponding parts. Is shown.

Claims (3)

[Claims] 1. A liquid crystal display panel having a plurality of picture elements and a plurality of signal lines for supplying a signal voltage for driving the picture elements, and a drive for applying a signal voltage to the signal lines to drive the picture elements. In a liquid crystal display device including a circuit, the drive circuit, based on a signal supplied from the outside, an area designation signal generation unit that generates a signal that designates a predetermined area in a high impedance state of the liquid crystal display panel, A liquid crystal display device comprising: a voltage correction unit configured to correct a value of a signal voltage applied to the signal line based on a signal specifying the predetermined area generated by the area specification signal generation unit. 2. The liquid crystal display panel has a spare wiring formed at both ends of each signal line and intersecting at least a part of the plurality of signal lines via an insulating film, and is provided outside the liquid crystal display panel. One end of the drawn-out spare wiring is connectable to each other, and the spare wiring is connected to the signal line where the disconnection has occurred, and the signal voltage is applied through the spare wiring, The liquid crystal display device according to claim 1. 3. The apparatus according to claim 2, wherein the voltage correction unit corrects only the value of the signal voltage applied to the signal line corresponding to the predetermined area specified by the area specification signal generation unit. Item 1 or 2
3. The liquid crystal display device according to 1.