JPH11251503A - Electronic part and manufacture therefor - Google Patents

Electronic part and manufacture therefor

Info

Publication number
JPH11251503A
JPH11251503A JP5165198A JP5165198A JPH11251503A JP H11251503 A JPH11251503 A JP H11251503A JP 5165198 A JP5165198 A JP 5165198A JP 5165198 A JP5165198 A JP 5165198A JP H11251503 A JPH11251503 A JP H11251503A
Authority
JP
Japan
Prior art keywords
metal layer
electronic component
less
electrode lead
lead wire
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5165198A
Other languages
Japanese (ja)
Inventor
Shigeki Sakaguchi
茂樹 坂口
Kenichi Imazu
健一 今津
Hiroki Naraoka
浩喜 楢岡
Tomizo Sawada
富造 澤田
Kazuhiro Aoi
和廣 青井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP5165198A priority Critical patent/JPH11251503A/en
Publication of JPH11251503A publication Critical patent/JPH11251503A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

PROBLEM TO BE SOLVED: To solder parts easily firmly, by depositing a metal layer made of Sn containing Bi less than predetermined in percent on an electrode lead wire to be connected to the outside. SOLUTION: A metal layer made of Sn containing by weight less than 4% Bi is deposited on an electrode lead wire 5 connected to the outside as an outermost metal layer 6. A semiconductor element is die-bonded on a Cu lead frame and is provided with a wiring connected to an external electrode. An underlayer Ni-plated film is formed on the electrode lead wire 5 to be connected to the outside of the semiconductor device subjected to plastic sealing and lead forming, and then Bi is deposited on the metal underlayer as an Sn-Bi alloy film. This can make it possible to easily mount electronic parts on a printed substrate or a circuit substrate with solder at a low temperature and to improve the reliability of the portion bonded with solder.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】この発明は、半導体装置等の
電子部品およびその製造方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic component such as a semiconductor device and a method for manufacturing the same.

【0002】[0002]

【従来の技術】従来、半導体装置における外部接続用電
極リード線には、予め鉛−錫(Pb−Sn)系半田層を
付着形成しておくことにより、容易にプリント基板や回
路基板に半導体装置を半田付けによって取付けることが
できるようにしていた。したがって、ほとんどの半導体
装置には、外部接続用電極リード線部分にPbを含有し
ていた。そのPb−Sn系半田層はめっきまたはディッ
プによって付着形成されていた。
2. Description of the Related Art Conventionally, a lead-tin (Pb-Sn) -based solder layer is previously formed on an electrode lead wire for external connection in a semiconductor device, so that the semiconductor device can be easily mounted on a printed circuit board or a circuit board. Can be attached by soldering. Therefore, most semiconductor devices contained Pb in the electrode lead wires for external connection. The Pb-Sn-based solder layer was formed by plating or dipping.

【0003】[0003]

【発明が解決しようとする課題】しかし、Pbを含む半
田を用いての半導体装置の半田付けは環境対策上好まし
くない。そこで近年、半田付けの容易な金属であるパラ
ジウム(Pd)を予めリードフレームに付着形成させて
おくことで、組み立て後の半田付着を不要にするととも
に、Pbを含まない半導体装置が紹介されている(例え
ば、日経エレクトロニクス:no.622,p17,1
994)。しかし、Pdめっきは、鉄系の材料に付着形
成させると、電位差により腐食反応が起こるため、リー
ドフレーム材質は銅材に限定されるという問題があっ
た。
However, soldering a semiconductor device using Pb-containing solder is not preferable in terms of environmental measures. Therefore, in recent years, a semiconductor device that does not require Pb-free soldering after assembling by preliminarily attaching and forming palladium (Pd), which is an easily solderable metal, to a lead frame has been introduced. (For example, Nikkei Electronics: no. 622, p17, 1
994). However, when Pd plating is applied to an iron-based material, a corrosion reaction occurs due to a potential difference, and there is a problem that the lead frame material is limited to a copper material.

【0004】この発明は、環境対策上好ましく、銅材の
リードに限定されず、しかも半田付けが容易でかつ強固
に行える電子部品およびその製造方法を提供するもので
ある。
The present invention provides an electronic component which is preferable in terms of environmental measures, is not limited to a lead made of copper, and can be easily and firmly soldered, and a method of manufacturing the same.

【0005】[0005]

【課題を解決するための手段】請求項1記載の電子部品
は、外部接続用電極リード線に、SnにBiを4重量%
未満含有してなる金属層を付着形成したことを特徴とす
るものである。請求項1記載の電子部品によると、金属
層にPbを含まないので環境対策上好ましく、しかもS
nにBiを含有したものであって適用対象が銅材のリー
ドに限定されない。また、Biによって接着の役目を果
たすSnの融点を下げることができ、低い温度で電子部
品をプリント基板や回路基板に半田付けによって容易に
取付けることができる。さらに、金属層に十分な機械的
強度を持たせることができ、熱疲労に対しても劣化が少
なく、プリント基板や回路基板に強固に半田付けでき、
半田接合部分の信頼性を高めることができる。
According to the electronic component of the present invention, Bi is contained in Sn at 4% by weight in the electrode lead wire for external connection.
Characterized in that a metal layer containing less than 10% is formed by adhesion. According to the electronic component of the first aspect, since the metal layer does not contain Pb, it is preferable from an environmental measure, and
n is a material containing Bi and its application is not limited to a lead made of a copper material. In addition, Bi can lower the melting point of Sn serving as an adhesive, and can easily attach an electronic component to a printed circuit board or a circuit board by soldering at a low temperature. In addition, the metal layer can have sufficient mechanical strength, has little deterioration against thermal fatigue, and can be firmly soldered to printed circuit boards and circuit boards.
The reliability of the solder joint can be improved.

【0006】請求項2記載の電子部品は、外部接続用電
極リード線に、SnにBiを4重量%未満、AgとCu
を合計で4重量%未満含有してなる金属層を付着形成し
たことを特徴とするものである。請求項2記載の電子部
品によると、金属層にPbを含まないので環境対策上好
ましく、しかもSnにBiを含有したものであって適用
対象が銅材のリードに限定されない。また、Biによっ
て接着の役目を果たすSnの融点を下げることができ、
低い温度で電子部品をプリント基板や回路基板に半田付
けによって容易に取付けることができる。また、金属層
に十分な機械的強度を持たせることができ、熱疲労に対
しても劣化が少なく、プリント基板や回路基板に強固に
半田付けでき、半田接合部分の信頼性を高めることがで
きる。さらに、金属層にAgとCuを含有させること
で、半田付けが一層容易になる。
In the electronic component according to the second aspect of the present invention, the external connection electrode lead wire contains less than 4% by weight of Bi in Sn, Ag and Cu.
In a total amount of less than 4% by weight. According to the electronic component of the present invention, Pb is not contained in the metal layer, which is preferable from an environmental measure. Further, the electronic component contains Bi in Sn and its application is not limited to a lead made of copper. In addition, Bi can lower the melting point of Sn serving as an adhesive,
Electronic components can be easily attached to a printed circuit board or a circuit board by soldering at a low temperature. In addition, the metal layer can have sufficient mechanical strength, is less deteriorated against thermal fatigue, can be firmly soldered to a printed circuit board or a circuit board, and can increase the reliability of a solder joint. . Further, by including Ag and Cu in the metal layer, soldering is further facilitated.

【0007】請求項3記載の電子部品は、外部接続用電
極リード線に、Sn,Bi,Ag,Cuの単体もしくは
合金の多層構造からなる金属層を付着形成してなり、金
属層の全体組成でBiが4重量%未満、AgとCuが合
計で4重量%未満、残りがSnであることを特徴とする
ものである。請求項3記載の電子部品によると、金属層
にPbを含まないので環境対策上好ましく、しかもSn
にBiを含有したものであって適用対象が銅材のリード
に限定されない。また、Biによって接着の役目を果た
すSnの融点を下げることができ、低い温度で電子部品
をプリント基板や回路基板に半田付けによって容易に取
付けることができる。また、金属層に十分な機械的強度
を持たせることができ、熱疲労に対しても劣化が少な
く、プリント基板や回路基板に強固に半田付けでき、半
田接合部分の信頼性を高めることができる。さらに、金
属層にAgとCuを含有させることで、半田付けが一層
容易になる。
According to a third aspect of the present invention, there is provided an electronic component in which a metal layer having a multilayer structure of a simple substance or an alloy of Sn, Bi, Ag, and Cu is attached to an external electrode lead wire, and the overall composition of the metal layer Wherein Bi is less than 4% by weight, Ag and Cu are less than 4% by weight in total, and the balance is Sn. According to the electronic component according to the third aspect, since the metal layer does not contain Pb, it is preferable for environmental measures, and Sn
And Bi is contained therein, and the application object is not limited to the lead of the copper material. In addition, Bi can lower the melting point of Sn serving as an adhesive, and can easily attach an electronic component to a printed circuit board or a circuit board by soldering at a low temperature. In addition, the metal layer can have sufficient mechanical strength, is less deteriorated against thermal fatigue, can be firmly soldered to a printed circuit board or a circuit board, and can increase the reliability of a solder joint. . Further, by including Ag and Cu in the metal layer, soldering is further facilitated.

【0008】請求項4記載の電子部品は、請求項1また
は請求項2または請求項3において、外部接続用電極リ
ード線に付着形成した金属層が、CuもしくはNiから
なる下地金属層上に形成されていることを特徴とするも
のである。請求項4記載の電子部品によると、請求項1
または請求項2または請求項3の作用に加え、金属層を
CuもしくはNiからなる下地金属層上に形成したこと
で、経時変化の少ない接合を得ることができる。
According to a fourth aspect of the present invention, in the electronic component according to the first, second, or third aspect, the metal layer attached to the external connection electrode lead wire is formed on a base metal layer made of Cu or Ni. It is characterized by having been done. According to the electronic component of the fourth aspect, the first aspect
Alternatively, in addition to the function of the second or third aspect, by forming the metal layer on the underlying metal layer made of Cu or Ni, it is possible to obtain a junction with little change over time.

【0009】請求項5は、請求項1または請求項2また
は請求項3または請求項4記載の電子部品の製造方法で
あって、電流密度が1.5A/dm2 以下の電気メッキ
法によって金属層を付着形成することを特徴とするもの
である。請求項5記載の電子部品の製造方法によると、
電流密度が1.5A/dm2 以下の電気メッキ法によっ
て金属層を付着形成することにより、外部接続用電極リ
ード線に付着する金属層の粒径が小さくなり、外部接続
用電極リード線の回路基板やプリント基板への半田付け
を容易に行うことができる。
According to a fifth aspect of the present invention, there is provided a method of manufacturing an electronic component according to the first, second, third or fourth aspect, wherein the current density is 1.5 A / dm 2 or less by an electroplating method. It is characterized in that a layer is formed by adhesion. According to the method of manufacturing an electronic component according to claim 5,
By forming the metal layer by electroplating with a current density of 1.5 A / dm 2 or less, the particle size of the metal layer adhered to the external connection electrode lead wire is reduced, and the circuit of the external connection electrode lead wire is reduced. Soldering to a board or a printed board can be easily performed.

【0010】請求項6は、請求項1または請求項2また
は請求項3または請求項4記載の電子部品の製造方法で
あって、金属層を付着形成した後、アニール処理を施す
ことを特徴とするものである。請求項6記載の電子部品
の製造方法によると、金属層の付着形成後にアニール処
理を施すことにより、Snが素材に拡散して合金層が形
成され、表面のSn濃度が低下しウイスカーを防止する
ことができる。
According to a sixth aspect of the present invention, there is provided a method of manufacturing an electronic component according to the first, second, third, or fourth aspect, wherein an annealing process is performed after a metal layer is formed. Is what you do. According to the electronic component manufacturing method of the present invention, by performing an annealing treatment after the formation of the metal layer, Sn diffuses into the material to form an alloy layer, thereby reducing the Sn concentration on the surface and preventing whiskers. be able to.

【0011】請求項7は、請求項1または請求項2また
は請求項3または請求項4記載の電子部品の製造方法で
あって、金属層を付着形成した後、Au皮膜を付着形成
することを特徴とするものである。請求項7記載の電子
部品の製造方法によると、外部接続用電極リード線への
酸化を防ぐことができ、外部接続用電極リード線の回路
基板やプリント基板への半田付けによる取付けを容易に
行うことができる。
According to a seventh aspect of the present invention, there is provided a method of manufacturing an electronic component according to the first, second, third, or fourth aspect, wherein the Au layer is formed after the metal layer is formed. It is a feature. According to the method for manufacturing an electronic component according to the seventh aspect, it is possible to prevent oxidation of the external connection electrode lead wire, and to easily attach the external connection electrode lead wire to a circuit board or a printed board by soldering. be able to.

【0012】[0012]

【発明の実施の形態】この発明の電子部品は、外部接続
用電極リード線に付着形成する最外層の金属層として、
従来のPb−Sn系半田に代えて、主として接着の役目
を果たすSn(融点232℃)に、その融点を低下させ
る金属としてビスマス(Bi)を混ぜたSn−Bi系合
金を採用した。また、外部接続用電極リード線の半田付
けを容易にするための添加金属としてAgとCuを選択
した。すなわち、電子部品の外部接続用電極リード線の
最外層の金属層として、Sn−Bi系合金を用い、Ag
とCuを添加している。なお、AgとCuについては、
いずれか片方だけの添加もしくは両方の添加のいずれで
もよく、また添加しなくてもよい。添加する場合には、
同量ではCuに比べてAgの方が効果が大である。
BEST MODE FOR CARRYING OUT THE INVENTION An electronic component according to the present invention has an outermost metal layer adhered to an electrode lead wire for external connection.
Instead of the conventional Pb-Sn-based solder, an Sn-Bi-based alloy obtained by mixing bismuth (Bi) as a metal for lowering the melting point with Sn (melting point: 232 ° C) mainly serving as an adhesive is used. Further, Ag and Cu were selected as additive metals for facilitating soldering of the external connection electrode lead wires. That is, a Sn—Bi-based alloy is used as the outermost metal layer of the external connection electrode lead wire of the electronic component, and Ag is used.
And Cu are added. In addition, about Ag and Cu,
Either one or both of them may be added, or neither may be added. When adding
At the same amount, Ag is more effective than Cu.

【0013】なお、AgまたはCuを添加すると、半田
付けが容易になるのは、Snに対してAgやCuが溶解
し易いためである。すなわち、半田付け時の半田ペース
ト中のSnに対してリード線側のAgやCuが溶解し易
くなり、半田付けが容易になるのである。一方、Biの
含有量が4重量%未満と少ないため、Snの酸化を防止
するためにAuめっき皮膜を付着形成することで、半田
付け性の向上になる。
The reason why the addition of Ag or Cu facilitates soldering is that Ag or Cu is easily dissolved in Sn. That is, Ag and Cu on the lead wire side are easily dissolved in Sn in the solder paste at the time of soldering, and soldering is facilitated. On the other hand, since the content of Bi is as small as less than 4% by weight, the solderability is improved by forming an Au plating film to prevent the oxidation of Sn.

【0014】ここで、Biの含有量を4重量%未満とし
たのは、4重量%以上であると、曲げ加工時に電極リー
ド線の素地が見えるめっきクラックが発生するためであ
る(表1参照)。
Here, the reason why the content of Bi is set to less than 4% by weight is that if the content is more than 4% by weight, plating cracks in which the base material of the electrode lead wire is visible during bending (see Table 1). ).

【0015】[0015]

【表1】 [Table 1]

【0016】電極リードの素地が見えると、素地の酸化
が起こり、半田ペーストとの接合が不十分となり、接合
強度に大きな影響を及ぼすことから、Biの含有量は半
田接合部の信頼性に大きく影響する。なお、表1中3重
量%では、素地の見えない単なるクラックであり、半田
接合部の信頼性に特に大きな影響はない。図2および図
3に、接合強度試験結果を示す。この接合強度試験は、
実際に半導体パッケージが製造されてから、セットメー
カで実装されるまでの期間を考慮した試験である。図2
は、外部接続用電極リード線の材質が鉄系の場合であ
り、10%ものBiを入れると接合強度は大きく低下す
る。また、図3は銅系の材質であり、現行のSn−Pb
と比較して、Biの含有量が4%を超えると接合強度は
低下する。なお、図中「after mount 」とは、半導体パ
ッケージを製造し、その直後に実装して接合強度を測定
した例である。その他の前処理は、製造から実装までの
保管を想定したものである。
When the base material of the electrode lead is visible, the base material is oxidized, the bonding with the solder paste becomes insufficient, and the bonding strength is greatly affected. Therefore, the Bi content greatly affects the reliability of the solder bonding portion. Affect. In addition, at 3% by weight in Table 1, it is a mere crack in which the base material is not visible, and there is no particular influence on the reliability of the solder joint. 2 and 3 show the results of the bonding strength test. This joint strength test
This test takes into account the period from when a semiconductor package is actually manufactured to when it is mounted by a set manufacturer. FIG.
Is a case where the material of the electrode lead wire for external connection is iron-based, and when 10% of Bi is added, the bonding strength is greatly reduced. FIG. 3 shows a copper-based material, and the current Sn-Pb
When the content of Bi exceeds 4%, the bonding strength decreases. The "after mount" in the figure is an example in which a semiconductor package is manufactured, mounted immediately after that, and the bonding strength is measured. Other pre-processing assumes storage from manufacturing to mounting.

【0017】半田付け性の向上のために、例えば3重量
%未満のAgや1重量%程度のCuというように、合計
で4重量%未満の範囲内でAgとCuの何れか少なくと
も一方を添加した。また、例えばAgを4重量%未満添
加してCuは0重量%としてもよく、またCuを4重量
%未満添加してAgを0重量%としてもよい。合計の添
加量が同じなら、Agを多くした方が効果が高い。
In order to improve solderability, at least one of Ag and Cu is added within a total range of less than 4% by weight, such as less than 3% by weight of Ag and about 1% by weight of Cu. did. Also, for example, Cu may be added to less than 4% by weight to make 0% by weight of Cu, or Cu may be added to less than 4% by weight to make Ag to 0% by weight. If the total amount of addition is the same, the effect is higher when Ag is increased.

【0018】なお、Ag,Cuの添加量が4重量%未満
としたのは、それを超えると析出が早くなり、表面が凹
凸化してザラザラになり、またマイグレーション現象に
よって電気的ショート不良を発生し易くなり、さらに半
田付けの改善効果が弱くなるからである。外部接続用電
極リード線にSn−Biの金属層をディップ法(浸透
法)により形成する場合には、付着形成時に金属層が酸
化され易いので、AgとCuの添加は行った方がよい
が、電気めっきや無電界めっき等で金属層を形成する場
合には、付着形成時に金属層の酸化は少なく、AgとC
uの添加は行わなくてもよい。ただ、長時間の放置ある
いは後の工程で基板との接続時などに酸化されることが
考えられるので、AgとCuは添加した方が好ましい。
The reason why the addition amount of Ag and Cu is less than 4% by weight is that if the addition amount is more than 4% by weight, the precipitation becomes faster, the surface becomes uneven and rough, and an electrical short failure occurs due to the migration phenomenon. This is because the effect of improving soldering becomes weaker. When a Sn-Bi metal layer is formed on the external connection electrode lead wire by a dipping method (penetration method), the metal layer is easily oxidized at the time of adhesion formation, so it is better to add Ag and Cu. When a metal layer is formed by electroplating, electroless plating, or the like, oxidation of the metal layer during adhesion formation is small, and Ag and C
It is not necessary to add u. However, Ag and Cu are preferably added because they may be oxidized when left for a long time or when connected to a substrate in a later step.

【0019】また、外部接続用電極リード線に付着形成
する際に、1つの合金層として付着するだけでなく、S
n,Bi,Ag,Cuの単体もしくは合金などの多層構
造の金属層としてもよく、この場合、外部接続用電極リ
ード線の半田付け時に金属層が溶融して混ざり合い、均
一な組成になる。また、外部接続用電極リード線に金属
層を付着形成する前に、外部接続用電極リード線にCu
もしくはNi等の下地金属層を形成しておき、この下地
金属層の上に金属層を付着形成することにより、経時変
化の少ない接合とすることができる。つまり、下地金属
層(NiもしくはCu)の下は、一般にFe/Ni合金
またはCuである。このFe/Ni合金またはCuは、
工程を経過することで変質し(化合物の形成もしくは酸
化)、金属層の付着性を悪くし、経時変化によってその
接合部分にクラックが生成し、断線に至る可能性がある
が、上記のように下地金属層を設けておくと、そのよう
な問題を回避することができる。
In addition, when forming on the electrode lead wire for external connection, not only one alloy layer but also S
A metal layer having a multilayer structure such as a simple substance or an alloy of n, Bi, Ag, and Cu may be used. In this case, the metal layers are melted and mixed at the time of soldering the electrode lead wires for external connection, resulting in a uniform composition. Before the metal layer is attached to the external connection electrode lead, Cu
Alternatively, by forming a base metal layer of Ni or the like and attaching and forming a metal layer on the base metal layer, it is possible to achieve a junction with little change with time. In other words, below the underlying metal layer (Ni or Cu) is generally an Fe / Ni alloy or Cu. This Fe / Ni alloy or Cu
Deterioration (formation or oxidation of a compound) due to the progress of the process, the adhesion of the metal layer is deteriorated, and cracks may be generated at the joints due to aging, leading to disconnection. Such a problem can be avoided by providing a base metal layer.

【0020】また、電子部品の製造方法としては、金属
層を電流密度1.5A/dm2 以下の条件で電気めっき
する。電流密度を1.5A/dm2 以下としたのは、電
流密度によって粒子径が変化し、半田付け性が劣化する
からである。つまり、電流密度が大きいと粒子径が大き
くなって半田付け性が悪くなり、電流密度1.5A/d
2 以下にすることにより外部接続用電極リード線に付
着する金属層を構成する粒子の粒径を小さくすることが
でき、その結果、外部接続用電極リード線の半田付けが
容易に行えるようになる。
As a method of manufacturing an electronic component, a metal layer is electroplated under a current density of 1.5 A / dm 2 or less. The current density is set to 1.5 A / dm 2 or less because the particle size changes depending on the current density, and the solderability deteriorates. In other words, when the current density is large, the particle diameter becomes large and the solderability deteriorates, and the current density becomes 1.5 A / d
By setting m 2 or less, the particle diameter of the particles constituting the metal layer adhered to the external connection electrode lead wire can be reduced, and as a result, the external connection electrode lead wire can be easily soldered. Become.

【0021】以上をまとめると、以下のようになる。す
なわち、外部接続用電極リード線に、最外層の金属層と
してSnにBiを4重量%未満含有した金属層を付着形
成し、つまり被覆したことを特徴とするものである。そ
して、SnにBiを4重量%未満含有した金属層に、さ
らに4重量%未満の範囲でAgを含有し、または4重量
%未満の範囲でCuを含有し、または合計で4重量%未
満の範囲でAgとCuを含有する。さらに、Biの含有
量が少なくなるためウイスカーを防止するためアニール
処理をし、また半田付け性を向上させる目的でAu皮膜
を付着形成する。なお、単位原子層から0.1μm以下
の間にAu皮膜を付着形成する。Au皮膜を付着形成す
る目的は、Sn−Biの酸化を少なくするためであり、
単位原子層から0.1μm以下の間に付着形成するの
は、Au皮膜が厚くなってコストアップになるのを避け
るためであり、0.1μm以下で十分な耐酸化性があ
る。また、AgまたはCuまたはそれら両方の含有範囲
は4重量%未満とあるが、これは0重量%を超えて4重
量%未満ということである。
The above is summarized as follows. That is, a metal layer containing less than 4% by weight of Bi in Sn as an outermost metal layer is formed on the electrode lead wire for external connection by adhesion, that is, covered. Then, the metal layer containing less than 4% by weight of Bi in Sn further contains Ag in a range of less than 4% by weight, or contains Cu in a range of less than 4% by weight, or a total of less than 4% by weight. It contains Ag and Cu in the range. Further, since the Bi content is reduced, an annealing process is performed to prevent whiskers, and an Au film is formed by adhesion for the purpose of improving solderability. Note that an Au film is attached and formed within 0.1 μm or less from the unit atomic layer. The purpose of depositing the Au film is to reduce the oxidation of Sn-Bi,
The reason why the adhesion is formed between the unit atomic layer and 0.1 μm or less is to prevent the Au film from becoming thick and increasing the cost, and 0.1 μm or less has sufficient oxidation resistance. Also, the content range of Ag and / or Cu is less than 4% by weight, which means more than 0% by weight and less than 4% by weight.

【0022】ここで、AgとCuの添加の作用について
説明する。Ag+Cuの構成は、以下の3種類のSn酸
化進行の課題を工程順に解決し、かつSn酸化後の半田
付け性の4種類の課題を総合して解決するものである。 A:金属層の形成時 A1:ディップ法(溶融したものに漬けるため、Snが
酸化し易い) Snの酸化防止のために、Ag+Cuを4重量%未満含
有させる。AgとCuは、単独でもよい。なお、酸化防
止の効果は、同じ量ならAgの方が高い。
Here, the action of the addition of Ag and Cu will be described. The configuration of Ag + Cu solves the following three problems of Sn oxidation progress in the order of steps, and also solves four problems of solderability after Sn oxidation comprehensively. A: At the time of forming a metal layer A1: Dipping method (Sn is easily oxidized because it is immersed in a molten material) To prevent the oxidation of Sn, less than 4% by weight of Ag + Cu is contained. Ag and Cu may be used alone. The effect of preventing oxidation is higher for Ag if the amount is the same.

【0023】A2:電気めっき法(Snの酸化は少な
い) Ag+Cuは、後工程を考慮すると含有させた方が望ま
しい。 B:リードが製造されてから実際に使用されるまでに、
長い場合で1年程度放置されることに対して日本の日常
1年分に相当する85℃/85%/16時間の試験で、
リード金属層のSnに酸化が見られる。その酸化防止
に、Ag+Cuを4重量%未満含有させるとよい。Ag
とCuは単独でもよい。なお、酸化防止の効果は、同じ
量ならAgの方が高い。
A2: Electroplating method (Sn is less oxidized) Ag + Cu is desirably contained in consideration of the post-process. B: From the time the lead is manufactured until it is actually used,
In a long-term test of 85 ° C / 85% / 16 hours, equivalent to one year's worth of daily life,
Oxidation is observed in Sn of the lead metal layer. To prevent the oxidation, it is preferable to contain less than 4% by weight of Ag + Cu. Ag
And Cu may be used alone. The effect of preventing oxidation is higher for Ag if the amount is the same.

【0024】C:基板などに電子部品を半田付けすると
きの課題 C1:半田ペースト、リード金属層のSnが酸化する。
その酸化防止に、Ag+Cuを4重量%未満含有させる
とよい。AgとCuは単独でもよい。なお、酸化防止の
効果は、同じ量ならAgの方が高い。 C2:Snの酸化があると、半田ペーストによる電子部
品の半田付けが困難で、信頼性が低下する。その解決策
として、Ag+Cuを4重量%未満含有させるとよい。
AgとCuは単独でもよい。なお、Ag+Cuは以下の
ように作用する。つまり、半田ペースト中のSnにリー
ド金属層中のAg+Cuが溶解し、Snの酸化があって
も半田付けが容易となり、リードと基板と半田ペースト
との付着強度が高く、信頼性が向上する。
C: Problems when soldering electronic components to a substrate or the like C1: The solder paste and Sn of the lead metal layer are oxidized.
To prevent the oxidation, it is preferable to contain less than 4% by weight of Ag + Cu. Ag and Cu may be used alone. The effect of preventing oxidation is higher for Ag if the amount is the same. C2: If Sn is oxidized, it is difficult to solder the electronic component with a solder paste, and the reliability is reduced. As a solution, it is preferable to contain less than 4% by weight of Ag + Cu.
Ag and Cu may be used alone. Ag + Cu acts as follows. In other words, Ag + Cu in the lead metal layer dissolves in Sn in the solder paste, and even if the Sn is oxidized, soldering becomes easy, the adhesion strength between the lead, the substrate and the solder paste is high, and the reliability is improved.

【0025】以上のように、Ag+Cuの効果は、最終
的にはC2の項に述べた通りであるが、途中段階のA
1,B,C1の項の工程での酸化防止効果も複合された
ものとなる。言い換えれば、A,B,Cの各項でのSn
の酸化防止が、半田付け容易ということになり、したが
ってリードと基板と半田ペーストとの付着強度が高く、
信頼性が向上する。
As described above, the effect of Ag + Cu is finally as described in the section of C2.
The antioxidant effect in the steps of 1, B and C1 is also combined. In other words, Sn in each term of A, B, C
Prevention of oxidation means that soldering is easy, so the bonding strength between the lead, the board and the solder paste is high,
Reliability is improved.

【0026】[0026]

【実施例】次に、図1を用いて具体的な実施例について
説明する。図1は、電子部品となる半導体装置の正面図
を示しており、1は半導体素子、2は金属ワイヤ、3は
ダイボンド剤、4は成形用樹脂、5は外部接続用電極リ
ード線、6はプリント基板や回路基板への取付けを容易
にするための金属層である。
Next, a specific embodiment will be described with reference to FIG. FIG. 1 shows a front view of a semiconductor device as an electronic component, wherein 1 is a semiconductor element, 2 is a metal wire, 3 is a die bonding agent, 4 is a molding resin, 5 is an external connection electrode lead wire, and 6 is This is a metal layer for facilitating attachment to a printed circuit board or a circuit board.

【0027】実施例1 銅材のリードフレーム上に半導体素子がダイボンドさ
れ、外部電極との配線も施され、樹脂封止およびリード
加工の終了した半導体装置の外部接続用電極リード線
に、厚さ1〜3μmの下地Niめっき膜(下地金属層)
を形成した後、さらにその下地金属層上にBiを2重量
%含むSn−Bi合金膜(金属層)を電流密度1.0A
/dm2 で厚さ10μmに付着形成した。
Example 1 A semiconductor element is die-bonded on a copper lead frame, wiring to external electrodes is performed, and the thickness of the external connection electrode lead wire of the semiconductor device after resin sealing and lead processing is completed. 1 to 3 μm underlying Ni plating film (underlying metal layer)
Is formed, a Sn—Bi alloy film (metal layer) containing 2% by weight of Bi is further formed on the underlying metal layer with a current density of 1.0 A.
/ Dm 2 and a thickness of 10 μm.

【0028】実施例2 鉄−ニッケル材のリードフレーム上に半導体素子がダイ
ボンドされ、外部電極との配線も施され、樹脂封止およ
びリード加工の終了した半導体装置の外部接続用電極リ
ード線に、厚さ1〜2μmの下地Cuめっき膜(下地金
属層)を形成した後、さらにその下地金属層上にBiを
2重量%含むSn−Bi合金膜(金属層)を電流密度
1.5A/dm2 で厚さ12μmに付着形成した。
Embodiment 2 A semiconductor element is die-bonded on a lead frame made of an iron-nickel material, wiring with an external electrode is also performed, and an external connection electrode lead wire of a semiconductor device after resin sealing and lead processing is completed. After forming an underlying Cu plating film (underlying metal layer) having a thickness of 1 to 2 μm, a Sn—Bi alloy film (metal layer) containing 2% by weight of Bi was further formed on the underlying Cu plating film with a current density of 1.5 A / dm. 2 and formed to a thickness of 12 μm.

【0029】実施例3 実施例1と同様にして、樹脂封止およびリード加工の終
了した銅材の外部接続用電極リード線に、下地Ni膜
(下地金属層)を形成した後、280度に加熱させてい
るSn−Bi−Ag(85−10−5重量%)中にディ
ップし、厚さ20μmの金属層を付着形成した。
Example 3 In the same manner as in Example 1, a base Ni film (base metal layer) was formed on an external connection electrode lead wire of a copper material after resin encapsulation and lead processing was completed, and then the temperature was reduced to 280 degrees. Dipping was performed in the heated Sn-Bi-Ag (85-10-5% by weight), and a metal layer having a thickness of 20 μm was deposited.

【0030】[0030]

【発明の効果】請求項1記載の電子部品によると、金属
層にPbを含まないので環境対策上好ましく、しかもS
nにBiを含有したものであって適用対象が銅材のリー
ドに限定されない。また、Biによって接着の役目を果
たすSnの融点を下げることができ、低い温度で電子部
品をプリント基板や回路基板に半田付けによって容易に
取付けることができる。さらに、金属層に十分な機械的
強度を持たせることができ、熱疲労に対しても劣化が少
なく、プリント基板や回路基板に強固に半田付けでき、
半田接合部分の信頼性を高めることができる。
According to the electronic component according to the first aspect, since the metal layer does not contain Pb, it is preferable from the viewpoint of environmental measures.
n is a material containing Bi and its application is not limited to a lead made of a copper material. In addition, Bi can lower the melting point of Sn serving as an adhesive, and can easily attach an electronic component to a printed circuit board or a circuit board by soldering at a low temperature. In addition, the metal layer can have sufficient mechanical strength, has little deterioration against thermal fatigue, and can be firmly soldered to printed circuit boards and circuit boards.
The reliability of the solder joint can be improved.

【0031】請求項2記載の電子部品によると、金属層
にPbを含まないので環境対策上好ましく、しかもSn
にBiを含有したものであって適用対象が銅材のリード
に限定されない。また、Biによって接着の役目を果た
すSnの融点を下げることができ、低い温度で電子部品
をプリント基板や回路基板に半田付けによって容易に取
付けることができる。また、金属層に十分な機械的強度
を持たせることができ、熱疲労に対しても劣化が少な
く、プリント基板や回路基板に強固に半田付けでき、半
田接合部分の信頼性を高めることができる。さらに、金
属層にAgとCuを含有させることで、半田付けが一層
容易になる。
According to the electronic component according to the second aspect, since the metal layer does not contain Pb, it is preferable from an environmental measure, and Sn
And Bi is contained therein, and the application object is not limited to the lead of the copper material. In addition, Bi can lower the melting point of Sn serving as an adhesive, and can easily attach an electronic component to a printed circuit board or a circuit board by soldering at a low temperature. In addition, the metal layer can have sufficient mechanical strength, is less deteriorated against thermal fatigue, can be firmly soldered to a printed circuit board or a circuit board, and can increase the reliability of a solder joint. . Further, by including Ag and Cu in the metal layer, soldering is further facilitated.

【0032】請求項3記載の電子部品によると、金属層
にPbを含まないので環境対策上好ましく、しかもSn
にBiを含有したものであって適用対象が銅材のリード
に限定されない。また、Biによって接着の役目を果た
すSnの融点を下げることができ、低い温度で電子部品
をプリント基板や回路基板に半田付けによって容易に取
付けることができる。また、金属層に十分な機械的強度
を持たせることができ、熱疲労に対しても劣化が少な
く、プリント基板や回路基板に強固に半田付けでき、半
田接合部分の信頼性を高めることができる。さらに、金
属層にAgとCuを含有させることで、半田付けが一層
容易になる。
According to the third aspect of the present invention, since the metal layer does not contain Pb, it is preferable in terms of environmental measures, and Sn
And Bi is contained therein, and the application object is not limited to the lead of the copper material. In addition, Bi can lower the melting point of Sn serving as an adhesive, and can easily attach an electronic component to a printed circuit board or a circuit board by soldering at a low temperature. In addition, the metal layer can have sufficient mechanical strength, is less deteriorated against thermal fatigue, can be firmly soldered to a printed circuit board or a circuit board, and can increase the reliability of a solder joint. . Further, by including Ag and Cu in the metal layer, soldering is further facilitated.

【0033】請求項4記載の電子部品によると、請求項
1または請求項2または請求項3の効果に加え、金属層
をCuもしくはNiからなる下地金属層上に形成したこ
とで、経時変化の少ない接合を得ることができる。請求
項5記載の電子部品の製造方法によると、電流密度が
1.5A/dm2 以下の電気メッキ法によって金属層を
付着形成することにより、外部接続用電極リード線に付
着する金属層の粒径が小さくなり、外部接続用電極リー
ド線の回路基板やプリント基板への半田付けを容易に行
うことができる。
According to the electronic component of the fourth aspect, in addition to the effects of the first, second, or third aspect, the metal layer is formed on the underlying metal layer made of Cu or Ni, so that the change with time can be reduced. Less bonding can be obtained. According to the method of manufacturing an electronic component according to claim 5, the metal layer is formed by an electroplating method having a current density of 1.5 A / dm 2 or less, so that the particles of the metal layer adhere to the external connection electrode lead wire. The diameter is reduced, and the electrode lead wires for external connection can be easily soldered to a circuit board or a printed board.

【0034】請求項6記載の電子部品の製造方法による
と、金属層の付着形成後にアニール処理を施すことによ
り、Snが素材に拡散して合金層が形成され、表面のS
n濃度が低下しウイスカーを防止することができる。請
求項7記載の電子部品の製造方法によると、外部接続用
電極リード線への酸化を防ぐことができ、外部接続用電
極リード線の回路基板やプリント基板への半田付けによ
る取付けを容易に行うことができる。
According to the electronic component manufacturing method of the present invention, the annealing is performed after the formation of the metal layer, so that Sn diffuses into the material to form an alloy layer, and the S on the surface is formed.
The whisker can be prevented by decreasing the n concentration. According to the method for manufacturing an electronic component according to the seventh aspect, it is possible to prevent oxidation of the external connection electrode lead wire, and to easily attach the external connection electrode lead wire to a circuit board or a printed board by soldering. be able to.

【図面の簡単な説明】[Brief description of the drawings]

【図1】この発明の電子部品の正面図である。FIG. 1 is a front view of an electronic component according to the present invention.

【図2】鉄系の材質におけるSn−Bi合金中のBi含
有量と接合強度の関係を示す特性図である。
FIG. 2 is a characteristic diagram showing a relationship between a Bi content in a Sn—Bi alloy and a joining strength in an iron-based material.

【図3】銅系の材質におけるSn−Bi合金中のBi含
有量と接合強度の関係を示す特性図である。
FIG. 3 is a characteristic diagram showing a relationship between a Bi content in a Sn—Bi alloy and a bonding strength in a copper-based material.

【符号の説明】[Explanation of symbols]

5 外部接続用電極リード線 6 金属層 5 Electrode lead wire for external connection 6 Metal layer

フロントページの続き (72)発明者 澤田 富造 大阪府高槻市幸町1番1号 松下電子工業 株式会社内 (72)発明者 青井 和廣 大阪府高槻市幸町1番1号 松下電子工業 株式会社内Continuing from the front page (72) Inventor Tomizo Sawada 1-1, Sachimachi, Takatsuki-shi, Osaka Prefecture Inside Matsushita Electronics Corporation (72) Inventor Kazuhiro Aoi 1-1-1, Sachimachi, Takatsuki-shi, Osaka Matsushita Electronics Corporation Inside

Claims (7)

【特許請求の範囲】[Claims] 【請求項1】 外部接続用電極リード線に、SnにBi
を4重量%未満含有してなる金属層を付着形成したこと
を特徴とする電子部品。
1. An electrode lead wire for external connection;
An electronic component characterized in that a metal layer containing less than 4% by weight is formed by adhesion.
【請求項2】 外部接続用電極リード線に、SnにBi
を4重量%未満、AgとCuを合計で4重量%未満含有
してなる金属層を付着形成したことを特徴とする電子部
品。
2. An electrode lead wire for external connection;
An electronic component, wherein a metal layer containing less than 4% by weight and a total of less than 4% by weight of Ag and Cu is deposited.
【請求項3】 外部接続用電極リード線に、Sn,B
i,Ag,Cuの単体もしくは合金の多層構造からなる
金属層を付着形成してなり、前記金属層の全体組成でB
iが4重量%未満、AgとCuが合計で4重量%未満、
残りがSnであることを特徴とする電子部品。
3. An electrode lead wire for external connection, wherein Sn, B
A metal layer having a multilayer structure of a simple substance or an alloy of i, Ag, and Cu is adhered and formed.
i is less than 4% by weight, Ag and Cu are less than 4% by weight in total,
An electronic component, the balance being Sn.
【請求項4】 外部接続用電極リード線に付着形成した
金属層が、CuもしくはNiからなる下地金属層上に形
成されていることを特徴とする請求項1または請求項2
または請求項3記載の電子部品。
4. The metal layer attached to the external connection electrode lead wire is formed on a base metal layer made of Cu or Ni.
Or the electronic component according to claim 3.
【請求項5】 請求項1または請求項2または請求項3
または請求項4記載の電子部品の製造方法であって、電
流密度が1.5A/dm2 以下の電気めっき法によって
金属層を付着形成することを特徴とする電子部品の製造
方法。
5. The method according to claim 1, 2 or 3.
5. The method for manufacturing an electronic component according to claim 4, wherein the metal layer is formed by electroplating having a current density of 1.5 A / dm 2 or less.
【請求項6】 請求項1または請求項2または請求項3
または請求項4記載の電子部品の製造方法であって、金
属層を付着形成した後、アニール処理を施すことを特徴
とする電子部品の製造方法。
6. The method according to claim 1, wherein said first and second means are different from each other.
5. The method for manufacturing an electronic component according to claim 4, wherein an annealing process is performed after the metal layer is attached and formed.
【請求項7】 請求項1または請求項2または請求項3
または請求項4記載の電子部品の製造方法であって、金
属層を付着形成した後、Au皮膜を付着形成することを
特徴とする電子部品の製造方法。
7. The method according to claim 1, 2 or 3.
5. The method for manufacturing an electronic component according to claim 4, wherein after forming the metal layer, an Au film is formed.
JP5165198A 1998-03-04 1998-03-04 Electronic part and manufacture therefor Pending JPH11251503A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5165198A JPH11251503A (en) 1998-03-04 1998-03-04 Electronic part and manufacture therefor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5165198A JPH11251503A (en) 1998-03-04 1998-03-04 Electronic part and manufacture therefor

Related Child Applications (2)

Application Number Title Priority Date Filing Date
JP2002018436A Division JP2002319655A (en) 2002-01-28 2002-01-28 Method for manufacturing electronic component
JP2002139979A Division JP2002368175A (en) 2002-05-15 2002-05-15 Method of manufacturing electronic component

Publications (1)

Publication Number Publication Date
JPH11251503A true JPH11251503A (en) 1999-09-17

Family

ID=12892781

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5165198A Pending JPH11251503A (en) 1998-03-04 1998-03-04 Electronic part and manufacture therefor

Country Status (1)

Country Link
JP (1) JPH11251503A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6960396B2 (en) 1997-12-16 2005-11-01 Hitachi, Ltd. Pb-free solder-connected structure and electronic device
JP2007154260A (en) * 2005-12-05 2007-06-21 Sumitomo Metal Mining Co Ltd Method of depositing lead-free plating film
US7235309B2 (en) 2002-12-16 2007-06-26 Nec Electronics Corporation Electronic device having external terminals with lead-free metal thin film formed on the surface thereof
US9666547B2 (en) 2002-10-08 2017-05-30 Honeywell International Inc. Method of refining solder materials

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6960396B2 (en) 1997-12-16 2005-11-01 Hitachi, Ltd. Pb-free solder-connected structure and electronic device
US7013564B2 (en) 1997-12-16 2006-03-21 Hitachi, Ltd. Method of producing an electronic device having a PB free solder connection
US7709746B2 (en) 1997-12-16 2010-05-04 Renesas Technology Corp. Pb-free solder-connected structure and electronic device
US8503189B2 (en) 1997-12-16 2013-08-06 Renesas Electronics Corporation Pb-free solder-connected structure and electronic device
US8907475B2 (en) 1997-12-16 2014-12-09 Renesas Electronics Corporation Pb-free solder-connected structure
US9666547B2 (en) 2002-10-08 2017-05-30 Honeywell International Inc. Method of refining solder materials
US7235309B2 (en) 2002-12-16 2007-06-26 Nec Electronics Corporation Electronic device having external terminals with lead-free metal thin film formed on the surface thereof
JP2007154260A (en) * 2005-12-05 2007-06-21 Sumitomo Metal Mining Co Ltd Method of depositing lead-free plating film
JP4654895B2 (en) * 2005-12-05 2011-03-23 住友金属鉱山株式会社 Formation method of lead-free plating film

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