JPH11243080A - Etching method of semiconductor substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent the surface roughness of the base of a groove which is formed to the surface of a semiconductor substrate by a simple method, and to improve the shape of the groove. SOLUTION: This method comprises a method in which a groove 7 is formed to the surface of a semiconductor substrate 1, the groove 7 is formed through a process, in which a mask 4 for dry etching having a specified pattern is shaped onto the surface of the semiconductor substrate 1, and a process, in which cleaning treatment is executed onto the surface of the semiconductor substrate with the mask 4 for dry etching, and dry etching using the mask 4 after the cleaning treatment. Here, cleaning treatment is conducted in the plasma of an inert gas, such as a helium, neon or argon gas.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for etching a semiconductor substrate, and more particularly to an etching method for forming a trench in a semiconductor substrate.

[0002]

2. Description of the Related Art The miniaturization and higher density of the structure of semiconductor devices are still being vigorously pursued. For miniaturization, a semiconductor element formed with a size of 0.18 μm is currently used, and a semiconductor device such as a 1 gigabit DRAM using this size as a design standard has been developed.

[0003] In such miniaturization, it has become essential to form grooves on the surface of a semiconductor substrate. Such a groove has been used for an isolation region of a semiconductor element. That is, the application of trench element isolation to semiconductor devices has become essential. Alternatively, such a groove is being used for a formation region of a capacitor.

[0004] For this reason, a dry etching method of a semiconductor substrate for forming a fine and highly accurate groove on the surface of the semiconductor substrate is required. As such an etching method, there is a technique described in JP-A-8-17804. Hereinafter, the technology described in the above publication will be described as a conventional technology.

Hereinafter, this conventional technique will be described with reference to FIG. FIG. 4 is a cross-sectional view in the order of manufacturing steps for forming a groove on the surface of the silicon substrate.

[0006] As shown in FIG.
On the surface of No. 1, a natural oxide film 12 is formed. Then, a resist mask 13 to which the groove pattern has been transferred is formed on the natural oxide film 12.

Normally, reaction products adhere to the inner wall of a mass-production dry etching apparatus for etching a semiconductor substrate. If the semiconductor substrate is etched in this state, a reaction product flying from the inner wall of the device to the semiconductor substrate becomes an etching mask, which leads to the occurrence of a defect. Therefore, before the surface of the silicon substrate 11 is dry-etched, such reaction products are removed and the above-mentioned natural oxide film 12 is removed.
Plasma discharge by F-based gas such as F ₆ is performed. In this step, the above reaction products are effectively removed. Further, as shown in FIG. 4B, the natural oxide film 12 on the silicon substrate 11 is removed by etching using the resist mask 13 as an etching mask. Then, the opening 14 is formed.

Next, HBr gas is introduced into the dry etching apparatus as a reaction gas for etching the silicon substrate 11, and plasma discharge is performed. Then, the groove 15 is formed on the surface of the silicon substrate 11 using the resist mask 13 as an etching mask. However, in such an etching method, a rough etching portion 16 is formed on the bottom surface of the groove 15 as described later in detail.

[0009]

In the method of etching a semiconductor substrate as described above, the rough etching portion 16 is formed on the bottom surface of the groove as described above. this is,
In the F-type plasma discharge described in the related art,
The etching rate of the semiconductor substrate is higher than the etching rate of the natural oxide film or the reaction product, and the pattern transfer of the reaction product or the like is formed on the semiconductor substrate. As a result, irregularities are formed at the bottom of the groove of the semiconductor substrate, and a large number of the above-described rough portions are formed. Since the uniformity of the depth of the groove is deteriorated in this way, it is difficult to have a sufficient element isolation capability particularly when forming a shallow trench element isolation.

Further, in the dry etching for forming the groove, side etching of the semiconductor substrate due to active F radicals easily occurs, and the accuracy of the dimension of the opening of the groove deteriorates. Then, fine element isolation becomes difficult.

An object of the present invention is to provide a method of etching a semiconductor substrate for improving the shape of the bottom of a groove by a simple method and forming a fine groove with high accuracy.

[0012]

SUMMARY OF THE INVENTION For this purpose, a method for etching a semiconductor substrate according to the present invention is a method for forming a groove on a surface of a semiconductor substrate, the method for dry etching having a predetermined pattern on the surface of the semiconductor substrate. Forming a mask, performing a cleaning process on the surface of the semiconductor substrate having the mask, and forming the groove by dry etching using the mask after the cleaning process.

Here, the cleaning process is performed in an inert gas plasma. For example, the dry etching mask is formed of a photoresist film, and helium gas is used as the inert gas. Alternatively, the dry etching mask is formed of an inorganic insulating film,
As the inert gas, neon gas or argon gas is used.

Here, an inorganic insulating film and a photoresist film are laminated on the surface of the semiconductor substrate, the predetermined pattern is transferred to the photoresist film, and the inorganic insulating film is dried using the photoresist film as a mask. The dry etching mask is formed by etching.

[0015] A reaction product flying from the inner wall of the reaction chamber (chamber) of the etching apparatus and attaching thereto or a reaction product formed on the surface of the semiconductor substrate by dry etching of the inorganic insulating film is formed in the cleaning process. Removed. Specifically, a silicon substrate is used as the semiconductor substrate, and a silicon oxide film is used as the inorganic insulating film.

[0016]

Next, a first embodiment of the present invention will be described with reference to FIG. FIG. 1 is a sectional view in the order of steps in etching a semiconductor substrate of the present invention.

As shown in FIG. 1A, a silicon substrate 1
Is formed on the surface of the substrate. Here, the base insulating film 2 is composed of a silicon oxide film formed by thermally oxidizing the surface of the silicon substrate 1. Note that this base insulating film 2
Is set to about 10 nm.

Next, a protective insulating film 3 is formed on the base insulating film 2. Here, the protective insulating film 3 is a silicon nitride film having a thickness of about 100 nm deposited by a chemical vapor deposition (CVD) method. Then, a resist mask 4 is formed on the protective insulating film 3 by a known photolithography technique. The groove pattern is transferred to the resist mask 4.

Next, as shown in FIG. 1B, the protective insulating film 3 and the base insulating film 2 are sequentially dry-etched using the resist mask 4 as an etching mask, and an opening 5 is formed on the surface of the silicon substrate 1. You. Here, in the dry etching of the protective insulating film 3, an F-based gas such as NF ₃ is used as a reaction gas. In the dry etching of the base insulating film 2, a mixed gas of CHF ₃ and CO is used as a reaction gas. However, in this dry etching, a reaction product 6 is formed on the surface of the silicon substrate 1 in the opening 5.

In forming the opening 5 by dry etching, it is necessary to prevent the surface of the silicon substrate 1 from being etched. This is because it is essential to make the depth of the groove uniform, especially when forming a shallow groove. However, if the etching selectivity with respect to the silicon substrate 1 is increased in the dry etching process of the base insulating film 2 for this reason,
The reaction product 6 as described above is easily formed. In the formation of such a reaction product 6, when the etching region on the surface of the silicon substrate 1 increases, the frequency of the formation increases. In particular, when the area occupied by the surface of the silicon substrate 1 is increased as in the case of trench element isolation, the area for forming the groove for that is increased, and the frequency of forming the reaction product 6 is increased.

Next, a cleaning process, which is a feature of the present invention, is performed. This cleaning process is performed by introducing an inert gas such as He into a dry etching apparatus for etching the silicon substrate 1 and performing plasma discharge.
By the plasma discharge of the inert gas, the reaction product 6 or the natural oxide film is physically etched. Here, the reaction product 6 may be a reaction product flying from the inner wall of the chamber. As described above, in the cleaning process of the present invention, ion etching is performed using the ions of the inert gas. Thus, FIG.
As shown in (c), the surface of the silicon substrate 1 in the opening 5 is cleaned. In this case, if the mass of the inert gas increases, the resist mask 4 is also physically etched, so that a small mass inert gas such as He is used.

In such a cleaning process, the kinetic energy of the ions of the inert gas is reduced as much as possible.
It is preferable to set the ion density to be high. Therefore, it is effective if the cleaning process is performed by irradiation with an ion shower that moves anisotropically.

Next, a mixed gas of Cl ₂ and HBr is used as a reaction gas. The reaction gas is subjected to plasma discharge, and the surface of the silicon substrate 1 is dry-etched using the resist mask 4, the protective insulating film 3 and the base insulating film 2 as an etching mask. Thus, the groove 7 is formed on the surface of the silicon substrate 1.

The reaction product 6 described with reference to FIG. 1 (b) is a polymer composed of silicon, carbon, oxygen, fluorine and the like. This polymer is hardly etched by dry etching using a halogen compound as a reaction gas. For this reason, if the above-described cleaning process, which is a feature of the present invention, is not performed, a surface roughness similar to the etching roughness occurs on the bottom surface of the groove after the groove is formed.

On the other hand, in the embodiment of the present invention,
There is no such surface roughness, and a groove having a uniform depth can be easily formed. In addition, there is no side etching of the silicon substrate 1 in the above cleaning process, and fine grooves are formed with high precision.

Next, a second embodiment of the present invention will be described with reference to FIGS. 2 and 3 are sectional views in the order of steps for explaining the method of etching a semiconductor substrate according to the present invention. In this case, after the etching process of the semiconductor substrate,
A trench element isolation region is formed.

As shown in FIG. 2A, the silicon substrate 1
Is formed on the surface of the mask insulating film 8. Here, the mask insulating film 8 is a silicon oxide film having a thickness of about 200 nm deposited by the CVD method. Then, a resist mask 4 is formed on the mask insulating film 8. The groove pattern is transferred to the resist mask 4.

Next, as shown in FIG. 2B, the mask insulating film 8 is dry-etched using the resist mask 4 as an etching mask, and an opening 5 is formed on the surface of the silicon substrate 1. Here, a mixed gas of CH ₂ F ₂ and CO is used as a reactive etching gas. Also in this case, a reaction product 6 is formed on the surface of the silicon substrate 1 in the opening 5 by this dry etching.

Next, in the second embodiment, FIG.
As shown in (c), the resist mask 4 is formed by a known method,
For example, it is removed by an ashing method using oxygen plasma.

As described above, when the reaction product 6 is a polymer composed of silicon, carbon or the like, the polymer of the reaction product 6 remains as it is.

Next, the dry etching apparatus for etching the silicon substrate 1 performs a cleaning process which is a feature of the present invention. In this cleaning process, an inert gas having a relatively large mass such as Ne or Ar is introduced instead of He, and plasma cleaning is performed. In this way, as shown in FIG. 2D, the surface of the silicon substrate 1 in the opening 5 is cleaned.

In this case, unlike the first embodiment, the cleaning process is performed after the resist mask 4 is removed. For this purpose, an inert gas having a relatively large mass can be used. Then, reaction products that cannot be removed by He plasma can be easily removed.

Next, as shown in FIG. 3A, as described in the first embodiment, Cl _{2 is used} as a reaction gas.
A mixed gas of HBr and HBr is used, and the surface of the silicon substrate 1 is dry-etched using the mask insulating film 8 as an etching mask. Thus, the groove 7 is formed on the surface of the silicon substrate 1.

Next, the mask insulating film 8 is removed, the entire surface of the silicon substrate 1 is thermally oxidized, and a surface insulating film 9 is formed as shown in FIG. Here, the surface insulating film 9 is a silicon oxide film having a thickness of about 20 nm.

Next, a silicon oxide film is formed on the entire surface by a CVD method, and unnecessary portions are ground and removed by a chemical mechanical polishing (CMP) method. In this way, as shown in FIG. 3C, the buried insulating film 10 is filled in the groove 7 on the surface of the silicon substrate 1 with the surface insulating film 9 interposed therebetween. In this way,
A trench element isolation region is formed in a predetermined region on the surface of silicon substrate 1.

In the second embodiment of the present invention, as described in the first embodiment, there is no surface roughness at the bottom of the groove 7, and a groove having a uniform depth can be formed easily and with high precision. Will be formed. In this case, even a reaction product that is difficult to remove can be easily or quickly removed.

In the above embodiment of the present invention, the removal of the reaction product and the formation of the groove are performed in two steps in the same chamber. The present invention is not limited to this. In a dry etching apparatus provided with a multi-chamber, removal of a reaction product and formation of a groove may be performed in another chamber. In this case, since the plasma discharge method can be applied in different chambers, the cleaning process and the etching process for forming the groove can be performed by completely different methods. Then, the entire process is performed effectively, and the entire process is further reduced.

[0038]

As described above, the method for etching a semiconductor substrate according to the present invention is a method for forming a groove on the surface of a semiconductor substrate, and includes a dry etching mask having a predetermined pattern on the surface of the semiconductor substrate. Forming a;
Performing a cleaning process on the surface of the semiconductor substrate having the mask. After the cleaning process, the grooves are formed by dry etching using the mask.

Here, this cleaning process is performed in plasma such as helium gas, neon gas or argon gas.

For this reason, there is no such a case that the etching bottom surface is roughened and the shape thereof is deteriorated. In addition, the uniformity of the depth of the groove is greatly improved in this way, and particularly when a shallow trench element isolation is to be formed in the above-mentioned groove, the reliability is high and the element isolation ability is sufficient.

Further, highly precise and fine grooves can be easily formed, and highly accurate element isolation can be formed.

Thus, the present invention facilitates the realization of a miniaturized or densified semiconductor device by a simple method.

[Brief description of the drawings]

FIG. 1 is a sectional view illustrating a first embodiment of the present invention in the order of manufacturing steps.

FIG. 2 is a cross-sectional view illustrating a second embodiment of the present invention in the order of manufacturing steps.

FIG. 3 is a cross-sectional view illustrating a second embodiment of the present invention in the order of manufacturing steps.

FIG. 4 is a cross-sectional view illustrating a related art in the order of manufacturing steps.

[Explanation of symbols]

 Reference Signs List 1,11 silicon substrate 2 base insulating film 3 protective insulating film 4,13 resist mask 5,14 opening 6 reaction product 7,15 groove 8 mask insulating film 9 surface insulating film 10 buried insulating film 12 natural oxide film 16 etching rough part

Claims (7)

[Claims] 1. A method for forming a groove on a surface of a semiconductor substrate, comprising: forming a dry etching mask having a predetermined pattern on the surface of the semiconductor substrate; and cleaning the surface of the semiconductor substrate having the mask. A method of etching a semiconductor substrate, comprising: performing a process; and forming the groove by dry etching using the mask after the cleaning process. 2. The method according to claim 1, wherein the cleaning process is performed in an inert gas plasma. 3. The method for etching a semiconductor substrate according to claim 2, wherein said dry etching mask is formed of a photoresist film, and said inert gas is helium gas. 4. The method for etching a semiconductor substrate according to claim 2, wherein the dry etching mask is formed of an inorganic insulating film, and the inert gas is a neon gas or an argon gas. 5. An inorganic insulating film and a photoresist film are laminated on a surface of the semiconductor substrate, the predetermined pattern is transferred to the photoresist film, and the inorganic insulating film is dry-etched using the photoresist film as a mask. The method for etching a semiconductor substrate according to claim 3, wherein the dry etching mask is formed. 6. The method of etching a semiconductor substrate according to claim 5, wherein a reaction product formed on a surface of the semiconductor substrate by dry etching of the inorganic insulating film is removed in the cleaning process. . 7. The semiconductor substrate is a silicon substrate,
7. The method according to claim 5, wherein the inorganic insulating film is a silicon oxide film.