JPH0353521A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To enable the tapered shape to be easily taken by a method wherein an oxide film or a nitride film is deposited on a thermal oxide film patterned on an Si substrate and after etching back the deposited film, the sidewall deposited on the thermal oxide film together with the patterned thermal oxide film is used as a mask. CONSTITUTION:Firstly, a thermal oxide film 2 is deposited on an Si substrate 1 and then the oxide film 2 is evenly coated with a resist 3. Next, fine patterns are transferred to this resist 3 for development using an exposure device so as to form the resist 3 having the fine patterns on the thermal oxide film 2. The thermal oxide film 2 is dry-etched away using the resist 3 as a mask. After finishing the dryetching process, the resist 3 used as the mask is removed to form the oxide film 2 having the fine patterns. Next, another oxide film 4 is evenly deposited using a CVD device. Finally, Si trenches are etched away.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a method for manufacturing a semiconductor device.

[Conventional technology]

As the degree of integration of semiconductor integrated circuits increases, Si trench etching has become a necessary technique to reduce the two-dimensional area for element isolation or capacitance. especially,
As the degree of integration increases, so-called high aspect ratio etching, in which deep holes are dug in a narrow region of a Si substrate, is required. In this case, the dimensions of the openings are very fine, so that etching is accompanied by all kinds of difficulties such as reaction, evacuation, and shape control. Regarding the shape,
Various shapes such as U-shape, V-shape, and Y-shape are required.

FIGS. 2(a) to 2(C) are cross-sectional views showing the conventional Si} wrench etching method in order of steps. First, as shown in FIG. 2(a), a thick thermal oxide film 2 is formed on a Si substrate 1. Next, a positive resist 3 is uniformly coated on this thermal oxide film 2, exposed to light, and developed.
A resist mask having a fine pattern is formed.

Next, as shown in FIG. 2(b), the thermal oxide film 2 is dry-etched using the formed resist 3 as a mask. This dry etching is usually done once on parallel plate electrodes.
By applying a high frequency of 3.56 MHz and introducing an appropriate gas to generate plasma, etching is performed using so-called reactive ion etching (RIE), which allows highly anisotropic etching to be achieved. Oxide film 2 is etched almost vertically. After etching the thermal oxide film 2, if the resist 3 used as a mask is removed, the Si
A thermal oxide film 2 is patterned on a substrate 1. Next, as shown in FIG. 2(c), thermally oxidized JI! 2 as a mask, the Si substrate 1 is subjected to reactive ion etching to form grooves 5 having a fine pattern.

[Problem to be solved by the invention]

As mentioned above, when trench etching of the Si substrate 1 is performed using the thermally oxidized M2 patterned perpendicularly to the St substrate 11 as a mask, the ions that enter the Si substrate 1 from the plasma during etching are Si substrate 1
Since it is perpendicular to the St
It is thought that etching of the substrate 1 will progress and a vertical shape will be obtained, but in reality it is difficult to accurately control various plasma quantities such as etching pressure and high frequency power, which greatly affect the trench shape. In addition, the shape is influenced by the structure and atmosphere of the chamber, so it is easy to have an undercut or a bowing shape, so when depositing an oxide film or polycrystalline Si film in the subsequent CVD process, it is difficult to This creates a problem in that a gap is created.

[Means to solve the problem]

In the method for manufacturing a semiconductor device of the present invention, a first
patterning the first insulating film, and patterning the first insulating film on the surface of the semiconductor substrate including the first insulating film, the second insulating film having substantially the same etching characteristics as the first insulating film.
depositing an insulating film, and anisotropically etching the second insulating film and the semiconductor substrate to leave the second insulating film only on the sidewalls of the first insulating film, and then applying an etching gas. Alternatively, the method includes the step of anisotropically etching the semiconductor substrate using the first and second insulating films as masks to form a groove in the semiconductor substrate. [Example] Next, , embodiments of the present invention will be described with reference to the drawings.

FIGS. 1(a) to 1(d) are cross-sectional views shown in order of steps for explaining an embodiment of the present invention. First, Figure 1 (a
), a thermal oxide film 2 with a thickness of about 1 .mu.m is grown on an St substrate 1, and a resist 3 with a thickness of 1.0 to 1.5 .mu.m is uniformly applied thereon. Next, a fine pattern is transferred onto this resist 3 using an exposure device and developed, whereby a resist 3 having a fine pattern is formed on the thermal oxide film 2. Next, as shown in FIG. 1(b), the thermal oxide film 2 is dry-etched using the resist 3 as a mask. The etching procedure is as follows.

The above sample was placed on one of a pair of parallel plate electrodes, and 20% of CHF was placed in the built-in vacuum chamber.
~50SCCM will be introduced. 13.5 on the electrode where the sample was placed.
A high frequency electric field of 6 MHz is applied to generate a high frequency glow discharge between both electrodes. The power density used at this time was 2 to 3
It was W/cm2. Gas madness during etching is o. oi~0. It was set to ITorr. Under these conditions, the etching rate of the thermal oxide film 11 is approximately 400 nm/min.
The in-plane uniformity of the semiconductor substrate was within ±3%, and the thermal oxide film 2 was etched to have substantially vertical walls. Note that the selectivity ratio between the St substrate 1 and the thermal oxide film 2 was approximately 20. After etching, the resist 3 used as a mask was removed to obtain an oxide film 2 having a fine pattern.

Next, as shown in FIG. 1(c), this sample was coated with a thickness of 10
An oxide film 4 with a thickness of 0 to 200 nm is uniformly deposited using a CVD device.

Next, as shown in FIG. 1(d), using the above sample,
Etch the Si trench. The equipment used was the same reactive ion etching (RIE) equipment as described above. As the first step, the oxide film 4 was etched. The gas is CHF. using, the flow rate is 20-508C
It was made into a commercial. Also, the gas thickness during etching is 0.01~
Q. lTorr, the power density used is 2-3W/c
It was m2. Under these conditions, the etching rate of the oxide film 4 is approximately 500 nm/min, so when the oxide film 4 is, for example, 200 nm thick, the etching time is set to 30 seconds. After etching, a side groove 4a having a width of about 150 nm was formed on the side wall of the patterned thermal oxide film 2. Note that under the above conditions, the Si substrate 1 is not etched. Thereafter, after the chamber was sufficiently evacuated, Si etching was continued as a second step. As an etching gas, 3 to 5 SCCM of fluorocarbon gas such as CF4 is introduced, and the power density is 2 to 3.
W/cm2. When etching the St substrate 1 at a gas pressure of 0.2 to 0.6 Torr, the etching rate is approximately 1.
3 μm/min, thermal oxidation [2] selectivity was about 10. For example, if etching is performed for 4 minutes under these conditions, S
It was observed by SEM observation that the etching depth of the T-substrate 1 was about 5 μm, and the width of the side groove 4a of the oxide film 2 of the shape mask became narrower, so that the shape became G-shaped.

When Si trench etching is performed using the above method, a finer pattern shape than the predetermined mask pattern can be obtained,
The pattern dimensions can be changed by changing the thickness of the oxide film 4 formed by the CVD method.

〔Effect of the invention〕

As explained above, in Si trench etching, the present invention deposits an oxide film or a nitride film by a CVD method on a thermal oxide film that has been patterned on a Si substrate,
Since the sidewalls attached to the sidewalls of the patterned thermal oxide film are used as a mask together with the patterned thermal oxide film after etch bagging, it is easy to obtain a tapered shape, and the impurity diffusion to the trench wall surface is performed in the next process. Alternatively, the electrode material can be easily deposited into the trench.

[Brief explanation of drawings]

FIGS. 1(a) to (d) are cross-sectional views shown in the order of steps for explaining one embodiment of the present invention, and FIGS. 2(a) to (c) are for explaining conventional Si trench etching. FIG.

Claims (1)

[Claims] A step of forming a first insulating film on a semiconductor substrate and patterning the first insulating film, and etching the surface of the semiconductor substrate including the first insulating film with substantially the same etching characteristics as the first insulating film. a step of depositing a second insulating film; and anisotropic etching of the second insulating film and the semiconductor substrate to leave the second insulating film only on the sidewalls of the first insulating film, followed by etching. A method for manufacturing a semiconductor device, comprising the step of anisotropically etching the semiconductor substrate using different gases and using the first and second insulating films as masks to form a groove in the semiconductor substrate.